drm/nouveau/mpeg: switch to subdev printk macros
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nvkm / engine / mpeg / nv40.c
index 9508bf9e140f0c580ceed3ecea639f2a0c7f8764..47ae1d890a7f1e76e38d773af85a22c0f8695a24 100644 (file)
@@ -32,8 +32,9 @@
 static int
 nv40_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len)
 {
-       struct nvkm_instmem *imem = nvkm_instmem(object);
-       struct nv31_mpeg_priv *priv = (void *)object->engine;
+       struct nv31_mpeg *mpeg = (void *)object->engine;
+       struct nvkm_device *device = mpeg->base.engine.subdev.device;
+       struct nvkm_instmem *imem = device->imem;
        u32 inst = *(u32 *)arg << 4;
        u32 dma0 = nv_ro32(imem, inst + 0);
        u32 dma1 = nv_ro32(imem, inst + 4);
@@ -47,22 +48,22 @@ nv40_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len)
 
        if (mthd == 0x0190) {
                /* DMA_CMD */
-               nv_mask(priv, 0x00b300, 0x00030000, (dma0 & 0x00030000));
-               nv_wr32(priv, 0x00b334, base);
-               nv_wr32(priv, 0x00b324, size);
+               nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000));
+               nvkm_wr32(device, 0x00b334, base);
+               nvkm_wr32(device, 0x00b324, size);
        } else
        if (mthd == 0x01a0) {
                /* DMA_DATA */
-               nv_mask(priv, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2);
-               nv_wr32(priv, 0x00b360, base);
-               nv_wr32(priv, 0x00b364, size);
+               nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2);
+               nvkm_wr32(device, 0x00b360, base);
+               nvkm_wr32(device, 0x00b364, size);
        } else {
                /* DMA_IMAGE, VRAM only */
                if (dma0 & 0x00030000)
                        return -EINVAL;
 
-               nv_wr32(priv, 0x00b370, base);
-               nv_wr32(priv, 0x00b374, size);
+               nvkm_wr32(device, 0x00b370, base);
+               nvkm_wr32(device, 0x00b374, size);
        }
 
        return 0;
@@ -89,15 +90,16 @@ nv40_mpeg_sclass[] = {
 static void
 nv40_mpeg_intr(struct nvkm_subdev *subdev)
 {
-       struct nv31_mpeg_priv *priv = (void *)subdev;
+       struct nv31_mpeg *mpeg = (void *)subdev;
+       struct nvkm_device *device = mpeg->base.engine.subdev.device;
        u32 stat;
 
-       if ((stat = nv_rd32(priv, 0x00b100)))
+       if ((stat = nvkm_rd32(device, 0x00b100)))
                nv31_mpeg_intr(subdev);
 
-       if ((stat = nv_rd32(priv, 0x00b800))) {
-               nv_error(priv, "PMSRCH 0x%08x\n", stat);
-               nv_wr32(priv, 0x00b800, stat);
+       if ((stat = nvkm_rd32(device, 0x00b800))) {
+               nvkm_error(subdev, "PMSRCH %08x\n", stat);
+               nvkm_wr32(device, 0x00b800, stat);
        }
 }
 
@@ -106,19 +108,19 @@ nv40_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
               struct nvkm_oclass *oclass, void *data, u32 size,
               struct nvkm_object **pobject)
 {
-       struct nv31_mpeg_priv *priv;
+       struct nv31_mpeg *mpeg;
        int ret;
 
-       ret = nvkm_mpeg_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
+       ret = nvkm_mpeg_create(parent, engine, oclass, &mpeg);
+       *pobject = nv_object(mpeg);
        if (ret)
                return ret;
 
-       nv_subdev(priv)->unit = 0x00000002;
-       nv_subdev(priv)->intr = nv40_mpeg_intr;
-       nv_engine(priv)->cclass = &nv31_mpeg_cclass;
-       nv_engine(priv)->sclass = nv40_mpeg_sclass;
-       nv_engine(priv)->tile_prog = nv31_mpeg_tile_prog;
+       nv_subdev(mpeg)->unit = 0x00000002;
+       nv_subdev(mpeg)->intr = nv40_mpeg_intr;
+       nv_engine(mpeg)->cclass = &nv31_mpeg_cclass;
+       nv_engine(mpeg)->sclass = nv40_mpeg_sclass;
+       nv_engine(mpeg)->tile_prog = nv31_mpeg_tile_prog;
        return 0;
 }
 
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