qlcnic: use the correct ring in qlcnic_83xx_process_rcv_ring_diag()

[deliverable/linux.git] / drivers / irqchip / irq-mips-gic.c

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 4dffccf532a2173ce17f289aeeb0f69bdfac4dc3..3b5e10aa48ab48443210edde5c0fc4350b54d294 100644 (file)
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -197,7 +197,7 @@ void gic_write_cpu_compare(cycle_t cnt, int cpu)
 
        local_irq_save(flags);
 
-       gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), cpu);
+       gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), mips_cm_vp_id(cpu));
 
        if (mips_cm_is64) {
                gic_write(GIC_REG(VPE_OTHER, GIC_VPE_COMPARE), cnt);
@@ -246,6 +246,14 @@ void gic_stop_count(void)
 
 #endif
 
+unsigned gic_read_local_vp_id(void)
+{
+       unsigned long ident;
+
+       ident = gic_read(GIC_REG(VPE_LOCAL, GIC_VP_IDENT));
+       return ident & GIC_VP_IDENT_VCNUM_MSK;
+}
+
 static bool gic_local_irq_is_routable(int intr)
 {
        u32 vpe_ctl;
@@ -553,7 +561,8 @@ static void gic_mask_local_irq_all_vpes(struct irq_data *d)
 
        spin_lock_irqsave(&gic_lock, flags);
        for (i = 0; i < gic_vpes; i++) {
-               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), i);
+               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                         mips_cm_vp_id(i));
                gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_RMASK), 1 << intr);
        }
        spin_unlock_irqrestore(&gic_lock, flags);
@@ -567,7 +576,8 @@ static void gic_unmask_local_irq_all_vpes(struct irq_data *d)
 
        spin_lock_irqsave(&gic_lock, flags);
        for (i = 0; i < gic_vpes; i++) {
-               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), i);
+               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                         mips_cm_vp_id(i));
                gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_SMASK), 1 << intr);
        }
        spin_unlock_irqrestore(&gic_lock, flags);
@@ -607,7 +617,8 @@ static void __init gic_basic_init(void)
        for (i = 0; i < gic_vpes; i++) {
                unsigned int j;
 
-               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), i);
+               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                         mips_cm_vp_id(i));
                for (j = 0; j < GIC_NUM_LOCAL_INTRS; j++) {
                        if (!gic_local_irq_is_routable(j))
                                continue;
@@ -652,7 +663,8 @@ static int gic_local_irq_domain_map(struct irq_domain *d, unsigned int virq,
        for (i = 0; i < gic_vpes; i++) {
                u32 val = GIC_MAP_TO_PIN_MSK | gic_cpu_pin;
 
-               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), i);
+               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                         mips_cm_vp_id(i));
 
                switch (intr) {
                case GIC_LOCAL_INT_WD:
@@ -956,7 +968,7 @@ static void __init __gic_init(unsigned long gic_base_addr,
                              unsigned int cpu_vec, unsigned int irqbase,
                              struct device_node *node)
 {
-       unsigned int gicconfig;
+       unsigned int gicconfig, cpu;
        unsigned int v[2];
 
        __gic_base_addr = gic_base_addr;
@@ -973,6 +985,14 @@ static void __init __gic_init(unsigned long gic_base_addr,
        gic_vpes = gic_vpes + 1;
 
        if (cpu_has_veic) {
+               /* Set EIC mode for all VPEs */
+               for_each_present_cpu(cpu) {
+                       gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                                 mips_cm_vp_id(cpu));
+                       gic_write(GIC_REG(VPE_OTHER, GIC_VPE_CTL),
+                                 GIC_VPE_CTL_EIC_MODE_MSK);
+               }
+
                /* Always use vector 1 in EIC mode */
                gic_cpu_pin = 0;
                timer_cpu_pin = gic_cpu_pin;