/* The XMAC_MIN register only accepts values for TX min which
* have the low 3 bits cleared.
*/
- BUILD_BUG_ON(min & 0x7);
+ BUG_ON(min & 0x7);
if (np->flags & NIU_FLAGS_XMAC)
niu_init_tx_xmac(np, min, max);
.unmap_single = niu_phys_unmap_single,
};
-static unsigned long res_size(struct resource *r)
-{
- return r->end - r->start + 1UL;
-}
-
static int __devinit niu_of_probe(struct of_device *op,
const struct of_device_id *match)
{
dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM);
np->regs = of_ioremap(&op->resource[1], 0,
- res_size(&op->resource[1]),
+ resource_size(&op->resource[1]),
"niu regs");
if (!np->regs) {
dev_err(&op->dev, PFX "Cannot map device registers, "
}
np->vir_regs_1 = of_ioremap(&op->resource[2], 0,
- res_size(&op->resource[2]),
+ resource_size(&op->resource[2]),
"niu vregs-1");
if (!np->vir_regs_1) {
dev_err(&op->dev, PFX "Cannot map device vir registers 1, "
}
np->vir_regs_2 = of_ioremap(&op->resource[3], 0,
- res_size(&op->resource[3]),
+ resource_size(&op->resource[3]),
"niu vregs-2");
if (!np->vir_regs_2) {
dev_err(&op->dev, PFX "Cannot map device vir registers 2, "
err_out_iounmap:
if (np->vir_regs_1) {
of_iounmap(&op->resource[2], np->vir_regs_1,
- res_size(&op->resource[2]));
+ resource_size(&op->resource[2]));
np->vir_regs_1 = NULL;
}
if (np->vir_regs_2) {
of_iounmap(&op->resource[3], np->vir_regs_2,
- res_size(&op->resource[3]));
+ resource_size(&op->resource[3]));
np->vir_regs_2 = NULL;
}
if (np->regs) {
of_iounmap(&op->resource[1], np->regs,
- res_size(&op->resource[1]));
+ resource_size(&op->resource[1]));
np->regs = NULL;
}
if (np->vir_regs_1) {
of_iounmap(&op->resource[2], np->vir_regs_1,
- res_size(&op->resource[2]));
+ resource_size(&op->resource[2]));
np->vir_regs_1 = NULL;
}
if (np->vir_regs_2) {
of_iounmap(&op->resource[3], np->vir_regs_2,
- res_size(&op->resource[3]));
+ resource_size(&op->resource[3]));
np->vir_regs_2 = NULL;
}
if (np->regs) {
of_iounmap(&op->resource[1], np->regs,
- res_size(&op->resource[1]));
+ resource_size(&op->resource[1]));
np->regs = NULL;
}