Merge branch 'pm-cpufreq'

[deliverable/linux.git] / drivers / staging / vt6656 / baseband.c

diff --git a/drivers/staging/vt6656/baseband.c b/drivers/staging/vt6656/baseband.c
index 8a965bf821c5d52507656a8eabe7936c9851d630..694e34a5ff9048f135e2304198e75a9ffe4f06f8 100644 (file)
--- a/drivers/staging/vt6656/baseband.c
+++ b/drivers/staging/vt6656/baseband.c
@@ -40,7 +40,7 @@
 #include "mac.h"
 #include "baseband.h"
 #include "rf.h"
-#include "control.h"
+#include "usbpipe.h"
 #include "datarate.h"
 
 static u8 abyVT3184_AGC[] = {
@@ -1028,20 +1028,19 @@ int BBbVT3184Init(struct vnt_private *priv)
 
        if ((priv->byRFType == RF_VT3226) ||
                (priv->byRFType == RF_VT3342A0)) {
-               ControlvWriteByte(priv, MESSAGE_REQUEST_MACREG,
+               vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
                                                MAC_REG_ITRTMSET, 0x23);
                MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
        } else if (priv->byRFType == RF_VT3226D0) {
-               ControlvWriteByte(priv, MESSAGE_REQUEST_MACREG,
+               vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
                                                MAC_REG_ITRTMSET, 0x11);
                MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
        }
 
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
-
-       RFbRFTableDownload(priv);
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
 
+       vnt_rf_table_download(priv);
 
        /* Fix for TX USB resets from vendors driver */
        vnt_control_in(priv, MESSAGE_TYPE_READ, USB_REG4,
@@ -1076,18 +1075,18 @@ void BBvSetShortSlotTime(struct vnt_private *priv)
        else
                priv->byBBRxConf |= 0x20;
 
-       ControlvReadByte(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
+       vnt_control_in_u8(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
 
        if (bb_vga == priv->abyBBVGA[0])
                priv->byBBRxConf |= 0x20;
 
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
 }
 
 void BBvSetVGAGainOffset(struct vnt_private *priv, u8 data)
 {
 
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
 
        /* patch for 3253B0 Baseband with Cardbus module */
        if (priv->bShortSlotTime)
@@ -1095,7 +1094,7 @@ void BBvSetVGAGainOffset(struct vnt_private *priv, u8 data)
        else
                priv->byBBRxConf |= 0x20; /* 0010 0000 */
 
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
 }
 
 /*
@@ -1112,14 +1111,14 @@ void BBvSetVGAGainOffset(struct vnt_private *priv, u8 data)
  */
 void BBvSetDeepSleep(struct vnt_private *priv)
 {
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);/* CR12 */
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);/* CR13 */
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);/* CR12 */
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);/* CR13 */
 }
 
 void BBvExitDeepSleep(struct vnt_private *priv)
 {
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);/* CR12 */
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);/* CR13 */
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);/* CR12 */
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);/* CR13 */
 }
 
 void BBvUpdatePreEDThreshold(struct vnt_private *priv, int scanning)
@@ -1384,7 +1383,7 @@ void BBvUpdatePreEDThreshold(struct vnt_private *priv, int scanning)
        if (!cr_201 && !cr_206)
                return;
 
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
-       ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
+       vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
 }