+2007-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
+
+ * config/tc-cr16.c: Replaced 'tabs' with white spaces and
+ added R_CR16_DISP8 as default reloc type for b<cc> instructions.
+
+2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/5080
+ * config/tc-i386.c (check_long_reg): Also handle cvttss2si.
+ (check_qword_reg): Also handle cvttsd2si.
+
+2007-09-27 Kazu Hirata <kazu@codesourcery.com>
+
+ * config/m68k-parse.h (m68k_register): Use MBO instead of MBB.
+ (last_movec_reg): Change to MBO.
+ * config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB.
+ (m68k_ip): Use MBO instead of MBO.
+ (init_table): Use MBO instead of MBO. Add an entry for mbo.
+
+2007-09-26 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (build_modrm_byte): Also check for RegEip
+ when considering IP-relative addressing.
+
+2007-09-26 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.h (md_register_arithmetic): Define.
+ * config/tc-ia64.h (md_register_arithmetic): Likewise.
+ * doc/internals.texi: Document md_register_arithmetic.
+ * expr.c (make_expr_symbol): Force O_register expressions into
+ reg_section.
+ (expr): Provide default for md_register_arithmetic. Don't resolve
+ adding/subtracting constants to/from registers if
+ md_register_arithmetic is zero.
+
+2007-09-26 Jan Beulich <jbeulich@novell.com>
+
+ * dw2gencfi.c: Conditionalize whole body upon TARGET_USE_CFIPOP.
+ (cfi_finish): Add second empty instance.
+
+2007-09-26 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-ia64.c (dot_pred_rel): Replace specialized handling
+ with simple call to parse_operand.
+
+2007-09-26 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (NUM_FLAG_CODE): Remove.
+
+2007-09-26 Jan Beulich <jbeulich@novell.com>
+
+ * as.c (itbl_parse): Remove #define.
+ (struct itbl_file_list): Move down and ...
+ (itbl_files): .. conditionalize upon HAVE_ITBL_CPU.
+ (show_usage): Conditionalize printing of --itbl option upon
+ HAVE_ITBL_CPU.
+ (parse_args): Conditionalize handling of -t/--itbl options upon
+ HAVE_ITBL_CPU. Remove OPTION_INSTTBL and replace its use with
+ 't'.
+
+2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (output_insn): Use i.tm.opcode_length to
+ check opcode length.
+
+2007-09-25 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (LONG_BRANCH_VIA_COND): New.
+ (BRANCHBWPL, FRAG_VAR_SIZE): New.
+ (md_relax_table): Add BRANCHBWPL entries.
+ (m68k_ip): Choose BRANCHBWPL relaxation if necessary.
+ (md_assemble): Use FRAG_VAR_SIZE.
+ (md_convert_frag_1): Add BRANCHBWPL cases.
+ (md_estimate_size_before_relaz): Likewise.
+
+2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
+
+ * config/tc-mips.c (s_align): Set max_alignment to 28.
+
+2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR 658
+ * config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
+ (set_allow_index_reg): New.
+ (allow_index_reg): Likewise.
+ (md_pseudo_table): Add "allow_index_reg" and
+ "disallow_index_reg".
+ (build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
+ fake index registers.
+ (i386_scale): Updated.
+ (i386_index_check): Support fake index registers.
+ (parse_real_register): Return NULL on eiz/riz if fake index
+ registers aren't allowed.
+
+2007-09-19 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-h8300.c (md_apply_fix): Do not abort or handle 8 byte
+ fixups.
+
+2007-09-19 Bob Wilson <bob.wilson@acm.org>
+
+ * doc/c-xtensa.texi (Xtensa Immediate Relaxation): Fix "addi" typo.
+
+2007-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * config/bfin-parse.y (asm_1): Slightly improve error messages
+ for "reg += const;".
+
+2007-09-18 Alan Modra <amodra@bigpond.net.au>
+
+ PR gas/5026
+ * read.c (emit_expr): Only use long long if required and available.
+
+2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (baseindex): Removed.
+ (build_modrm_byte): Check reg_num for RIP register instead of
+ reg_type.
+ (i386_index_check): Likewise.
+
+2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/5035
+ * config/obj-coff.c (obj_coff_endef): Remove checking size of
+ def_symbol_in_progress.
+
+2007-09-17 Evandro Menezes <evandro@yahoo.com>
+
+ PR gas/5026
+ * read.c (emit_expr): Use unsigned long long values in warning
+ message about truncated expressions.
+
+2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (intel_e04): Revert the last change.
+
+2007-09-17 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+
+2007-09-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/5034
+ * config/tc-i386.c (intel_e04): Return 1 if cur_token.code is
+ T_NIL.
+
+2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_modrm_byte): Adjust comment line
+ wrap.
+
+2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_modrm_byte): Use (A || B) instead
+ of (A || B) != 0.
+
+2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_modrm_byte): Adjust indentation.
+
+2007-09-14 Michael Meissner <michael.meissner@amd.com>
+ Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+ Tony Linthicum <tony.linthicum@amd.com>
+
+ * NEWS: Add SSE5 support to NEWS file.
+
+ * config/tc-i386.h (drex_byte): Add fields to allow process_drex
+ and build_modrm_byte to communicate.
+ (DREX_OC0): New SSE5 macro.
+ (DREX_OC0_MASK): Ditto.
+ (DREX_OC1): Ditto.
+ (DREX_OC1_MASK): Ditto.
+ (DREX_XMEM_X1_X2_X2): Ditto.
+ (DREX_X1_XMEM_X2_X2): Ditto.
+ (DREX_X1_XMEM_X2_X1: Ditto.
+ (DREX_X1_X2_XMEM_X1: Ditto.
+ (DREX_XMEM_X1_X2): Ditto.
+ (DREX_X1_XMEM_X2): Ditto.
+ (drex_byte): New structure to describe the DREX byte.
+
+ * config/tc-i386.c (process_drex): New function to handle SSE5
+ DREX bits.
+ (build_modrm_byte): Use the information cached away in
+ process_drex in the case of DREX instructions.
+ (i386_insn): Add drex field.
+ (pi): Add debugging of drex field.
+ (md_assemble): Treat SSE5 like SSE3 in instructions with an
+ immediate byte. Move REX field to DREX if this is a DREX
+ instruction.
+ (process_operands): Add SSE5 support.
+ (build_modrm_byte): Ditto.
+ (output_insn): Ditto.
+ (cpu_arch): Ditto.
+ (i386_align_code): Ditto.
+
+2007-09-12 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (md_assemble): Move handling of extrq/insertq
+ after generic operand swapping, and swap only the immediate operands.
+
+2007-09-11 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
+ (m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV.
+
+2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * tc-i386.c (output_insn): Only check SSE4.2 and ABM for 3
+ byte opcode.
+
+2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_flags_check_x64): Renamed to ...
+ (cpu_flags_check_cpu64): This. Inline.
+ (uints_all_zero): New.
+ (uints_set): Likewise
+ (uints_equal): Likewise
+ (UINTS_ALL_ZERO): Likewise
+ (UINTS_SET): Likewise
+ (UINTS_CLEAR): Likewise
+ (UINTS_EQUAL): Likewise
+ (cpu_flags_and): Likewise.
+ (cpu_flags_or): Likewise.
+ (operand_type_and): Likewise.
+ (operand_type_or): Likewise.
+ (operand_type_xor): Likewise.
+ (cpu_flags_not): Inline and use switch instead of loop.
+ (cpu_flags_match): Updated.
+ (operand_type_match): Likewise.
+ (smallest_imm_type): Likewise.
+ (set_cpu_arch): Likewise.
+ (pt): Likewise.
+ (md_assemble): Likewise.
+ (parse_insn): Likewise.
+ (optimize_imm): Likewise.
+ (match_template): Likewise.
+ (process_suffix): Likewise.
+ (update_imm): Likewise.
+ (finalize_imm): Likewise.
+ (process_operands): Likewise.
+ (build_modrm_byte): Likewise.
+ (i386_immediate): Likewise.
+ (i386_displacement): Likewise.
+ (i386_index_check): Likewise.
+ (i386_operand): Likewise.
+ (i386_target_format): Likewise.
+ (intel_e11): Likewise.
+ (operand_type): Remove implicitregister.
+ (operand_type_check): Updated. Inline.
+ (cpu_flags_all_zero): Removed.
+ (operand_type_all_zero): Likewise.
+ (i386_array_biop): Likewise.
+ (cpu_flags_biop): Likewise.
+ (operand_type_biop): Likewise.
+
+2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.in (AC_CHECK_HEADERS): Add limits.h.
+ * configure: Regenerated.
+ * config.in: Likewise.
+
+ * config/tc-i386.c: Include "opcodes/i386-init.h".
+ (_i386_insn): Use i386_operand_type for types.
+ (cpu_arch_flags): Updated to new types with bitfield.
+ (cpu_arch_tune_flags): Likewise.
+ (cpu_arch_isa_flags): Likewise.
+ (cpu_arch): Likewise.
+ (i386_align_code): Likewise.
+ (set_code_flag): Likewise.
+ (set_16bit_gcc_code_flag): Likewise.
+ (set_cpu_arch): Likewise.
+ (md_assemble): Likewise.
+ (parse_insn): Likewise.
+ (process_operands): Likewise.
+ (output_branch): Likewise.
+ (output_jump): Likewise.
+ (parse_real_register): Likewise.
+ (mode_from_disp_size): Likewise.
+ (smallest_imm_type): Likewise.
+ (pi): Likewise.
+ (type_names): Likewise.
+ (pt): Likewise.
+ (pte): Likewise.
+ (swap_2_operands): Likewise.
+ (optimize_imm): Likewise.
+ (optimize_disp): Likewise.
+ (match_template): Likewise.
+ (check_string): Likewise.
+ (process_suffix): Likewise.
+ (check_byte_reg): Likewise.
+ (check_long_reg): Likewise.
+ (check_qword_reg): Likewise.
+ (check_word_reg): Likewise.
+ (finalize_imm): Likewise.
+ (build_modrm_byte): Likewise.
+ (output_insn): Likewise.
+ (disp_size): Likewise.
+ (imm_size): Likewise.
+ (output_disp): Likewise.
+ (output_imm): Likewise.
+ (gotrel): Likewise.
+ (i386_immediate): Likewise.
+ (i386_displacement): Likewise.
+ (i386_index_check): Likewise.
+ (i386_operand): Likewise.
+ (parse_real_register): Likewise.
+ (i386_intel_operand): Likewise.
+ (intel_e09): Likewise.
+ (intel_bracket_expr): Likewise.
+ (intel_e11): Likewise.
+ (cpu_arch_flags_not): New.
+ (cpu_flags_check_x64): Likewise.
+ (cpu_flags_all_zero): Likewise.
+ (cpu_flags_not): Likewise.
+ (i386_cpu_flags_biop): Likewise.
+ (cpu_flags_biop): Likewise.
+ (cpu_flags_match); Likewise.
+ (acc32): New.
+ (acc64): Likewise.
+ (control): Likewise.
+ (reg16_inoutportreg): Likewise.
+ (disp16): Likewise.
+ (disp32): Likewise.
+ (disp32s): Likewise.
+ (disp16_32): Likewise.
+ (anydisp): Likewise.
+ (baseindex): Likewise.
+ (regxmm): Likewise.
+ (imm8): Likewise.
+ (imm8s): Likewise.
+ (imm16): Likewise.
+ (imm32): Likewise.
+ (imm32s): Likewise.
+ (imm64): Likewise.
+ (imm16_32): Likewise.
+ (imm16_32s): Likewise.
+ (imm16_32_32s): Likewise.
+ (operand_type): Likewise.
+ (operand_type_check): Likewise.
+ (operand_type_match): Likewise.
+ (operand_type_register_match): Likewise.
+ (update_imm): Likewise.
+ (set_code_flag): Also update cpu_arch_flags_not.
+ (set_16bit_gcc_code_flag): Likewise.
+ (md_begin): Likewise.
+ (parse_insn): Use cpu_flags_check_x64 to check 64bit support.
+ Use cpu_flags_match to match instructions.
+ (i386_target_format): Update cpu_arch_isa_flags and
+ cpu_arch_tune_flags to i386_cpu_flags type with bitfield.
+ (smallest_imm_type): Check cpu_arch_tune to tune for i486.
+ (match_template): Don't initialize overlap0, overlap1,
+ overlap2, overlap3 and operand_types.
+ (process_suffix): Handle crc32 with 64bit register.
+ (MATCH): Removed.
+ (CONSISTENT_REGISTER_MATCH): Likewise.
+
+ * config/tc-i386.h (arch_entry): Updated to i386_cpu_flags
+ type.
+
+2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_template): Handle invlpga, vmload,
+ vmrun and vmsave in SVME.
+ (process_suffix): Likewise.
+
+2007-09-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_index_check): Don't use RegRex
+ on the reg_type field.
+ (parse_real_register): Use `||' instead of `|'.
+
+2007-09-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_operands): Remove segment override
+ check on SVME instructions.
+ (i386_index_check): Remove memory operand check on SVME
+ instructions.
+
+2007-09-04 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-spu.c (struct spu_insn): Delete "flag". Add "reloc".
+ (md_assemble): Update init of insn. Use insn.reloc instead of
+ calculating from flag.
+ (get_imm): Set reloc rather than flag.
+ (calcop): Formatting.
+
+2007-08-29 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * dwarf2dbg.c (dwarf2_directive_loc): Emit duplicate .loc directives.
+
+2007-08-28 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * doc/c-arc.texi: Fix typo.
+
+2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_suffix): Handle cmpxchg8b in
+ Intel mode.
+
+2007-08-28 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (mcf52235_ctrl): Add cache registers.
+ (mcf5253_ctrl): Add RAMBAR, MBAR, MBAR2.
+ (mcf5407_ctrl): New.
+ (m68k_cpus): Adjust 5407 entry.
+
+2007-08-28 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * config/tc-m68k.c (mcf51qe_ctrl): Define 51QE control registers.
+ (m68k_cpus): Define 51QE cpu.
+
+2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ * as.c (main): Flush stderr before printing listings to ensure
+ consistent output order across platforms.
+
+2007-08-28 Robert Sebastian Gerus <arachnist@gmail.com>
+
+ * configure.tgt: Add support for i[3-7]86-*-dragonfly*.
+
+2007-08-24 Joseph Myers <joseph@codesourcery.com>
+ Paul Brook <paul@codesourcery.com>
+
+ * remap.c: New.
+ * as.h (remap_debug_filename, add_debug_prefix_map): Declare.
+ * as.c (show_usage): Document --debug-prefix-map option.
+ (parse_args): Handle --debug-prefix-map.
+ * dwarf2dbg.c (out_file_list, out_debug_info): Remap debug paths.
+ * stabs.c (stabs_generate_asm_file): Remap debug paths.
+ * Makefile.am (GAS_CFILES): Add remap.c
+ (GENERIC_OBJS): Add remap.o.
+ Regenerate dependencies.
+ * Makefile.in: Regenerate.
+ * doc/as.texinfo (--debug-prefix-map): Document.
+
2007-08-24 Aurelien Jarno <aurel32@debian.org>
* config/tc-arm.c (md_apply_fix): Cast bfd_vma values to long
projects / deliverable / binutils-gdb.git / blobdiff