+2007-08-31 Michael Meissner <michael.meissner@amd.com>
+ Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+ Tony Linthicum <tony.linthicum@amd.com>
+
+ * NEWS: Add SSE5 support to NEWS file.
+
+ * config/tc-i386.h (drex_byte): Add fields to allow process_drex
+ and build_modrm_byte to communicate.
+ (DREX_OC0): New SSE5 macro.
+ (DREX_OC0_MASK): Ditto.
+ (DREX_OC1): Ditto.
+ (DREX_OC1_MASK): Ditto.
+ (DREX_XMEM_X1_X2_X2): Ditto.
+ (DREX_X1_XMEM_X2_X2): Ditto.
+ (DREX_X1_XMEM_X2_X1: Ditto.
+ (DREX_X1_X2_XMEM_X1: Ditto.
+ (DREX_XMEM_X1_X2): Ditto.
+ (DREX_X1_XMEM_X2): Ditto.
+ (drex_byte): New structure to describe the DREX byte.
+
+ * config/tc-i386.c (process_drex): New function to handle SSE5
+ DREX bits.
+ (build_modrm_byte): Use the information cached away in
+ process_drex in the case of DREX instructions.
+ (i386_insn): Add drex field.
+ (pi): Add debugging of drex field.
+ (md_assemble): Treat SSE5 like SSE3 in instructions with an
+ immediate byte. Move REX field to DREX if this is a DREX
+ instruction.
+ (process_operands): Add SSE5 support.
+ (build_modrm_byte): Ditto.
+ (output_insn): Ditto.
+ (cpu_arch): Ditto.
+ (i386_align_code): Ditto.
+
+2007-09-12 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (md_assemble): Move handling of extrq/insertq
+ after generic operand swapping, and swap only the immediate operands.
+
+2007-09-11 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
+ (m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV.
+
+2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * tc-i386.c (output_insn): Only check SSE4.2 and ABM for 3
+ byte opcode.
+
+2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_flags_check_x64): Renamed to ...
+ (cpu_flags_check_cpu64): This. Inline.
+ (uints_all_zero): New.
+ (uints_set): Likewise
+ (uints_equal): Likewise
+ (UINTS_ALL_ZERO): Likewise
+ (UINTS_SET): Likewise
+ (UINTS_CLEAR): Likewise
+ (UINTS_EQUAL): Likewise
+ (cpu_flags_and): Likewise.
+ (cpu_flags_or): Likewise.
+ (operand_type_and): Likewise.
+ (operand_type_or): Likewise.
+ (operand_type_xor): Likewise.
+ (cpu_flags_not): Inline and use switch instead of loop.
+ (cpu_flags_match): Updated.
+ (operand_type_match): Likewise.
+ (smallest_imm_type): Likewise.
+ (set_cpu_arch): Likewise.
+ (pt): Likewise.
+ (md_assemble): Likewise.
+ (parse_insn): Likewise.
+ (optimize_imm): Likewise.
+ (match_template): Likewise.
+ (process_suffix): Likewise.
+ (update_imm): Likewise.
+ (finalize_imm): Likewise.
+ (process_operands): Likewise.
+ (build_modrm_byte): Likewise.
+ (i386_immediate): Likewise.
+ (i386_displacement): Likewise.
+ (i386_index_check): Likewise.
+ (i386_operand): Likewise.
+ (i386_target_format): Likewise.
+ (intel_e11): Likewise.
+ (operand_type): Remove implicitregister.
+ (operand_type_check): Updated. Inline.
+ (cpu_flags_all_zero): Removed.
+ (operand_type_all_zero): Likewise.
+ (i386_array_biop): Likewise.
+ (cpu_flags_biop): Likewise.
+ (operand_type_biop): Likewise.
+
+2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.in (AC_CHECK_HEADERS): Add limits.h.
+ * configure: Regenerated.
+ * config.in: Likewise.
+
+ * config/tc-i386.c: Include "opcodes/i386-init.h".
+ (_i386_insn): Use i386_operand_type for types.
+ (cpu_arch_flags): Updated to new types with bitfield.
+ (cpu_arch_tune_flags): Likewise.
+ (cpu_arch_isa_flags): Likewise.
+ (cpu_arch): Likewise.
+ (i386_align_code): Likewise.
+ (set_code_flag): Likewise.
+ (set_16bit_gcc_code_flag): Likewise.
+ (set_cpu_arch): Likewise.
+ (md_assemble): Likewise.
+ (parse_insn): Likewise.
+ (process_operands): Likewise.
+ (output_branch): Likewise.
+ (output_jump): Likewise.
+ (parse_real_register): Likewise.
+ (mode_from_disp_size): Likewise.
+ (smallest_imm_type): Likewise.
+ (pi): Likewise.
+ (type_names): Likewise.
+ (pt): Likewise.
+ (pte): Likewise.
+ (swap_2_operands): Likewise.
+ (optimize_imm): Likewise.
+ (optimize_disp): Likewise.
+ (match_template): Likewise.
+ (check_string): Likewise.
+ (process_suffix): Likewise.
+ (check_byte_reg): Likewise.
+ (check_long_reg): Likewise.
+ (check_qword_reg): Likewise.
+ (check_word_reg): Likewise.
+ (finalize_imm): Likewise.
+ (build_modrm_byte): Likewise.
+ (output_insn): Likewise.
+ (disp_size): Likewise.
+ (imm_size): Likewise.
+ (output_disp): Likewise.
+ (output_imm): Likewise.
+ (gotrel): Likewise.
+ (i386_immediate): Likewise.
+ (i386_displacement): Likewise.
+ (i386_index_check): Likewise.
+ (i386_operand): Likewise.
+ (parse_real_register): Likewise.
+ (i386_intel_operand): Likewise.
+ (intel_e09): Likewise.
+ (intel_bracket_expr): Likewise.
+ (intel_e11): Likewise.
+ (cpu_arch_flags_not): New.
+ (cpu_flags_check_x64): Likewise.
+ (cpu_flags_all_zero): Likewise.
+ (cpu_flags_not): Likewise.
+ (i386_cpu_flags_biop): Likewise.
+ (cpu_flags_biop): Likewise.
+ (cpu_flags_match); Likewise.
+ (acc32): New.
+ (acc64): Likewise.
+ (control): Likewise.
+ (reg16_inoutportreg): Likewise.
+ (disp16): Likewise.
+ (disp32): Likewise.
+ (disp32s): Likewise.
+ (disp16_32): Likewise.
+ (anydisp): Likewise.
+ (baseindex): Likewise.
+ (regxmm): Likewise.
+ (imm8): Likewise.
+ (imm8s): Likewise.
+ (imm16): Likewise.
+ (imm32): Likewise.
+ (imm32s): Likewise.
+ (imm64): Likewise.
+ (imm16_32): Likewise.
+ (imm16_32s): Likewise.
+ (imm16_32_32s): Likewise.
+ (operand_type): Likewise.
+ (operand_type_check): Likewise.
+ (operand_type_match): Likewise.
+ (operand_type_register_match): Likewise.
+ (update_imm): Likewise.
+ (set_code_flag): Also update cpu_arch_flags_not.
+ (set_16bit_gcc_code_flag): Likewise.
+ (md_begin): Likewise.
+ (parse_insn): Use cpu_flags_check_x64 to check 64bit support.
+ Use cpu_flags_match to match instructions.
+ (i386_target_format): Update cpu_arch_isa_flags and
+ cpu_arch_tune_flags to i386_cpu_flags type with bitfield.
+ (smallest_imm_type): Check cpu_arch_tune to tune for i486.
+ (match_template): Don't initialize overlap0, overlap1,
+ overlap2, overlap3 and operand_types.
+ (process_suffix): Handle crc32 with 64bit register.
+ (MATCH): Removed.
+ (CONSISTENT_REGISTER_MATCH): Likewise.
+
+ * config/tc-i386.h (arch_entry): Updated to i386_cpu_flags
+ type.
+
+2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_template): Handle invlpga, vmload,
+ vmrun and vmsave in SVME.
+ (process_suffix): Likewise.
+
+2007-09-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_index_check): Don't use RegRex
+ on the reg_type field.
+ (parse_real_register): Use `||' instead of `|'.
+
+2007-09-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_operands): Remove segment override
+ check on SVME instructions.
+ (i386_index_check): Remove memory operand check on SVME
+ instructions.
+
+2007-09-04 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-spu.c (struct spu_insn): Delete "flag". Add "reloc".
+ (md_assemble): Update init of insn. Use insn.reloc instead of
+ calculating from flag.
+ (get_imm): Set reloc rather than flag.
+ (calcop): Formatting.
+
+2007-08-29 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * dwarf2dbg.c (dwarf2_directive_loc): Emit duplicate .loc directives.
+
+2007-08-28 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * doc/c-arc.texi: Fix typo.
+
+2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_suffix): Handle cmpxchg8b in
+ Intel mode.
+
+2007-08-28 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (mcf52235_ctrl): Add cache registers.
+ (mcf5253_ctrl): Add RAMBAR, MBAR, MBAR2.
+ (mcf5407_ctrl): New.
+ (m68k_cpus): Adjust 5407 entry.
+
+2007-08-28 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * config/tc-m68k.c (mcf51qe_ctrl): Define 51QE control registers.
+ (m68k_cpus): Define 51QE cpu.
+
+2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ * as.c (main): Flush stderr before printing listings to ensure
+ consistent output order across platforms.
+
+2007-08-28 Robert Sebastian Gerus <arachnist@gmail.com>
+
+ * configure.tgt: Add support for i[3-7]86-*-dragonfly*.
+
+2007-08-24 Joseph Myers <joseph@codesourcery.com>
+ Paul Brook <paul@codesourcery.com>
+
+ * remap.c: New.
+ * as.h (remap_debug_filename, add_debug_prefix_map): Declare.
+ * as.c (show_usage): Document --debug-prefix-map option.
+ (parse_args): Handle --debug-prefix-map.
+ * dwarf2dbg.c (out_file_list, out_debug_info): Remap debug paths.
+ * stabs.c (stabs_generate_asm_file): Remap debug paths.
+ * Makefile.am (GAS_CFILES): Add remap.c
+ (GENERIC_OBJS): Add remap.o.
+ Regenerate dependencies.
+ * Makefile.in: Regenerate.
+ * doc/as.texinfo (--debug-prefix-map): Document.
+
+2007-08-24 Aurelien Jarno <aurel32@debian.org>
+
+ * config/tc-arm.c (md_apply_fix): Cast bfd_vma values to long
+ before printing them.
+
+2007-08-24 Anders Waldenborg <anders@0x63.nu>
+ Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-i386.c (lex_got): Don't scan past a comma.
+
+2007-08-23 Ben Elliston <bje@au.ibm.com>
+
+ * config/tc-ppc.c (parse_cpu): Handle "750cl".
+ (pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
+ (md_show_usage): Document -m750cl.
+ (md_assemble): Handle two delimiters in succession (eg. `),').
+ * doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
+ * testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
+ * testsuite/gas/ppc/ppc750ps.s: New file.
+ * testsuite/gas/ppc/ppc750ps.d: Likewise.
+
+2007-08-23 Ben Elliston <bje@au.ibm.com>
+
+ * doc/c-arm.texi (ARM Directives): Move brackets out of @vars.
+
+2007-08-17 Alan Modra <amodra@bigpond.net.au>
+
+ PR gas/4079
+ * config/tc-i386.c (x86_cons): Complain about invalid @got etc.
+ expressions.
+ (i386_immediate): Detect and complain about more cases of
+ invalid immediate expressions. Return failure rather than
+ converting them to zero.
+ (i386_displacement): Likewise.
+
+2007-08-17 Alan Modra <amodra@bigpond.net.au>
+
+ * po/Make-in: Add --msgid-bugs-address to xgettext invocation.
+
+2007-08-14 Andreas Schwab <schwab@suse.de>
+
+ * config/tc-ia64.c (tc_gen_reloc): Return NULL if relocation is
+ unrepresentable.
+
+2007-08-12 Matthias Klose <doko@ubuntu.com>
+
+ * doc/Makefile.am (AM_MAKEINFOFLAGS, TEXI2DVI): Include
+ $(top_srcdir)/../../bfd/doc.
+ * doc/Makefile.in: Regenerate.
+
+2007-08-10 Nick Clifton <nickc@redhat.com>
+
+ * NEWS: Add a marker for the 2.18 features.
+
+2007-08-09 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (relaxed_symbol_addr): Compensate for alignment.
+
+2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb.
+
+2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (check_long_reg): Allow cvtss2si to convert
+ DWORD memory to Reg64 in Intel synax.
+ (check_qword_reg): Allow cvtsd2si to convert QWORD memory to
+ Reg32 in Intel syntax.
+
+2007-07-25 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (xtensa_extui_opcode): New.
+ (xg_expand_assembly_insn): Check for invalid extui operands.
+ (md_begin): Initialize xtensa_extui_opcode.
+
+2007-07-24 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-mep.h (skip_whitespace): Remove definition.
+
+2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Change i386 to PROCESSOR_I386.
+ (f32_15): Removed.
+ (jump_31): New.
+ (f32_patt): Remove f32_15.
+ (f16_patt): Likewise.
+ (i386_align_code): Updated to alt_long_patt for 64bit by
+ default.
+
+ * config/tc-i386.h (processor_type): Add PROCESSOR_I386.
+
+2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
+
+ * config/tc-i386.c (i386_align_code): Enable alignment up to
+ MAX_MEM_FOR_RS_ALIGN_CODE bytes. Remove special treatment
+ for K8.
+
+ * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Changed to 31.
+
+2007-07-20 Nick Clifton <nickc@redhat.com>
+
+ * app.c (do_scrub_chars): Provide a one character buffer to hold a
+ pushed back newline at the end of an unterminated quoted string.
+
+2007-07-14 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (create_register_alias): Return a boolean rather
+ than an integer.
+ Check the return value of insert_reg_alias and do not continue to
+ create aliases once an insertion has failed.
+ (s_unreq): Delete the all-upper-case and all-lower-case
+ alternatives as well.
+
+2007-07-12 Kai Tietz <kai.tietz@onevision.com>
+
+ * symbols.c: Print bfd_hostptr_t to file via fprintf_vma.
+ * write.c: Likewise.
+
+2007-07-11 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * config/tc-mips.c (mips_dwarf2_format, mips_dwarf2_addr_size): Use
+ HAVE_64BIT_SYMBOLS.
+
+2007-07-04 Richard Sandiford <richard@codesourcery.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add new entries for
+ {24k,24ke,34k,74k}f{2_1,1_1,x}. Also add an entry for 74kf3_2.
+ Deprecate *x and *fx.
+ * doc/c-mips.texi: Document the new CPU arguments. Deprecate
+ *x and *fx.
+
+2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/obj-coff.h (x86_64_target_format): Renamed to ...
+ (i386_target_format): This
+ (TARGET_FORMAT): Use i386_target_format.
+
+ * config/tc-i386.c (x86_64_target_format): Removed.
+ (i386_target_format): Handle PE formats.
+
+2007-07-04 Nick Clifton <nickc@redhat.com>
+
+ * symbols.c (symbol_relc_make_value): Use bfd_sprintf_vma in order
+ to get the right length of printed value.
+
+2007-07-03 Nick Clifton <nickc@redhat.com>
+
+ * COPYING: Replace with GPLv3 text.
+ * app.c: Update copyright notice to refer to GPLv3.
+ * as.c, as.h, asintl.h, atof_generic.c, bignum.h, bit_fix.h,
+ cgen.c, cond.c, debug.c, depend.c, dw2gencfi.c, dw2gencfi.h,
+ dwarf2dbg.c, dwarf2dbg.h, ecoff.c, ecoff.h, ehopt.c, emul.h,
+ emul_target.h, expr.c, expr.h, flonum-copy.c, flonum.h,
+ flonum-konst.c, frags.c, frags.h, hash.c, hash.h, input-file.c,
+ input-file.h, input-scrub.c, ibtl-lex.h, itbl-lex.l, itbl-ops.c,
+ itbl-ops.h, itbl-parse.y, listing.c, listing.h, literal.c,
+ macro.c, messages.c, obj.h, output-file.c, output-file.h, read.c,
+ read.h, sb.c, sb,h, stabs.c, struc-symbol.h, subsegs.c, subsegs.h,
+ symbols.c, symbols.h, tc.h, write.c, write.h, config/aout_gnu.h,
+ config/config/atof-ieee.c, config/atof-vax.c, config/bfin-aux.h,
+ config/bfin-defs.h, config/bfin-lex.l, config/bfin-parse.y,
+ config/itbl-mips.h, config/m68k-parse.h, config/m68k-parse.y,
+ config/obj-aout.c, config/obj-aout.h, config/obj-coff.c,
+ config/obj-coff.h, config/obj-ecoff.c, config/obj-ecoff.h,
+ config/obj-elf.c, config/obj-elf.h, config/obj-evax.c,
+ config/obj-evax.h, config/obj-multi.h, config/obj-som.c,
+ config/obj-som.h, config/tc-alpha.c, config/tc-alpha.h,
+ config/tc-arc.c, config/tc-arc.h, config/tc-arm.c,
+ config/tc-arm.h, config/tc-avr.c, config/tc-avr.h,
+ config/tc-bfin.c, config/tc-bfin.h, config/tc-cr16.c,
+ config/tc-cr16.h, config/tc-cris.c, config/tc-cris.h,
+ config/tc-crx.c, config/tc-crx.h, config/tc-d10v.c,
+ config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h,
+ config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.c,
+ config/tc-fr30.h, config/tc-frv.c, config/tc-frv.h,
+ config/tc-generic.c, config/tc-generic.h, config/tc-h8300.c,
+ config/tc-h8300.h, config/tc-hppa.c, config/tc-hppa.h,
+ config/tc-i370.c, config/tc-i370.h, config/tc-i386.c,
+ config/tc-i386.h, config/tc-i860.c, config/tc-i860.h,
+ config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c,
+ config/tc-ia64.h, config/tc-ip2k.c, config/tc-ip2k.h,
+ config/tc-iq2000.c, config/tc-iq2000.h, config/tc-m32c.c,
+ config/tc-m32c.h, config/tc-m32r.c, config/tc-m32r.h,
+ config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c,
+ config/tc-m68k.h, config/tc-maxq.c, config/tc-maxq.h,
+ config/tc-mcore.c, config/tc-mcore.h, config/tc-mep.c,
+ config/tc-mep.h, config/tc-mips.c, config/tc-mips.h,
+ config/tc-mmix.c, config/tc-mmix.h, config/tc-mn10200.c,
+ config/tc-mn10200.h, config/tc-mn10300.c, config/tc-mn10300.h,
+ config/tc-msp430.c, config/tc-msp430.h, config/tc-mt.c,
+ config/tc-mt.h, config/tc-ns32k.c, config/tc-ms32k.h,
+ config/tc-openrisc.c, config/tc-openrisc.h, config/tc-or32.c,
+ config/tc-or32.h, config/tc-pdp11.c, config/tc-pdp11.h,
+ config/tc-pj.c, config/tc-pj.h, config/tc-ppc.c, config/tc-ppc.h,
+ config/tc-s390.c, config/tc-s390.h, config/tc-score.c,
+ config/tc-score.h, config/tc-sh64.c, config/tc-sh64.h,
+ config/tc-sh.c, config/tc-sh.h, config/tc-sparc.c,
+ config/tc-sparc.h, config/tc-spu.c, config/tc-spu.h,
+ config/tc-tic30.c, config/tc-tic30.h, config/tc-tic4x.c,
+ config/tc-tic4x.h, config/tc-tic54x.c, config/tc-tic54x.h,
+ config/tc-v850.c, config/tc-v850.h, config/tc-vax.c,
+ config/tc-vax.h, config/tc-xc16x.c, config/tc-x16x.h,
+ config/tc-xstormy16.c, config/tc-xstormy16.h, config/tc-xtensa.c,
+ config/tc-xtensa.h, config/tc-z80.c, config/tc-z80.h,
+ config/tc-z8k.c, config/tc-z8k.h, config/te-386bsd.h,
+ config/te-freebsd.h, config/te-hppa.h, config/te-irix.h,
+ config/te-netware.h, config/te-sparcaout.h, config/te-tmips.h,
+ config/te-vxworks.h, config/vax-inst.h, config/xtensa-istack.h,
+ config/xtensa-relax.c, config/xtensa-relax.h: Likewise.
+
+ * flonum-mult.c: Likewise, and also correct typo referring to
+ non-existant GNU Assembler General Public License.
+ * config/tc-m68851.h: Likewise.
+ * NEWS: Mention the new license. Also note where the 2.17 release
+ happened.
+ * config/e-crisaout.c: Add copyright header.
+ * config/e-criself.c, config/e-i386aout.c, config/e-i386coff.c,
+ config/e-i386elf.c, config/e-mipscoff.c, config/e-mipself.c,
+ config/obj-multi.c, config/te-aix5.h, config/te-armeabi.h,
+ config/te-armlinuxeabi.h, config/te-dynix.h, config/te-epoc-pe.h,
+ config/te-generic.h, config/te-gnu.h, config/te-go32.h,
+ config/te-hppa64.h, config/te-hppalinux64.h, config/te-hpux.h,
+ config/te-i386aix.h, config/te-ia64aix.h, config/te-interix.h,
+ config/te-linux.h, config/te-lnews.h, config/te-lynx.h,
+ config/te-mach.h, config/te-macos.h, config/te-nbsd532.h,
+ config/te-nbsd.h, config/te-pc532mach.h, config/te-pe.h,
+ config/te-pep.h, config/te-psos.h, config/te-riscix.h,
+ config/te-sun3.h, config/te-svr4.h, config/te-symbian.h,
+ config/te-wince-pe.h: Likewise.
+
+2007-07-03 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (m68k_ip): Add j & K operand types.
+ (install_operand): Add E encoding.
+ (md_begin): Check and skip initial '.' arg character.
+ (get_num): Add 0..511 case.
+
+2007-07-03 Alan Modra <amodra@bigpond.net.au>
+
+ PR 4713
+ * config/obj-elf.c (elf_ecoff_set_ext): Make static when OBJ_MAYBE_ELF.
+ * config/obj-elf.h (obj_ecoff_set_ext): Comment.
+
+2007-07-03 Mikkel Lauritsen <renard@nospam.dk>
+
+ PR 4722
+ * app.c (do_scrub_chars <state 5>): Check for output buffer full
+ after memcpy.
+
+2007-07-02 Joseph Myers <joseph@codesourcery.com>
+
+ * config/tc-mips.c (s_dtprelword, s_dtpreldword,
+ s_dtprel_internal): New.
+ (mips_pseudo_table): Add .dtprelword and .dtpreldword.
+ (md_apply_fix): Handle BFD_RELOC_MIPS_TLS_DTPREL32 and
+ BFD_RELOC_MIPS_TLS_DTPREL64.
+
+2007-07-02 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * config.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+ * po/gas.pot: Regenerate.
+
+2007-07-02 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.c (ppc_pe_section): Comment out code assigning
+ coff section flag values to bfd section flag.
+
+2007-06-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * aclocal.m4: Regenerated.
+ * doc/Makefile.in: Likewise.
+ * Makefile.in: Likewise.
+
+2007-06-29 Joseph Myers <joseph@codesourcery.com>
+
+ * as.c (main): Only call create_obj_attrs_section if IS_ELF.
+
+2007-06-29 Joseph Myers <joseph@codesourcery.com>
+
+ * as.c (create_obj_attrs_section): New.
+ (main): Call create_obj_attrs_section for ELF.
+ * read.c (s_gnu_attribute, skip_whitespace, skip_past_char,
+ skip_past_comma, s_vendor_attribute): New.
+ (potable): Add gnu_attribute for ELF.
+ * read.h (s_vendor_attribute): Declare.
+ * config/tc-arm.c (s_arm_eabi_attribute): Replace by wrapper
+ round s_vendor_attribute.
+ (aeabi_set_public_attributes): Update for new attributes
+ interfaces.
+ (arm_md_end): Remove attributes contents setting now done
+ generically.
+
+2007-06-29 M R Swami Reddy <MR.Swami.Redd@nsc.com>
+
+ * Makefile.am: Add CR16 related entry.
+ * Makefile.in: Regenerate.
+ * config/tc-cr16.h: New file
+ * config/tc-cr16.c: New file
+ * doc/c-cr16.texi: New file for cr16
+ * doc/all.texi: Entry for cr16
+ * doc/Makefile.am: Added c-cr16.texi
+ * doc/Makefile.in: Regenerate
+ * doc/as.texinfo: Entry for CR16 target
+ * NEWS: Announce the support for the new target.
+
+2007-06-26 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (parse_operands): Accept generic coprocessor regs
+ for OP_RVC.
+ (reg_names): Add fpinst, pfinst2, mvfr0 and mvfr1.
+
+2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_operands): Replace regKludge
+ with RegKludge.
+
+2007-06-25 Richard Sandiford <richard@codesourcery.com>
+
+ * config/tc-mips.h (TC_SYMFIELD_TYPE): New.
+ * config/tc-mips.c (append_insn): Record which symbols have
+ R_MIPS16_26 relocations against them.
+ (mips_fix_adjustable): Don't reduce relocations against such symbols.
+
+2007-06-22 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (xg_assembly_relax): Comment termination rules.
+ (frag_format_size): Handle RELAX_IMMED_STEP3.
+ (xtensa_relax_frag, md_convert_frag): Likewise.
+ * config/tc-xtensa.h (xtensa_relax_statesE): Add RELAX_IMMED_STEP3.
+ (RELAX_IMMED_MAXSTEPS): Adjust.
+ * config/xtensa-relax.c (widen_spec_list): Add transitions from
+ wide branches to branch-over-jumps.
+ (build_transition): Handle wide branches in transition patterns.
+
+2007-06-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (disp_size): New.
+ (imm_size): Likewise.
+ (output_disp): Use disp_size and imm_size.
+ (output_imm): Use imm_size.
+
+2007-06-19 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.h (struct xtensa_frag_type): Update comment about
+ use of literal_frag field.
+ * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Record frag
+ in the literal_frag field.
+ (xtensa_move_literals): Use it here instead of searching. Update
+ literal_frag field with new value.
+
+2007-06-14 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_t_mov_cmp): Handle shift by register and
+ narrow shift by immediate.
+
+2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
+
+ * acinclude.m4: Don't include m4 files.
+ (BFD_BINARY_FOPEN): Removed.
+ Remove libtool kludge.
+
+ * Makefile.in: Regenerated.
+ * doc/Makefile.in: Likewise.
+ * aclocal.m4: Likewise.
+ * configure: Likewise.
+
+2007-06-11 Sterling Augustine <sterling@tensilica.com>
+ Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (XTENSA_PROP_INSN_NO_TRANSFORM): Renamed to...
+ (XTENSA_PROP_NO_TRANSFORM): ...this.
+ (frag_flags_struct): Move is_no_transform out of the insn sub-struct.
+ (xtensa_mark_frags_for_org): New.
+ (xtensa_handle_align): Set RELAX_ORG frag subtype for rs_org.
+ (xtensa_post_relax_hook): Call xtensa_mark_frags_for_org.
+ (get_frag_property_flags): Adjust reference to is_no_transform flag.
+ (xtensa_frag_flags_combinable): Likewise.
+ (frag_flags_to_number): Likewise. Use XTENSA_PROP_NO_TRANSFORM.
+ * config/tc-xtensa.h (xtensa_relax_statesE): Add RELAX_ORG.
+
2007-06-06 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (s_align): Pad code sections appropriately.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
-2006-01-04 Julian Brown <julian@codesourcery.com>
+2007-01-04 Julian Brown <julian@codesourcery.com>
* config/tc-arm.c (do_neon_shl_imm): Swap rN, rM.
(do_neon_qshl_imm): Likewise.