x86: add missing pseudo ops for VPCLMULQDQ ISA extension

[deliverable/binutils-gdb.git] / gas / ChangeLog

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 664cd145ca8a662a8645b2a6eda956acb06bc68e..0a7c2a09344031c89afe3483a91190d0373345be 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,26 @@
+2019-07-01  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/avx512f_vpclmulqdq.s,
+       testsuite/gas/i386/avx512vl_vpclmulqdq.s,
+       testsuite/gas/i386/vpclmulqdq.s,
+       testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s,
+       testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Add pseudo ops.
+       * testsuite/gas/i386/x86-64-vpclmulqdq.s: Likewise. Don't use
+       high 16 [xy]mm registers.
+       * testsuite/gas/i386/avx512f_vpclmulqdq.d,
+       testsuite/gas/i386/avx512f_vpclmulqdq-intel.d,
+       testsuite/gas/i386/avx512vl_vpclmulqdq.d,
+       testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d,
+       testsuite/gas/i386/vpclmulqdq.d,
+       testsuite/gas/i386/vpclmulqdq-intel.d,
+       testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d,
+       testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d,
+       testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d,
+       testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d,
+       testsuite/gas/i386/x86-64-vpclmulqdq.d,
+       testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Adjust
+       expectations.
+
 2019-07-01  Jan Beulich  <jbeulich@suse.com>
 
        * tc-i386.c (output_disp, output_imm): Use encoding_length.