+Wed Feb 12 14:36:29 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (mips_pseudo_table): Add "insn".
+ (s_insn): New static function.
+ * doc/c-mips.texi: Document .insn.
+
+ * config/tc-mips.c (md_begin): Add the general registers to the
+ symbol table.
+ (mips16_ip): First parse the expression, and then see whether it
+ came up with a register, rather than trying to first see whether
+ we are looking at a register.
+
+start-sanitize-tic80
+Tue Feb 11 15:13:39 1997 Fred Fish <fnf@cygnus.com>
+
+ * config/tc-tic80.c: Numerous changes and additions to flesh
+ out functions that were previously just stubs, and fix some
+ problems found using the new TIc80 testsuite cases.
+
+end-sanitize-tic80
+Tue Feb 11 15:52:22 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (mips16_ip): Handle %gprel modifier.
+ (md_apply_fix): Handle BFD_RELOC_MIPS16_GPREL.
+
+ * config/tc-mips.c (append_insn): Output jump instruction as a
+ pair of 2 byte instructions, rather than as a single 4 byte
+ instruction.
+
+start-sanitize-r5900
+ * config/tc-mips.c (md_begin): Correct test of mips_5900.
+ (mips_ip): Don't check INSN_ISA for a macro.
+
+end-sanitize-r5900
+start-sanitize-r5900
+Fri Feb 7 11:11:06 1997 Gavin Koch <gavin@cygnus.com>
+
+ * config/tc-mips.c: added r5900.
+
+end-sanitize-r5900
+Mon Feb 10 22:06:00 1997 Dawn Perchik (dawn@cygnus.com)
+
+ * itbl-ops.c, itbl-lex.l, itbl-parse.y, itbl-ops.h,
+ config/itbl-mips.h: Add copyright message and fix indentation.
+
+Mon Feb 10 18:09:00 1997 Dawn Perchik (dawn@cygnus.com)
+
+ * itbl-ops.c: New file. Add support for dynamically read
+ instruction registers, opcodes and formats. Build internal table
+ for new instructions and provide callbacks for assembler and
+ disassembler.
+ * itbl-lex.l, itbl-parse.y: Lex and yacc parsers for instruction
+ spec table.
+ * itbl-ops.h: New file. Header file for itbl support.
+ * config/itbl-mips.h: New file. Mips specific definitions for
+ itbl support.
+
+Fri Feb 7 09:52:34 1997 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10200.c (md_assemble): If a constant operand won't
+ fit into the constant field of a relaxable operand, then it does
+ not match.
+
+Thu Feb 6 20:08:12 1997 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10200.c (md_estimate_size_before_relax): Treat
+ a jsr target in a different section just like a jsr to
+ an undefined target.
+
+Thu Feb 6 16:52:57 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Don't adjust relocations
+ against any mips16 symbols, not just externally visible ones.
+ (md_apply_fix): Corresponding change.
+
+Wed Feb 5 11:11:06 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (mips16_ip): Accept floating point registers in
+ the operand of the exit instruction.
+
+Tue Feb 4 14:12:39 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * symbols.c (resolve_symbol_value): If we leave an equated symbol
+ as O_symbol, copy over the segment.
+
Mon Feb 3 12:35:54 1997 Ian Lance Taylor <ian@cygnus.com>
+ * config/tc-mips.c (md_apply_fix): If we aren't adjusting this
+ fixup to be against the section symbol, adjust the value
+ accordingly.
+
* symbols.c (resolve_symbol_value): Don't change X_add_number for
an equated symbol.
* write.c (write_relocs): Avoid looping on equated symbols.