+2016-08-19 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-arm.c (do_co_reg2c): Added constraint.
+ * testsuite/gas/arm/dest-unpredictable.s: New.
+ * testsuite/gas/arm/dest-unpredictable.l: New.
+ * testsuite/gas/arm/dest-unpredictable.d: New.
+
+2016-08-19 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/i386/ilp32/x86-64-unwind.d: Adjust expected
+ ordering of sections.
+ * testsuite/gas/i386/x86-64-unwind.d: Likewise.
+ * testsuite/gas/ia64/alias-ilp32.d: Likewise.
+ * testsuite/gas/ia64/alias.d: Likewise.
+ * testsuite/gas/ia64/group-1.d: Likewise.
+ * testsuite/gas/ia64/group-2.d: Likewise.
+ * testsuite/gas/ia64/secname-ilp32.d: Likewise.
+ * testsuite/gas/ia64/secname.d: Likewise.
+ * testsuite/gas/ia64/unwind-ilp32.d: Likewise.
+ * testsuite/gas/ia64/unwind.d: Likewise.
+ * testsuite/gas/ia64/xdata-ilp32.d: Likewise.
+ * testsuite/gas/ia64/xdata.d: Likewise.
+ * testsuite/gas/mmix/bspec-1.d: Likewise.
+ * testsuite/gas/mmix/bspec-2.d: Likewise.
+ * testsuite/gas/mmix/byte-1.d: Likewise.
+ * testsuite/gas/mmix/loc-1.d: Likewise.
+ * testsuite/gas/mmix/loc-2.d: Likewise.
+ * testsuite/gas/mmix/loc-3.d: Likewise.
+ * testsuite/gas/mmix/loc-4.d: Likewise.
+ * testsuite/gas/mmix/loc-5.d: Likewise.
+ * testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
+
+2016-08-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/tc-aarch64.c (parse_aarch64_imm_float): Reject -0.0.
+ * testsuite/gas/aarch64/illegal.s, testsuite/gas/aarch64/illegal.l:
+ Add tests for -0.0. Add an end-of-file comment.
+
+2016-08-05 Nick Clifton <nickc@redhat.com>
+
+ PR gas/20429
+ * config/tc-arm.c (do_vfp_nsyn_push): Check that no more than 16
+ registers are pushed.
+ (do_vfp_nsyn_pop): Check that no more than 16 registers are
+ popped.
+ * testsuite/gas/arm/pr20429.s: New test.
+ * testsuite/gas/arm/pr20429.d: New test driver.
+ * testsuite/gas/arm/pr20429.1: Expected error output.
+
+ PR gas/20364
+ * config/tc-aarch64.c (s_ltorg): Change the mapping state after
+ aligning the frag.
+ (aarch64_init): Treat rs_align frags in code sections as
+ containing code, not data.
+ * testsuite/gas/aarch64/pr20364.s: New test.
+ * testsuite/gas/aarch64/pr20364.d: New test driver.
+
+2016-08-04 Stefan Trleman <stefan.teleman@oracle.com>
+
+ PR gas/20427
+ * config/tc-sparc.c (cons_fix_new_sparc): Prevent the generation
+ of 64-bit relocation types when assembling for a 32-bit Solaris
+ target.
+
+2016-07-27 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/sparc/sparc.exp: Use is_elf_format to discriminate
+ ELF targets.
+ Run natural, natural-32, pr4587, ticc-imm-reg, v8-movwr-imm,
+ pause, save-args, cbcond, cfr, crypto edge, flush, hpcvis3, ima,
+ ld_st_fsr, ldtw_sttw, ldd_std, ldx_stx, ldx_efsr, mwait, mcdper,
+ sparc5vis4, xcrypto, v9branch1 and imm-plus-rreg only in ELF
+ targets.
+ (sparc_elf_setup): Delete.
+ * testsuite/gas/sparc/save-args.d: Fix a copy-paste typo in the
+ test's #name entry.
+
+2016-07-27 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag.
+ (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16)
+ (RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16)
+ (RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32)
+ (RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits.
+ (get_append_method): Also return APPEND_ADD_COMPACT for
+ microMIPS instructions.
+ (find_altered_mips16_opcode): Exclude macros from matching.
+ Factor code out...
+ (find_altered_opcode): ... to this new function.
+ (find_altered_micromips_opcode): New function.
+ (frag_branch_delay_slot_size): Likewise.
+ (append_insn): Handle microMIPS branch/jump compaction.
+ (macro_start): Likewise.
+ (relaxed_micromips_32bit_branch_length): Likewise.
+ (md_convert_frag): Likewise.
+ * testsuite/gas/mips/micromips.s: Add conditional explicit NOPs
+ for delay slot filling.
+ * testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for
+ delay slot filling.
+ * testsuite/gas/mips/micromips-size-1.s: Likewise.
+ * testsuite/gas/mips/micromips.l: Adjust line numbers.
+ * testsuite/gas/mips/micromips-warn.l: Likewise.
+ * testsuite/gas/mips/micromips-size-1.l: Likewise.
+ * testsuite/gas/mips/micromips.d: Adjust padding.
+ * testsuite/gas/mips/micromips-trap.d: Likewise.
+ * testsuite/gas/mips/micromips-insn32.d: Likewise.
+ * testsuite/gas/mips/micromips-noinsn32.d: Likewise.
+ * testsuite/gas/mips/micromips@beq.d: Update patterns for
+ branch/jump compaction.
+ * testsuite/gas/mips/micromips@bge.d: Likewise.
+ * testsuite/gas/mips/micromips@bgeu.d: Likewise.
+ * testsuite/gas/mips/micromips@blt.d: Likewise.
+ * testsuite/gas/mips/micromips@bltu.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-4.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d:
+ Likewise.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d:
+ Likewise.
+ * testsuite/gas/mips/micromips@loc-swap.d: Likewise.
+ * testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise.
+ * testsuite/gas/mips/micromips@relax.d: Likewise.
+ * testsuite/gas/mips/micromips@relax-at.d: Likewise.
+ * testsuite/gas/mips/micromips@relax-swap3.d: Likewise.
+ * testsuite/gas/mips/branch-extern-2.d: Likewise.
+ * testsuite/gas/mips/branch-extern-4.d: Likewise.
+ * testsuite/gas/mips/branch-section-2.d: Likewise.
+ * testsuite/gas/mips/branch-section-4.d: Likewise.
+ * testsuite/gas/mips/branch-weak-2.d: Likewise.
+ * testsuite/gas/mips/branch-weak-5.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-addend.d:
+ Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
+ Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
+ Likewise.
+ * testsuite/gas/mips/micromips-compact.d: New test.
+ * testsuite/gas/mips/mips.exp: Run the new test.
+
+2016-07-27 Graham Markall <graham.markall@embecosm.com>
+
+ * config/tc-arc.c: Add new global arc_addrtype_hash.
+ Define O_colon and O_addrtype.
+ (debug_exp): Add O_colon and O_addrtype.
+ (tokenize_arguments): Handle colon and address type
+ tokens.
+ (declare_addrtype): New function.
+ (md_begin): Initialise arc_addrtype_hash.
+ (arc_parse_name): Add lookup of address types.
+ (assemble_insn): Handle colons and address types by
+ ignoring them.
+ * testsuite/gas/arc/nps400-8.s: New file.
+ * testsuite/gas/arc/nps400-8.d: New file.
+ * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests.
+ * testsuite/gas/arc/nps400-8.d: Add expected PMU
+ instruction output.
+
+2016-07-26 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `insn32' flag.
+ (RELAX_MICROMIPS_INSN32): New macro.
+ (RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT)
+ (RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_RELAX32)
+ (RELAX_MICROMIPS_TOOFAR16, RELAX_MICROMIPS_MARK_TOOFAR16)
+ (RELAX_MICROMIPS_CLEAR_TOOFAR16, RELAX_MICROMIPS_TOOFAR32)
+ (RELAX_MICROMIPS_MARK_TOOFAR32, RELAX_MICROMIPS_CLEAR_TOOFAR32):
+ Shift bits.
+ (append_insn): Record `mips_opts.insn32' with relaxed microMIPS
+ branches.
+ (relaxed_micromips_32bit_branch_length): Handle the `insn32'
+ mode.
+ (md_convert_frag): Likewise.
+ * testsuite/gas/mips/micromips-branch-relax.s: Add `insn32'
+ conditionals.
+ * testsuite/gas/mips/micromips-branch-relax.l: Update line
+ numbers accordingly.
+ * testsuite/gas/mips/micromips-branch-relax-pic.l: Likewise.
+ * testsuite/gas/mips/micromips-branch-relax-insn32.d: New test.
+ * testsuite/gas/mips/micromips-branch-relax-insn32-pic.d: New
+ test.
+ * testsuite/gas/mips/micromips-branch-relax-insn32.l: New
+ stderr output.
+ * testsuite/gas/mips/micromips-branch-relax-insn32-pic.l: New
+ stderr output.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/dsp.d: New file.
+ * testsuite/gas/arc/dsp.s: Likewise.
+ * testsuite/gas/arc/fpu.d: Likewise.
+ * testsuite/gas/arc/fpu.s: Likewise.
+ * testsuite/gas/arc/ext2op.d: Add specific disassembler option.
+ * testsuite/gas/arc/ext3op.d: Likewise.
+ * testsuite/gas/arc/tdpfp.d: Likewise.
+ * testsuite/gas/arc/tfpuda.d: Likewise.
+
+2016-07-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_force_relocation): Remove
+ R_MIPS_PC26_S2 and R_MIPS_PC21_S2.
+
+2016-07-19 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
+ Adjust comments for BAL to JALX linker conversion.
+ (fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
+ * testsuite/gas/mips/unaligned-branch-1.l: Update error messages
+ expected.
+ * testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
+ * testsuite/gas/mips/branch-local-4.d: New test.
+ * testsuite/gas/mips/branch-local-n32-4.d: New test.
+ * testsuite/gas/mips/branch-local-n64-4.d: New test.
+ * testsuite/gas/mips/branch-addend.d: New test.
+ * testsuite/gas/mips/branch-addend-n32.d: New test.
+ * testsuite/gas/mips/branch-addend-n64.d: New test.
+ * testsuite/gas/mips/branch-local-4.s: New test source.
+ * testsuite/gas/mips/branch-addend.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-19 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_force_relocation): Also retain branch
+ relocations against MIPS16 and microMIPS symbols.
+ (fix_bad_cross_mode_jump_p): New function.
+ (fix_bad_same_mode_jalx_p): Likewise.
+ (fix_bad_misaligned_jump_p): Likewise.
+ (fix_bad_cross_mode_branch_p): Likewise.
+ (fix_bad_misaligned_branch_p): Likewise.
+ (fix_validate_branch): Likewise.
+ (md_apply_fix) <BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS16_JMP>
+ <BFD_RELOC_MICROMIPS_JMP>: Separate from BFD_RELOC_MIPS_SHIFT5,
+ etc. Verify the ISA mode and alignment of the jump target.
+ <BFD_RELOC_MIPS_21_PCREL_S2>: Replace the inline alignment check
+ with a call to `fix_validate_branch'.
+ <BFD_RELOC_MIPS_26_PCREL_S2>: Likewise.
+ <BFD_RELOC_16_PCREL_S2>: Likewise.
+ <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
+ <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Retain the original addend.
+ Verify the ISA mode and alignment of the branch target.
+ (md_convert_frag): Verify the ISA mode and alignment of resolved
+ MIPS16 branch targets.
+ * testsuite/gas/mips/branch-misc-1.s: Annotate non-instruction
+ branch targets with `.insn'.
+ * testsuite/gas/mips/branch-misc-5.s: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5-64.d: Update
+ accordingly.
+ * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-relax.s: Annotate
+ non-instruction branch target with `.insn'.
+ * testsuite/gas/mips/micromips.s: Replace microMIPS JALX targets
+ with external symbols.
+ * testsuite/gas/mips/micromips-insn32.d: Update accordingly.
+ * testsuite/gas/mips/micromips-noinsn32.d: Likewise.
+ * testsuite/gas/mips/micromips-trap.d: Likewise.
+ * testsuite/gas/mips/micromips.d: Likewise.
+ * testsuite/gas/mips/mips16.s: Annotate non-instruction branch
+ targets with `.insn'.
+ * testsuite/gas/mips/mips16.d: Update accordingly.
+ * testsuite/gas/mips/mips16-64.d: Likewise.
+ * testsuite/gas/mips/mips16-dwarf2.s: Annotate non-instruction
+ branch target with `.insn'.
+ * testsuite/gas/mips/relax-swap3.s: Likewise.
+ * testsuite/gas/mips/branch-local-2.l: New list test.
+ * testsuite/gas/mips/branch-local-3.l: New list test.
+ * testsuite/gas/mips/branch-local-n32-2.l: New list test.
+ * testsuite/gas/mips/branch-local-n32-3.l: New list test.
+ * testsuite/gas/mips/branch-local-n64-2.l: New list test.
+ * testsuite/gas/mips/branch-local-n64-3.l: New list test.
+ * testsuite/gas/mips/unaligned-jump-1.l: New list test.
+ * testsuite/gas/mips/unaligned-jump-2.l: New list test.
+ * testsuite/gas/mips/unaligned-jump-3.d: New test.
+ * testsuite/gas/mips/unaligned-jump-mips16-1.l: New list test.
+ * testsuite/gas/mips/unaligned-jump-mips16-2.l: New list test.
+ * testsuite/gas/mips/unaligned-jump-mips16-3.d: New test.
+ * testsuite/gas/mips/unaligned-jump-micromips-1.l: New list
+ test.
+ * testsuite/gas/mips/unaligned-jump-micromips-2.l: New list
+ test.
+ * testsuite/gas/mips/unaligned-jump-micromips-3.d: New test.
+ * testsuite/gas/mips/unaligned-branch-1.l: New list test.
+ * testsuite/gas/mips/unaligned-branch-2.l: New list test.
+ * testsuite/gas/mips/unaligned-branch-3.d: New test.
+ * testsuite/gas/mips/unaligned-branch-r6-1.l: New list test.
+ * testsuite/gas/mips/unaligned-branch-r6-2.l: New list test.
+ * testsuite/gas/mips/unaligned-branch-r6-3.l: New list test.
+ * testsuite/gas/mips/unaligned-branch-r6-4.l: New list test.
+ * testsuite/gas/mips/unaligned-branch-r6-5.d: New test.
+ * testsuite/gas/mips/unaligned-branch-r6-6.d: New test.
+ * testsuite/gas/mips/unaligned-branch-mips16-1.l: New list test.
+ * testsuite/gas/mips/unaligned-branch-mips16-2.l: New list test.
+ * testsuite/gas/mips/unaligned-branch-mips16-3.d: New test.
+ * testsuite/gas/mips/unaligned-branch-micromips-1.l: New list
+ test.
+ * testsuite/gas/mips/unaligned-branch-micromips-2.l: New list
+ test.
+ * testsuite/gas/mips/unaligned-branch-micromips-3.d: New test.
+ * testsuite/gas/mips/branch-local-2.s: New test source.
+ * testsuite/gas/mips/branch-local-3.s: New test source.
+ * testsuite/gas/mips/branch-local-n32-2.s: New test source.
+ * testsuite/gas/mips/branch-local-n32-3.s: New test source.
+ * testsuite/gas/mips/branch-local-n64-2.s: New test source.
+ * testsuite/gas/mips/branch-local-n64-3.s: New test source.
+ * testsuite/gas/mips/unaligned-jump-1.s: New test source.
+ * testsuite/gas/mips/unaligned-jump-2.s: New test source.
+ * testsuite/gas/mips/unaligned-jump-mips16-1.s: New test source.
+ * testsuite/gas/mips/unaligned-jump-mips16-2.s: New test source.
+ * testsuite/gas/mips/unaligned-jump-micromips-1.s: New test
+ source.
+ * testsuite/gas/mips/unaligned-jump-micromips-2.s: New test
+ source.
+ * testsuite/gas/mips/unaligned-branch-1.s: New test source.
+ * testsuite/gas/mips/unaligned-branch-2.s: New test source.
+ * testsuite/gas/mips/unaligned-branch-r6-1.s: New test source.
+ * testsuite/gas/mips/unaligned-branch-r6-2.s: New test source.
+ * testsuite/gas/mips/unaligned-branch-r6-3.s: New test source.
+ * testsuite/gas/mips/unaligned-branch-r6-4.s: New test source.
+ * testsuite/gas/mips/unaligned-branch-mips16-1.s: New test
+ source.
+ * testsuite/gas/mips/unaligned-branch-mips16-2.s: New test
+ source.
+ * testsuite/gas/mips/unaligned-branch-micromips-1.s: New test
+ source.
+ * testsuite/gas/mips/unaligned-branch-micromips-2.s: New test
+ source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-19 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-nds32.c (struct nds32_pseudo_opcode): Make pseudo_val
+ unsigned int.
+ (do_pseudo_b): Adjust.
+ (do_pseudo_bal): Likewise.
+ (do_pseudo_bge): Likewise.
+ (do_pseudo_bges): Likewise.
+ (do_pseudo_bgt): Likewise.
+ (do_pseudo_bgts): Likewise.
+ (do_pseudo_ble): Likewise.
+ (do_pseudo_bles): Likewise.
+ (do_pseudo_blt): Likewise.
+ (do_pseudo_blts): Likewise.
+ (do_pseudo_br): Likewise.
+ (do_pseudo_bral): Likewise.
+ (do_pseudo_la): Likewise.
+ (do_pseudo_li): Likewise.
+ (do_pseudo_ls_bhw): Likewise.
+ (do_pseudo_ls_bhwp): Likewise.
+ (do_pseudo_ls_bhwpc): Likewise.
+ (do_pseudo_ls_bhwi): Likewise.
+ (do_pseudo_move): Likewise.
+ (do_pseudo_neg): Likewise.
+ (do_pseudo_not): Likewise.
+ (do_pseudo_pushpopm): Likewise.
+ (do_pseudo_pushpop): Likewise.
+ (do_pseudo_v3push): Likewise.
+ (do_pseudo_v3pop): Likewise.
+ (do_pseudo_pushpop_stack): Likewise.
+ (do_pseudo_push_bhwd): Likewise.
+ (do_pseudo_pop_bhwd): Likewise.
+ (do_pseudo_pusha): Likewise.
+ (do_pseudo_pushi): Likewise.
+
+2016-07-19 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-sparc.c (struct pop_entry): Make the type of reloc
+ bfd_reloc_code_real_type.
+
+2016-07-19 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-sparc.c (pop_table): Remove sentinel.
+ (NUM_PERC_ENTRIES): Use ARRAY_SIZE on pop_table.
+ (md_begin): Adjust.
+
+2016-07-19 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-z8k.c (newfix): Make type of type argument
+ bfd_reloc_code_real_type.
+ (apply_fix): Likewise.
+
+2016-07-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-epiphany.c: Don't include libbfd.h.
+ * config/tc-frv.c: Likewise.
+ * config/tc-ip2k.c: Likewise.
+ * config/tc-iq2000.c: Likewise.
+ * config/tc-m32c.c: Likewise.
+ * config/tc-mep.c: Likewise.
+ * config/tc-mt.c: Likewise.
+ * config/tc-nios2.c: Likewise.
+
+2016-07-16 Alan Modra <amodra@gmail.com>
+
+ * config/bfin-parse.y: Don't include libbfd.h.
+ * config/tc-bfin.c: Likewise.
+ * config/tc-rl78.c: Likewise.
+ * config/tc-rx.c: Likewise.
+ * config/tc-metag.c: Likewise.
+ (create_dspreg_htabs, create_scond_htab): Use gas_assert not BFD_ASSERT.
+ * Makefile.am: Update dependencies.
+ * Makefile.in: Regenerate.
+
+2016-07-14 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.h (TC_FORCE_RELOCATION_ABS): New macro.
+ (mips_force_relocation_abs): New prototype.
+ * config/tc-mips.c (mips_force_relocation_abs): New function.
+ * testsuite/gas/mips/branch-absolute.d: Adjust dump patterns.
+ * testsuite/gas/mips/mips16-branch-absolute.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
+ Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
+ Likewise.
+ * testsuite/gas/mips/branch-absolute-addend.d: New test.
+ * testsuite/gas/mips/mips16-branch-absolute-addend.d: New test.
+ * testsuite/gas/mips/micromips-branch-absolute-addend.d: New
+ test.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-14 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1>
+ <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
+ <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the
+ addend calculated.
+ * testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit
+ in `bar', export `foo'.
+ * testsuite/gas/mips/mips16-branch-absolute.d: Adjust
+ accordingly.
+ * testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise.
+ * testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise.
+ * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d:
+ Likewise.
+
+2016-07-14 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/mips16-branch-absolute.d: Update patterns.
+ * testsuite/gas/mips/branch-absolute.d: New test.
+ * testsuite/gas/mips/branch-absolute-n32.d: New test.
+ * testsuite/gas/mips/branch-absolute-n64.d: New test.
+ * testsuite/gas/mips/branch-absolute-addend-n32.d: New test.
+ * testsuite/gas/mips/branch-absolute-addend-n64.d: New test.
+ * testsuite/gas/mips/mips16-branch-absolute-n32.d: New test.
+ * testsuite/gas/mips/mips16-branch-absolute-n64.d: New test.
+ * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: New
+ test.
+ * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: New
+ test.
+ * testsuite/gas/mips/micromips-branch-absolute.d: New test.
+ * testsuite/gas/mips/micromips-branch-absolute-n32.d: New test.
+ * testsuite/gas/mips/micromips-branch-absolute-n64.d: New test.
+ * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: New
+ test.
+ * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: New
+ test.
+ * testsuite/gas/mips/branch-absolute.s: New test source.
+ * testsuite/gas/mips/branch-absolute-addend.s: New test source.
+ * testsuite/gas/mips/mips16-branch-absolute-addend.s: New test
+ source.
+ * testsuite/gas/mips/micromips-branch-absolute.s: New test
+ source.
+ * testsuite/gas/mips/micromips-branch-absolute-addend.s: New
+ test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-13 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/nal-1.d: New test.
+ * testsuite/gas/mips/mipsr6@nal-1.d: New test.
+ * testsuite/gas/mips/nal-2.d: New test.
+ * testsuite/gas/mips/mipsr6@nal-2.d: New test.
+ * testsuite/gas/mips/nal.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-12 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/sparc/ldtxa.s: New file.
+ * testsuite/gas/sparc/ldtxa.d: Likewise.
+ * testsuite/gas/sparc/sparc.exp: Execute the ldtxa test.
+
+2016-07-11 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (arc_reloc_op_tag): Allow complex ops for dtpoff.
+ (tc_gen_reloc): Remove passing DTPOFF base info into reloc addendum
+ as it is no longer needed.
+
+2016-07-08 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (append_insn): Remove extraneous
+ `install_insn' call.
+
+2016-07-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_qword_reg): Correct register kind
+ checked.
+ * testsuite/gas/i386/x86-64-suffix-bad.s: Add q-suffix with
+ 16-bit register cases.
+ * testsuite/gas/i386/x86-64-suffix-bad.l: Adjust expectations.
+
+
+2016-07-02 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/ecoff@ld.d: Remove test.
+ * testsuite/gas/mips/ecoff@ld-forward.d: Remove test.
+ * testsuite/gas/mips/ecoff@ld-zero-3.d: Remove test.
+ * testsuite/gas/mips/ecoff@sd.d: Remove test.
+ * testsuite/gas/mips/ecoff@sd-forward.d: Remove test.
+ * testsuite/gas/mips/beq.d: Remove a.out and ECOFF support from
+ reloc patterns.
+ * testsuite/gas/mips/mipsr6@beq.d: Likewise.
+ * testsuite/gas/mips/bge.d: Likewise.
+ * testsuite/gas/mips/mipsr6@bge.d: Likewise.
+ * testsuite/gas/mips/bgeu.d: Likewise.
+ * testsuite/gas/mips/mipsr6@bgeu.d: Likewise.
+ * testsuite/gas/mips/blt.d: Likewise.
+ * testsuite/gas/mips/mipsr6@blt.d: Likewise.
+ * testsuite/gas/mips/bltu.d: Likewise.
+ * testsuite/gas/mips/mipsr6@bltu.d: Likewise.
+ * testsuite/gas/mips/branch-likely.d: Likewise.
+ * testsuite/gas/mips/la.d: Likewise.
+ * testsuite/gas/mips/lb.d: Likewise.
+ * testsuite/gas/mips/lifloat.d: Likewise.
+ * testsuite/gas/mips/sb.d: Likewise.
+ * testsuite/gas/mips/uld.d: Likewise.
+ * testsuite/gas/mips/ulh.d: Likewise.
+ * testsuite/gas/mips/ulw.d: Likewise.
+ * testsuite/gas/mips/usd.d: Likewise.
+ * testsuite/gas/mips/ush.d: Likewise.
+ * testsuite/gas/mips/usw.d: Likewise.
+
+2016-07-02 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/branch-misc-2.s: Move non
+ locally-defined-global symbol tests...
+ * testsuite/gas/mips/branch-misc-5.s: ... to this new test.
+ * testsuite/gas/mips/branch-misc-2.d: Update accordingly.
+ * testsuite/gas/mips/branch-misc-2-64.d: Likewise.
+ * testsuite/gas/mips/branch-misc-2pic.d: Likewise.
+ * testsuite/gas/mips/branch-misc-2pic-64.d: Likewise.
+ * testsuite/gas/mips/mipsr6@branch-misc-2-64.d: Likewise.
+ * testsuite/gas/mips/mipsr6@branch-misc-2pic-64.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-2.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-2-64.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-2pic.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
+ * testsuite/gas/mips/branch-misc-5.d: New test.
+ * testsuite/gas/mips/branch-misc-5pic.d: New test.
+ * testsuite/gas/mips/branch-misc-5-64.d: New test.
+ * testsuite/gas/mips/branch-misc-5pic-64.d: New test.
+ * testsuite/gas/mips/mipsr6@branch-misc-5-64.d: New test.
+ * testsuite/gas/mips/mipsr6@branch-misc-5pic-64.d: New test.
+ * testsuite/gas/mips/micromips@branch-misc-5.d: New test.
+ * testsuite/gas/mips/micromips@branch-misc-5pic.d: New test.
+ * testsuite/gas/mips/micromips@branch-misc-5-64.d: New test.
+ * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: New test.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-02 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/beq.s: Uncomment branches to undefined
+ symbols.
+ * testsuite/gas/mips/beq.d: Update accordingly.
+ * testsuite/gas/mips/mipsr6@beq.d: Likewise.
+ * testsuite/gas/mips/micromips@beq.d: Likewise.
+
+2016-07-02 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/mips.exp: Restrict 64-bit `branch-mips'
+ tests to NewABI targets.
+
+2016-07-02 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/mips.exp: Group `branch-misc' tests
+ together.
+
+2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/tc-aarch64.c (struct aarch64_option_cpu_value_table): Add
+ require field.
+ (aarch64_features): Initialize require fields.
+ (aarch64_parse_features): Handle dependencies.
+ (aarch64_feature_enable_set, aarch64_feature_disable_set): New.
+ (md_assemble): Use AARCH64_CPU_HAS_ALL_FEATURES.
+ * testsuite/gas/aarch64/illegal-nofp16.s: New.
+ * testsuite/gas/aarch64/illegal-nofp16.l: New.
+ * testsuite/gas/aarch64/illegal-nofp16.d: New.
+
+2016-07-01 Nick Clifton <nickc@redhat.com>
+
+ * macro.c (macro_expand_body): Use a buffer big enough to hold an
+ extremely large integer.
+
+2016-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/mpx-inval-2.l: Relax for COFF targets.
+
+2016-07-01 Tristan Gingold <gingold@adacore.com>
+
+ * NEWS: Add marker for 2.27.
+
+2016-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (i386_index_check): Add special checks for bndmk,
+ bndldx, and bndstx.
+ * testsuite/gas/i386/mpx-inval-2.s: Add %rip and %eip relative
+ as well as scaling by other than 1 tests.
+ * testsuite/gas/i386/mpx-inval-2.l: Adjust accordingly.
+
+2016-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (md_assemble): Alter address size checking for MPX
+ instructions.
+ * testsuite/gas/i386/mpx-inval-2.s: New.
+ * testsuite/gas/i386/mpx-inval-2.l: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2016-07-01 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/20318
+ * config/tc-i386.c (match_template): Add char parameter,
+ consumed in Intel mode for an extra suffix check.
+ (md_assemble): New local variable mnem_suffix.
+ * testsuite/gas/i386/suffix-bad.s: New.
+ * testsuite/gas/i386/suffix-bad.l: New.
+ * testsuite/gas/i386/i386.exp: Run new test (twice).
+
+2016-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/movz.s: New.
+ * testsuite/gas/i386/movz32.d: New.
+ * testsuite/gas/i386/movz64.d: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2016-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (struct _i386_insn): New field memop1_string.
+ (md_assemble): Free first memory operand string.
+ (i386_index_check): Use repprefixok to distingush xlat from
+ other (real) string ops.
+ (maybe_adjust_templates): New.
+ (i386_att_operand). Call it. Store first memory operand string.
+ * config/tc-i386-intel.c (i386_intel_operand): Likewise.
+ * testsuite/gas/i386/intel-movs.s: New.
+ * testsuite/gas/i386/intel-movs32.d: New.
+ * testsuite/gas/i386/intel-movs64.d: New.
+ * testsuite/gas/i386/i386.exp: Run new tests. Invoke as for
+ 64-bits tests with "--defsym x86_64=1 --strip-local-absolute".
+
+2016-06-30 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (get_append_method): Fix a comment typo.
+
+2016-06-30 Matthew Fortune <Matthew.Fortune@imgtec.com>
+ Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (append_insn) <APPEND_SWAP>: Do not special
+ case MIPS16 handling.
+ * testsuite/gas/mips/branch-swap-3.d: New test.
+ * testsuite/gas/mips/branch-swap-4.d: New test.
+ * testsuite/gas/mips/mips16@branch-swap-3.d: New test.
+ * testsuite/gas/mips/mips16@branch-swap-4.d: New test.
+ * testsuite/gas/mips/micromips@branch-swap-3.d: New test.
+ * testsuite/gas/mips/micromips@branch-swap-4.d: New test.
+ * testsuite/gas/mips/branch-swap-3.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-30 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (append_insn): Simplify non-MIPS16 branch
+ swapping sequence.
+
+2016-06-30 Maciej W. Rozycki <macro@imgtec.com>
+
+ PR gas/20312
+ * write.c (subsegs_finish_section): Force no section padding to
+ alignment on failed assembly, always set last frag's alignment
+ from section.
+ * testsuite/gas/all/pr20312.l: New list test.
+ * testsuite/gas/all/pr20312.s: New test source.
+ * testsuite/gas/all/gas.exp: Run the new test
+
+2016-06-30 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config.in (TARGET_WITH_CPU): Undefine.
+ * configure.ac: Add --with-cpu support, and define in config.h.
+ * configure: Regenerate.
+ * config/tc-arc.c: Use TARGET_WITH_CPU to select default CPU.
+ * NEWS: Mention new configure option.
+
+2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
+
+ * testsuite/gas/arm/armv8_2+rdma.d: New.
+
+2016-06-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention --enable-compressed-debug-sections=gas is the
+ default for Linux/x86 targets.
+ * configure.tgt (ac_default_compressed_debug_sections): Default
+ to yes for Linux/x86 targets.
+
+2016-06-29 Maciej W. Rozycki <macro@imgtec.com>
+
+ * write.c: Remove "libbfd.h" inclusion.
+
+2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/elf/elf.exp: Use `supports_gnu_unique' with the
+ `type' test.
+
+2016-06-28 Alan Modra <amodra@gmail.com>
+
+ PR gas/20247
+ * testsuite/gas/elf/section11.s: Don't start directives in first column.
+
+2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
+
+ * testsuite/gas/aarch64/diagnostic.s,
+ testsuite/gas/aarch64/diagnostic.l: Add tests for out-of-range indices.
+
+2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips16_reloc_p): Handle
+ BFD_RELOC_MIPS16_16_PCREL_S1.
+ (b_reloc_p): Likewise.
+ (limited_pcrel_reloc_p): Likewise.
+ (md_pcrel_from): Likewise.
+ (md_apply_fix): Likewise.
+ (tc_gen_reloc): Likewise.
+ (md_convert_frag): Likewise.
+ (mips_fix_adjustable): Update comment.
+ * testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error
+ output, add dump patterns.
+ * testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error
+ output, add dump patterns.
+ * testsuite/gas/mips/mips16-branch-addend-2.d: Remove error
+ output, add dump patterns.
+ * testsuite/gas/mips/mips16-branch-addend-3.d: Remove error
+ output, add dump patterns.
+ * testsuite/gas/mips/mips16-branch-absolute.d: Remove error
+ output, add dump patterns.
+ * testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file.
+ * testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file.
+ * testsuite/gas/mips/mips16-branch-addend-2.l: Remove file.
+ * testsuite/gas/mips/mips16-branch-addend-3.l: Remove file.
+ * testsuite/gas/mips/mips16-branch-absolute.l: Remove file.
+ * testsuite/gas/mips/mips16-branch-addend-2.s: Add padding.
+ * testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid
+ implicit instruction padding, avoid MIPS16 JR->JRC conversion.
+ * testsuite/gas/mips/branch-weak-6.d: New test.
+ * testsuite/gas/mips/branch-weak-7.d: New test.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-27 Vineet Gupta <vgupta@synopsys.com>
+
+ * config//tc-arc.c (tc_arc_frame_initial_instructions): Use
+ cfi_add_CFA_def_cfa to generate default CFA with offset
+ * testsuite/gas/cfi/cfi-arc-1.d: Update expected output.
+
+2016-06-27 Nick Clifton <nickc@redhat.com>
+
+ PR gas/20247
+ * as.h (do_not_pad_sections_to_alignment): New global variable.
+ * as.c (show_usage): Add --no-pad-sections.
+ (parse_args): Likewise.
+ * write.c (size_seg): Skip padding the end of the section if
+ requested from the command line.
+ (SUB_SEGMENT_ALIGN): Likewise.
+ * doc/as.texinfo: Document the new option.
+ * NEWS: Mention the new feature.
+ * testsuite/gas/elf/section11.s: New test.
+ * testsuite/gas/elf/section11.d: New test driver.
+ * testsuite/gas/elf/elf.exp: Run the new test.
+
+2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-dlx.c: Include bfd/elf32-dlx.h.
+ * config/tc-dlx.h: Remove prototype of dlx_set_skip_hi16.
+
+2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-xtensa.c (xtensa_elf_suffix): Use ARRAY_SIZE instead of a
+ sentinal element.
+ (map_suffix_reloc_to_operator): Likewise.
+ (map_operator_to_reloc): Likewise.
+
+2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-nds32.c (md_begin): Use ARRAY_SIZE instead of a sentinal
+ element in relax_table.
+
+2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-aarch64.c: Make the type of reg_entry::type
+ aarch_reg_type.
+
+2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-bfin.c (bfin_cpus): Remove sentinal.
+ (md_parse_option): Adjust.
+ * config/tc-aarch64.c (aarch64_parse_abi): Replace use of a sentinal
+ with iteration from 0 to ARRAY_SIZE.
+ * config/tc-mcore.c (md_begin): Likewise.
+ * config/tc-visium.c (visium_parse_arch): Likewise.
+
+2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-tic54x.c (tic54x_set_default_include): remove argument
+ and simplify accordingly.
+ (tic54x_include): Adjust.
+ (tic54x_mlib): Likewise.
+
+2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-xtensa.c (xtensa_make_property_section): Remove prototype.
+
+2016-06-24 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (append_insn): Use any `O_symbol' expression
+ unchanged with relaxed MIPS16 instructions.
+ (mips16_extended_frag): Adjust accordingly. Return 1 right
+ away if a relocation will be required for the symbol requested.
+ Remove dead first relaxation pass code.
+ (mips_relax_frag): Pass `sec' down to `mips16_extended_frag'.
+ (md_convert_frag): Adjust symbol value calculation. Raise an
+ error if a relocation is required for the symbol requested.
+ * testsuite/gas/mips/mips16@relax-swap3.d: Remove dump patterns,
+ add error output.
+ * testsuite/gas/mips/mips16@relax-swap3.l: New error output.
+ * testsuite/gas/mips/mips16-pcrel-relax-0.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-relax-1.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-relax-2.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-relax-3.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-0.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-1.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-2.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-3.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-4.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-5.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-6.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-7.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-addend-0.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-addend-1.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-addend-2.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-addend-3.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-absolute.d: New test.
+ * testsuite/gas/mips/mips16-branch-reloc-0.d: New test.
+ * testsuite/gas/mips/mips16-branch-reloc-1.d: New test.
+ * testsuite/gas/mips/mips16-branch-reloc-2.d: New test.
+ * testsuite/gas/mips/mips16-branch-reloc-3.d: New test.
+ * testsuite/gas/mips/mips16-branch-addend-0.d: New test.
+ * testsuite/gas/mips/mips16-branch-addend-1.d: New test.
+ * testsuite/gas/mips/mips16-branch-addend-2.d: New test.
+ * testsuite/gas/mips/mips16-branch-addend-3.d: New test.
+ * testsuite/gas/mips/mips16-branch-absolute.d: New test.
+ * testsuite/gas/mips/mips16-absolute-reloc-0.d: New test.
+ * testsuite/gas/mips/mips16-absolute-reloc-1.d: New test.
+ * testsuite/gas/mips/mips16-absolute-reloc-2.d: New test.
+ * testsuite/gas/mips/mips16-absolute-reloc-3.d: New test.
+ * testsuite/gas/mips/mips16-pcrel-reloc-2.l: New error output.
+ * testsuite/gas/mips/mips16-pcrel-reloc-3.l: New error output.
+ * testsuite/gas/mips/mips16-pcrel-reloc-6.l: New error output.
+ * testsuite/gas/mips/mips16-pcrel-reloc-7.l: New error output.
+ * testsuite/gas/mips/mips16-pcrel-addend-2.l: New error output.
+ * testsuite/gas/mips/mips16-pcrel-addend-3.l: New error output.
+ * testsuite/gas/mips/mips16-pcrel-absolute.l: New error output.
+ * testsuite/gas/mips/mips16-branch-reloc-2.l: New error output.
+ * testsuite/gas/mips/mips16-branch-reloc-3.l: New error output.
+ * testsuite/gas/mips/mips16-branch-addend-2.l: New error output.
+ * testsuite/gas/mips/mips16-branch-addend-3.l: New error output.
+ * testsuite/gas/mips/mips16-branch-absolute.l: New error output.
+ * testsuite/gas/mips/mips16-absolute-reloc-2.l: New error output.
+ * testsuite/gas/mips/mips16-absolute-reloc-3.l: New error output.
+ * testsuite/gas/mips/mips16-pcrel-relax-0.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-relax-2.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-reloc-0.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-reloc-1.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-reloc-2.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-reloc-3.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-reloc-4.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-reloc-5.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-reloc-6.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-reloc-7.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-addend-0.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-addend-1.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-addend-2.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-addend-3.s: New test source.
+ * testsuite/gas/mips/mips16-pcrel-absolute.s: New test source.
+ * testsuite/gas/mips/mips16-branch-reloc-0.s: New test source.
+ * testsuite/gas/mips/mips16-branch-reloc-1.s: New test source.
+ * testsuite/gas/mips/mips16-branch-reloc-2.s: New test source.
+ * testsuite/gas/mips/mips16-branch-reloc-3.s: New test source.
+ * testsuite/gas/mips/mips16-branch-addend-0.s: New test source.
+ * testsuite/gas/mips/mips16-branch-addend-1.s: New test source.
+ * testsuite/gas/mips/mips16-branch-addend-2.s: New test source.
+ * testsuite/gas/mips/mips16-branch-addend-3.s: New test source.
+ * testsuite/gas/mips/mips16-branch-absolute.s: New test source.
+ * testsuite/gas/mips/mips16-absolute-reloc-0.s: New test source.
+ * testsuite/gas/mips/mips16-absolute-reloc-1.s: New test source.
+ * testsuite/gas/mips/mips16-absolute-reloc-2.s: New test source.
+ * testsuite/gas/mips/mips16-absolute-reloc-3.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-24 Alan Modra <amodra@gmail.com>
+
+ * configure.tgt (alpha-*-openbsd*): Use em=nbsd.
+
+2016-06-23 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (b_reloc_p): New function.
+ (mips_fix_adjustable): Also keep the original microMIPS symbol
+ referred from branch relocations.
+ * testsuite/gas/mips/branch-local-1.d: New test.
+ * testsuite/gas/mips/branch-local-n32-1.d: New test.
+ * testsuite/gas/mips/branch-local-n64-1.d: New test.
+ * testsuite/gas/mips/micromips@branch-misc-4-64.d: Update
+ relocations.
+ * testsuite/gas/mips/branch-local-1.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new cases.
+
+2016-06-23 Graham Markall <graham.markall@embecosm.com>
+
+ * config/tc-arc.c (options, md_longopts, md_parse_option): Move
+ -mspfp, -mdpfp and -mfpuda out of the sections for dummy
+ options. Correct erroneous enabling of SPFP instructions when
+ using -mnps400.
+
+2016-06-22 Peter Bergner <bergner@vnet.ibm.com>
+
+ * testsuite/gas/ppc/power9.d <brd, brh, brw, mffs, mffs., mffsce,
+ mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl, nandxor, rldixor,
+ setbool, xor3>: New tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-xtensa.c: Include elf/xtensa.h.
+
+2016-06-21 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (calculate_reloc) <BFD_RELOC_HI16_S_PCREL>
+ <BFD_RELOC_LO16_PCREL>: New switch cases.
+ (md_apply_fix) <BFD_RELOC_HI16_S_PCREL, BFD_RELOC_LO16_PCREL>:
+ Move switch cases along `BFD_RELOC_MIPS_JMP'.
+ <BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2>
+ <BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2>: Handle
+ the resolved case.
+ * testsuite/gas/mips/pcrel-reloc-4.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-4-r6.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-5.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-5-r6.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-6.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-6.l: New list test.
+ * testsuite/gas/mips/pcrel-reloc-4.s: New test source.
+ * testsuite/gas/mips/pcrel-reloc-6.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-21 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS_18_PCREL_S3>
+ <BFD_RELOC_MIPS_19_PCREL_S2>: Avoid null pointer dereferences
+ via `fixP->fx_addsy'.
+
+2016-06-21 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (md_pcrel_from) <BFD_RELOC_MIPS_18_PCREL_S3>:
+ Calculate relocation from the containing aligned doubleword.
+ (tc_gen_reloc) <BFD_RELOC_MIPS_18_PCREL_S3>: Calculate the
+ addend from the containing aligned doubleword.
+
+2016-06-21 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_force_relocation): Use `file_mips_opts'
+ rather than `mips_opts' for the R6 ISA check.
+ (mips_fix_adjustable): Likewise.
+ * testsuite/gas/mips/pcrel-reloc-1.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-1-r6.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-2.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-2-r6.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-3.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-3-r6.d: New test.
+ * testsuite/gas/mips/pcrel-reloc-1.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-21 Graham Markall <graham.markall@embecosm.com>
+
+ * config/tc-arc.c (check_cpu_feature, md_parse_option):
+ Add nps400 option and feature. Add check for nps400
+ feature. Refactor existing checks to check subclass before
+ feature enablement.
+ (md_show_usage): Document flags for NPS-400 and add some other
+ undocumented flags.
+ (cpu_type): Remove nps400 CPU type entry
+ (check_zol): Remove bfd_mach_arc_nps400 case.
+ (md_show_usage): Add help on -mcpu=nps400.
+ (cpu_types): Add entry for nps400 as arc700 plus nps400 extension
+ set.
+ * doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
+ -fpuda flags. Document -mcpu=nps400.
+ * testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
+ expected flags to match ARC700 instead of NPS400.
+ * testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
+ * testsuite/gas/arc/nps-400-2.d: Likewise.
+ * testsuite/gas/arc/nps-400-3.d: Likewise.
+ * testsuite/gas/arc/nps-400-4.d: Likewise.
+ * testsuite/gas/arc/nps-400-5.d: Likewise.
+ * testsuite/gas/arc/nps-400-6.d: Likewise.
+ * testsuite/gas/arc/nps-400-7.d: Likewise.
+ * testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
+ avoid clash with cbba instruction.
+ * testsuite/gas/arc/textinsn2op01.d: Likewise.
+ * testsuite/gas/arc/textinsn3op.d: Likewise.
+ * testsuite/gas/arc/textinsn3op.s: Likewise.
+ * testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
+ -mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.
+
+2016-06-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/r6-64-n32.d: Change the `name' tag.
+ * testsuite/gas/mips/r6-64-n64.d: Likewise.
+
+2016-06-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Update comment on jump
+ reloc conversion.
+
+2016-06-20 Virendra Pathak <virendra.pathak@broadcom.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Update vulcan feature set.
+
+2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (hpriv_reg_table): Add registers %hmcdper,
+ %hmcddfr and %hva_mask_nz.
+ (sparc_ip): New handling of asr/privileged/hyperprivileged
+ registers, adapted to the new form of the sparc opcodes table.
+ * testsuite/gas/sparc/rdasr.s: New file.
+ * testsuite/gas/sparc/rdasr.d: Likewise.
+ * testsuite/gas/sparc/wrasr.s: Likewise.
+ * testsuite/gas/sparc/wrasr.d: Likewise.
+ * testsuite/gas/sparc/sparc.exp (sparc_elf_setup): Add rdasr and
+ wrasr tests.
+ * testsuite/gas/sparc/rdpr.d: Use -Av9m, as some privileged
+ registers require it.
+ * testsuite/gas/sparc/wrpr.s: Complete to cover all privileged
+ registers and write instruction modalities.
+ * testsuite/gas/sparc/wrpr.d: Likewise.
+ * testsuite/gas/sparc/rdhpr.s: Likewise for hyperprivileged
+ registers.
+ * testsuite/gas/sparc/rdhpr.d: Likewise.
+ * testsuite/gas/sparc/wrhpr.s: Likewise.
+ * testsuite/gas/sparc/wrhpr.d: Likewise.
+
+2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (sparc_arch_table): adjust the GAS
+ architectures to use the right opcode architecture.
+ (sparc_md_end): Handle v9{c,d,e,v,m}.
+ (sparc_ip): Fix some comments.
+ * testsuite/gas/sparc/ldx_efsr.d: Fix the architecture of this
+ instruction, which is v9d.
+ * testsuite/gas/sparc/mwait.s: Remove the `rd %mwait,%g1'
+ instruction from the test, as %mwait is not readable.
+ * testsuite/gas/sparc/mwait.d: Likewise.
+ * testsuite/gas/sparc/mism-1.s: Expand to check v9b and v9e
+ mismatch architecture errors.
+ * testsuite/gas/sparc/mism-2.s: New file.
+
+2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (priv_reg_table): Use NULL instead of the
+ empty string to mark the end of the array.
+ (hpriv_reg_table): Likewise.
+ (v9a_asr_table): Likewise.
+ (cmp_reg_entry): Handle entries with NULL names.
+ (F_POP_V9): Define.
+ (F_POP_PCREL): Likewise.
+ (F_POP_TLS_CALL): Likewise.
+ (F_POP_POSTFIX): Likewise.
+ (struct pop_entry): New type.
+ (pop_table): New variable.
+ (enum pop_entry_type): New type.
+ (struct perc_entry): Likewise.
+ (NUM_PERC_ENTRIES): Define.
+ (perc_table): New variable.
+ (cmp_perc_entry): New function.
+ (md_begin): Sort hpriv_reg_table and v9a_asr_table, and initialize
+ perc_table.
+ (sparc_ip): Handle entries with NULL names in priv_reg_table,
+ hpriv_reg_table and v9a_asr_table. Use perc_table to handle
+ %-pseudo-ops.
+
+2016-06-15 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-ft32.c (md_assemble): Call dwarf2_emit_insn with the
+ instruction size.
+ * config/tc-mcore.c (md_assemble): Likewise.
+ * config/tc-mn10200.c (md_assemble): Likewise.
+ * config/tc-moxie.c (md_assemble): Likewise.
+ * config/tc-pj.c (md_apply_fix): Handle BFD_RELOC_PJ_CODE_REL32.
+ * testsuite/gas/all/gas.exp (diff1 test): Alpha sort list of
+ exception targets. Add alpha, hppa, microblaze and rl78 to list
+ of exceptions.
+ (forward): Add microblaze to list of exceptions.
+ (fwdexp): Add alpha to list of exceptions.
+ (redef2): Add arm-epoc-pe and rl78 to list of exceptions.
+ (redef3): Add rl78 and x86_64 cygwin to list of exceptions.
+ (do_930509a): Alpha sort list of exception targets. Add h8300 and
+ mn10200 to list of exceptions.
+ (align2): Expect to fail for nds32.
+ (cond): Add alpha and rl78 to list of exceptions.
+ * testsuite/gas/all/none.d: Skip for ft32 and hppa.
+ * testsuite/gas/all/string.d: Skip for tic4x.
+ * testsuite/gas/alpha/alpha.exp: Note that the alpha-linuxecoff
+ target does not support ELF.
+ * testsuite/gas/arm/blx-bl-convert.dL Skip for the nto target.
+ * testsuite/gas/cfi/cfi-alpha-2.d: All extended format names.
+ * testsuite/gas/cfi/cfi.exp: Alpha sort list of targets. Skip SH
+ tests for sh-pe and sh-rtemscoff targets.
+ * testsuite/gas/elf/elf.exp (redef): Add rl78, xgate and vax to
+ list of exceptions.
+ (type): Run the noifunc version for alpha-freebsd and visium.
+ * testsuite/gas/elf/warn-2.s: Do not expect to fail on the mcore,
+ mn10200 or moxie targets.
+ * testsuite/gas/ft32/insn.d: Update expected disassembly.
+ * testsuite/gas/i386/i386.exp (x86-64-pcrel): Skip for cygwin
+ targets.
+ * testsuite/gas/lns/lns.exp (lns-common-1): No longer skip for
+ mcore and rx targets.
+ * testsuite/gas/macros/macros.exp (dot): Add exceptions for ns32k,
+ rl78 and vax.
+ (purge): Expect to fail on the ns32k and vax.
+ * testsuite/gas/nds32/alu-2.d: Update expected disassembly.
+ * testsuite/gas/nds32/ls.d: Likewise.
+ * testsuite/gas/nds32/sys-reg.d: Likewise.
+ * testsuite/gas/nds32/usr-spe-reg.d: Likewise.
+ * testsuite/gas/pe/aligncomm-d.d: Skip for the sh.
+ * testsuite/gas/pe/section-align-3.d: Likewise.
+ * testsuite/gas/pe/section-exclude.d: Likewise.
+ * testsuite/gas/ppc/test2xcoff32.d: Pass once all the required
+ data has been seen.
+ * testsuite/gas/ppc/textalign-xcoff-001.d: Fix up regexp to allow
+ for variations in whitespace.
+ * testsuite/gas/tilepro/t_constants.d: Pass once all the required
+ data has been seen.
+ * testsuite/gas/tilepro/t_constants.s (.safe_word): New macro.
+ Installs a 32-bit value without generating warnings on 64-bit
+ hosts.
+ Use the new macro to replace the .word directives.
+
+2016-06-15 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/add_s.d: New file.
+ * testsuite/gas/arc/add_s.s: New file.
+
+2016-06-14 Graham Markall <graham.markall@embecosm.com>
+
+ * testsuite/gas/arc/nps400-6.s: Add tests of ldbit.
+ * testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14 Graham Markall <graham.markall@embecosm.com>
+
+ * testsuite/gas/arc/nps400-6.s: Add tests of hash, tr, utf8, e4by, and
+ addf.
+ * testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14 Graham Markall <graham.markall@embecosm.com>
+
+ * testsuite/gas/arc/nps400-6.s: Add tests of calcbsd, calcbxd,
+ calckey, calcxkey, mxb, imxb, addl, subl, andl, orl, xorl, andab, orab,
+ lbdsize, bdlen, csms, csma, cbba, zncv, and hofs.
+ * testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-nds32.c (nds32_get_align): Avoid left shifting a
+ signed constant.
+
+2016-06-13 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Don't convert RELA
+ JALR relocations on R6.
+ * testsuite/gas/mips/jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/mips1@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/r3000@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/jal-svr4pic-local-n32.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: New
+ test.
+ * testsuite/gas/mips/jal-svr4pic-local-n64.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: New
+ test.
+ * testsuite/gas/mips/jal-svr4pic-local.s: New test source.
+ * testsuite/gas/mips/jal-svr4pic-local-newabi.s: New test
+ source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-13 Virendra Pathak <virendra.pathak@broadcom.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan.
+ * doc/c-aarch64.texi: Document that vulcan is a valid processor
+ name.
+
+2016-06-13 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c: For non-ELF based targets skip ARM feature sets
+ that are not supported.
+
+ * config/tc-arc.c (md_apply_fix): Avoid left shifting a signed
+ constant.
+ * config/tc-cr16.c (check_range): Likewise.
+ * config/tc-nios2.c (nios2_check_overflow): Likewise.
+
+2016-06-08 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (print_operands): Substitute size.
+ (output_operand_error_record): Likewise.
+
+2016-06-07 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
+ PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
+ PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
+ (ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
+ by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
+ add vle_opcodes twice.
+ (ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
+
+2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
+ (arm_ext_ras): Renamed from arm_ext_v8_2.
+ (insns): Update for arm_ext_v8_2 renaming.
+ (arm_extensions): Add "ras".
+ * doc/c-arm.texi (ARM Options): Add an entry for "ras".
+ * testsuite/gas/arm/armv8-a+ras.d: New.
+ * testsuite/gas/arm/armv8_2-a.d: Add explicit command line
+ options.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * itbl-parse.y (yyerror): Use modern argument declaration style.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-sh.c (parse_reg): Change type of mode argument to
+ sh_arg_type.
+ (get_operand): Adjust.
+ (insert): Change type of how to bfd_reloc_code_real_type.
+ (insert4): Likewise.
+ * config/tc-sh64.c (shmedia_get_operand): Adjust.
+ (shmedia_parse_reg): Change type of mode to shmedia_arg_type.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-nds32.c (nds32_parse_option): Make the type of ptr_arg
+ const char *.
+
+2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR binutils/20196
+ * gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
+ stbcx., sthcx., stwcx., stdcx.>: Add tests.
+ * gas/testsuite/gas/ppc/e6500.d: Likewise.
+ * gas/testsuite/gas/ppc/power8.s: Likewise.
+ * gas/testsuite/gas/ppc/power8.d: Likewise.
+ * gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
+ stdcx.>: Add tests.
+ * gas/testsuite/gas/ppc/power4.d: Likewise.
+
+2016-06-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutis/18386
+ * testsuite/gas/i386/i386.exp: Run x86-64-branch-4.
+ * testsuite/gas/i386/x86-64-branch.d: Updated.
+ * testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
+ * testsuite/gas/i386/x86-64-branch-4.l: New file.
+ * testsuite/gas/i386/x86-64-branch-4.s: Likewise.
+
2016-06-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/tc-aarch64.c (aarch64_cpus): Add cortex-a73 entry.