Add swap byte (swapb) and swap halfword (swaph) opcodes.

[deliverable/binutils-gdb.git] / gas / ChangeLog

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f1e62076839d0153d038d73c1dc7855bac7674be..184d3060922c441d0eab9a693f665f6460a44a64 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,29 @@
+2012-11-21  Edgar E. Iglesias <edgar.iglesias@gmail.com>
+
+       * config/tc-microblaze.c (parse_reg): Parse REG_SLR, REG_SHR
+
+2012-11-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/14859
+       * gas/i386/x86-64-opcode.s: Add jecxz.
+       * gas/i386/x86-64-opcode.d: Updated.
+
+2012-11-20  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * config/tc-aarch64.c (first_error_fmt): Add ATTRIBUTE_UNUSED to the
+       local variable "ret".
+
+2012-11-20  Roland McGrath  <mcgrathr@google.com>
+
+       * config/tc-arm.c (arm_symbol_chars): New variable.
+       * config/tc-arm.h (tc_symbol_chars): New macro, defined to that.
+
+2012-11-20  David S. Miller  <davem@davemloft.net>
+
+       * config/tc-sparc.c (md_parse_option): Only certain arch
+       specifications should override the object to be 32-bit
+       or 64-bit.
+
 2012-11-14  David Holsgrove  <david.holsgrove@xilinx.com>
 
        * config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5
@@ -627,7 +653,7 @@
        CPU_BTVER2_FLAGS.
        (i386_align_code): Add case for PROCESSOR_BT.
 
-       * config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.       
+       * config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.
 
        * doc/c-i386.texi: Add -march={btver1, btver2} options.