+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (type_names): Remove OPERAND_TYPE_ESSEG
+ entry.
+ (md_assemble): Adjust isstring field use. Add assertion.
+ (check_string): Mostly re-write.
+ (i386_index_check): Adjust isstring field use and related code.
+
+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_immext): Remove SSE3, SVME, and
+ MWAITX special case logic.
+ (process_suffix): Replace immext field uses by instance ones.
+ * testsuite/gas/i386/arch-13.s,
+ testsuite/gas/i386/x86-64-arch-3.s: Add CLZERO with operand
+ cases.
+ * testsuite/gas/i386/svme.s: Add 16-bit operand cases.
+ * testsuite/gas/i386/x86-64-specific-reg.s: Drop FIXME comments.
+ * testsuite/gas/i386/arch-13.d,
+ testsuite/gas/i386/mwaitx-reg.l, testsuite/gas/i386/svme.d,
+ testsuite/gas/i386/x86-64-arch-3.d,
+ testsuite/gas/i386/x86-64-mwaitx-reg.l,
+ testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations.
+
+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (operand_type_set, operand_type_and,
+ operand_type_and_not, operand_type_or, operand_type_xor): Handle
+ "instance" field specially.
+ (operand_size_match, md_assemble, match_template, process_suffix,
+ check_byte_reg, check_long_reg, check_qword_reg, check_word_reg,
+ process_operands, build_modrm_byte): Use "instance" instead of
+ "acc" / "inoutportreg" / "shiftcount" fields.
+ (optimize_imm): Adjust comment.
+
+2019-11-11 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/aarch64/illegal-sve2.s: Add smaxp/sminp cases
+ with mismatched 1st and 3rd operands.
+ * testsuite/gas/aarch64/illegal-sve2.l: Adjust expectations.
+
+2019-11-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25167
+ * config/tc-i386.c (match_template): Don't check instruction
+ suffix set from operand.
+ * testsuite/gas/i386/code16.d: New file.
+ * testsuite/gas/i386/code16.s: Likewise.
+ * testsuite/gas/i386/i386.exp: Run code16.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding, build_modrm_byte,
+ check_VecOperations, parse_real_register): Use "class" instead
+ of "regmask" and "regbnd" fields.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_mem_size, operand_size_match,
+ operand_type_register_match, pi, check_VecOperands, match_template,
+ check_byte_reg, check_long_reg, check_qword_reg, process_operands,
+ build_modrm_byte, parse_real_register): Use "class" instead of
+ "regsimd" / "regmmx" fields.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (pi, check_byte_reg, build_modrm_byte,
+ parse_real_register): Use "class" instead of "control"/"debug"/
+ "test" fields.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (pi, check_byte_reg, process_operands,
+ build_modrm_byte, i386_att_operand, parse_real_register): Use
+ "class" instead of "sreg" field.
+ * config/tc-i386-intel.c (i386_intel_simplify_register,
+ i386_intel_operand): Likewise.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (operand_type_set, operand_type_and,
+ operand_type_and_not, operand_type_or, operand_type_xor): Handle
+ "class" field specially.
+ (anyimm): New.
+ (operand_type_check, operand_size_match,
+ operand_type_register_match, pi, md_assemble, is_short_form,
+ process_suffix, check_byte_reg, check_long_reg, check_qword_reg,
+ check_word_reg, process_operands, build_modrm_byte): Use "class"
+ instead of "reg" field.
+ (optimize_imm): Likewise. Reduce redundancy. Adjust calculation
+ of "allowed".
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * testsuite/gas/aarch64/dgh.s: New test.
+ * testsuite/gas/aarch64/dgh.d: New test.
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * config/tc-arm.c (arm_ext_i8mm): New feature set.
+ (do_vusdot): New.
+ (do_vsudot): New.
+ (do_vsmmla): New.
+ (do_vummla): New.
+ (insns): Add vsmmla, vummla, vusmmla, vusdot, vsudot mnemonics.
+ (armv86a_ext_table): Add i8mm extension.
+ (arm_extensions): Move bf16 extension to context sensitive table.
+ (armv82a_ext_table, armv84a_ext_table, armv85a_ext_table):
+ Move bf16 extension to context sensitive table.
+ (armv86a_ext_table): Add i8mm extension.
+ * doc/c-arm.texi: Document i8mm extension.
+ * testsuite/gas/arm/i8mm.s: New test.
+ * testsuite/gas/arm/i8mm.d: New test.
+ * testsuite/gas/arm/bfloat17-cmdline-bad-3.d: Update test.
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * config/tc-aarch64.c: Add new arch fetures to suppport the mm extension.
+ (parse_operands): Add new operand.
+ * testsuite/gas/aarch64/i8mm.s: New test.
+ * testsuite/gas/aarch64/i8mm.d: New test.
+ * testsuite/gas/aarch64/f32mm.s: New test.
+ * testsuite/gas/aarch64/f32mm.d: New test.
+ * testsuite/gas/aarch64/f64mm.s: New test.
+ * testsuite/gas/aarch64/f64mm.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx-mm.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx-mm.d: New test.
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+2019-11-07 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/tc-aarch64.c (md_atof): Add encoding for the bfloat16 format.
+ * testsuite/gas/aarch64/bfloat16-directive-le.d: New test.
+ * testsuite/gas/aarch64/bfloat16-directive-be.d: New test.
+ * testsuite/gas/aarch64/bfloat16-directive.s: New test.
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+2019-11-07 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/tc-arm.c (md_atof): Add encoding for bfloat16
+ * testsuite/gas/arm/bfloat16-directive-le.d: New test.
+ * testsuite/gas/arm/bfloat16-directive-be.d: New test.
+ * testsuite/gas/arm/bfloat16-directive.s: New test.
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+2019-11-07 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * as.h (atof_ieee_detail): Add prototype for atof_ieee_detail function.
+ (atof_ieee): Move some code into the atof_ieee_detail function.
+ (atof_ieee_detail): Add function that provides a higher level of
+ control over generating IEEE-like numbers.
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-arm.c (arm_archs): Add armv8.6-a option.
+ (cpu_arch_ver): Add TAG_CPU_ARCH_V8 tag for Armv8.6-a.
+ * doc/c-arm.texi (-march): New armv8.6-a arch.
+ * config/tc-arm.c (arm_ext_bf16): New feature set.
+ (enum neon_el_type): Add NT_bfloat value.
+ (B_MNEM_vfmat, B_MNEM_vfmab): New bfloat16 encoder
+ helpers.
+ (BAD_BF16): New message.
+ (parse_neon_type): Add bf16 type specifier.
+ (enum neon_type_mask): Add N_BF16 type.
+ (type_chk_of_el_type): Account for NT_bfloat.
+ (el_type_of_type_chk): Account for N_BF16.
+ (neon_three_args): Split out from neon_three_same.
+ (neon_three_same): Part split out into neon_three_args.
+ (CVT_FLAVOUR_VAR): Add bf16_f32 cvt flavour.
+ (do_neon_cvt_1): Account for vcvt.bf16.f32.
+ (do_bfloat_vmla): New.
+ (do_mve_vfma): New function to deal with the mnemonic clash between the BF16
+ vfmat and the MVE vfma in a VPT block with a 't'rue condition.
+ (do_neon_cvttb_1): Account for vcvt{t,b}.bf16.f32.
+ (do_vdot): New
+ (do_vmmla): New
+ (insns): Add vdot and vmmla mnemonics.
+ (arm_extensions): Add "bf16" extension.
+ * doc/c-arm.texi: Document "bf16" extension.
+ * testsuite/gas/arm/attr-march-armv8_6-a.d: New test.
+ * testsuite/gas/arm/bfloat16-bad.d: New test.
+ * testsuite/gas/arm/bfloat16-bad.l: New test.
+ * testsuite/gas/arm/bfloat16-bad.s: New test.
+ * testsuite/gas/arm/bfloat16-cmdline-bad-2.d: New test.
+ * testsuite/gas/arm/bfloat16-cmdline-bad-3.d: New test.
+ * testsuite/gas/arm/bfloat16-cmdline-bad.d: New test.
+ * testsuite/gas/arm/bfloat16-neon.s: New test.
+ * testsuite/gas/arm/bfloat16-non-neon.s: New test.
+ * testsuite/gas/arm/bfloat16-thumb-bad.d: New test.
+ * testsuite/gas/arm/bfloat16-thumb-bad.l: New test.
+ * testsuite/gas/arm/bfloat16-thumb.d: New test.
+ * testsuite/gas/arm/bfloat16-vfp.d: New test.
+ * testsuite/gas/arm/bfloat16.d: New test.
+ * testsuite/gas/arm/bfloat16.s: New test.
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-aarch64.c (vectype_to_qualifier): Special case the
+ S_2H operand qualifier.
+ * doc/c-aarch64.texi: Document bf16 extension.
+ * testsuite/gas/aarch64/bfloat16.d: New test.
+ * testsuite/gas/aarch64/bfloat16.s: New test.
+ * testsuite/gas/aarch64/illegal-bfloat16.d: New test.
+ * testsuite/gas/aarch64/illegal-bfloat16.l: New test.
+ * testsuite/gas/aarch64/illegal-bfloat16.s: New test.
+ * testsuite/gas/aarch64/sve-bfloat-movprfx.s: New test.
+ * testsuite/gas/aarch64/sve-bfloat-movprfx.d: New test.
+
+2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
+2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-aarch64.c (armv8.6-a): New arch.
+ * doc/c-aarch64.texi (armv8.6-a): Document new arch.
+
+2019-11-07 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (cpu_arch): Add .rdpru and .mcommit entries.
+ * doc/c-i386.texi: Mention rdpru and mcommit.
+ * testsuite/gas/i386/arch-13.s,
+ testsuite/gas/i386/x86-64-arch-3.s: Add mcommit and rdpru cases.
+ * testsuite/gas/i386/arch-13.d,
+ testsuite/gas/i386/x86-64-arch-3.d: Extend -march=. Adjust
+ expectations.
+ * testsuite/gas/i386/arch-13-znver1.d: Extend -march=. Redirect
+ expectations to arch-13.d.
+ * testsuite/gas/i386/arch-13-znver2.d: Redirect expectations to
+ arch-13.d.
+ testsuite/gas/i386/x86-64-arch-3-znver1.d: Extend -march=.
+
+2019-11-07 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/x86-64-arch-3.s: Add monitorx/mwaitx cases
+ with canonical operand sizes.
+ * testsuite/gas/i386/x86-64-sse3.s: Add monitor/mwait cases with
+ canonical operand sizes.
+ * testsuite/gas/i386/x86-64-arch-3-znver1.d,
+ testsuite/gas/i386/x86-64-arch-3-znver2.d: Redirect expectations
+ to x86-64-arch-3.d.
+ * testsuite/gas/i386/ilp32/x86-64-sse-noavx.d: Redirect
+ expectations to parent dir's x86-64-sse-noavx.d.
+ * testsuite/gas/i386/ilp32/x86-64-sse3.d: Redirect expectations
+ to to parent dir's x86-64-sse3.d.
+ * testsuite/gas/i386/x86-64-arch-3.d,
+ testsuite/gas/i386/x86-64-mwaitx-bdver4.d,
+ testsuite/gas/i386/x86-64-sse-noavx.d,
+ testsuite/gas/i386/x86-64-sse3.d,
+ testsuite/gas/i386/x86-64-suffix.d: Adjust expectations.
+
+2019-11-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_operands): Handle ShortForm insns
+ later, splitting out their segment register sub-form.
+
2019-10-31 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/gas/i386/general.s: Add .code16gcc fldenv tests.