+2006-09-22 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
+ (ppc_handle_align): New function.
+ * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
+ (SUB_SEGMENT_ALIGN): Define as zero.
+
+2006-09-20 Bob Wilson <bob.wilson@acm.org>
+
+ * doc/as.texinfo: Fix cross reference usage, typos and grammar.
+ (Overview): Skip cross reference in man page.
+
+2006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
+
+ * configure.in: Add new target x86_64-pc-mingw64.
+ * configure: Regenerate.
+ * configure.tgt: Add new target x86_64-pc-mingw64.
+ * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
+ * config/tc-i386.c: Add new targets.
+ (md_parse_option): Add targets to OPTION_64.
+ (x86_64_target_format): Add new method for setup proper default target cpu mode.
+ * config/te-pep.h: Add new target definition header.
+ (TE_PEP): New macro: Identifies new target architecture.
+ (COFF_WITH_pex64): Set proper includes in bfd.
+ * NEWS: Mention new target.
+
+2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * config/bfin-parse.y (binary): Change sub of const to add of negated
+ const.
+
+2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
+
+ * config/tc-score.c: New file.
+ * config/tc-score.h: Newf file.
+ * configure.tgt: Add Score target.
+ * Makefile.am: Add Score files.
+ * Makefile.in: Regenerate.
+ * NEWS: Mention new target support.
+
+2006-09-16 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
+ * doc/c-arm.texi (movsp): Document offset argument.
+
+2006-09-16 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (thumb32_negate_data_op): Consistently use
+ unsigned int to avoid 64-bit host problems.
+
+2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * config/bfin-parse.y (binary): Do some more constant folding for
+ additions.
+
+2006-09-13 Jan Beulich <jbeulich@novell.com>
+
+ * input-file.c (input_file_give_next_buffer): Demote as_bad to
+ as_warn.
+
+2006-09-13 Alan Modra <amodra@bigpond.net.au>
+
+ PR gas/3165
+ * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
+ in parens.
+
+2006-09-13 Alan Modra <amodra@bigpond.net.au>
+
+ * input-file.c (input_file_open): Replace as_perror with as_bad
+ so that gas exits with error on file errors. Correct error
+ message.
+ (input_file_get, input_file_give_next_buffer): Likewise.
+ * input-file.h: Update comment.
+
+2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
+
+ PR gas/3172
+ * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
+ registers as a sub-class of wC registers.
+
+2006-09-11 Alan Modra <amodra@bigpond.net.au>
+
+ PR gas/3165
+ * config/tc-mips.h (enum dwarf2_format): Forward declare.
+ (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
+ * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
+ * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
+
+2006-09-08 Nick Clifton <nickc@redhat.com>
+
+ PR gas/3129
+ * doc/as.texinfo (Macro): Improve documentation about separating
+ macro arguments from following text.
+
+2006-09-08 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
+
+2006-09-07 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (parse_operands): Mark operand as present.
+
+2006-09-04 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
+ (do_neon_dyadic_if_i_d): Avoid setting U bit.
+ (do_neon_mac_maybe_scalar): Ditto.
+ (do_neon_dyadic_narrow): Force operand type to NT_integer.
+ (insns): Remove out of date comments.
+
+2006-08-29 Nick Clifton <nickc@redhat.com>
+
+ * read.c (s_align): Initialize the 'stopc' variable to prevent
+ compiler complaints about it being used without being
+ initialized.
+ (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
+ s_float_space, s_struct, cons_worker, equals): Likewise.
+
+2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
+
+ * ecoff.c (ecoff_directive_val): Fix message typo.
+ * config/tc-ns32k.c (convert_iif): Likewise.
+ * config/tc-sh64.c (shmedia_check_limits): Likewise.
+
+2006-08-25 Sterling Augustine <sterling@tensilica.com>
+ Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
+ the state of the absolute_literals directive. Remove align frag at
+ the start of the literal pool position.
+
+2006-08-25 Bob Wilson <bob.wilson@acm.org>
+
+ * doc/c-xtensa.texi: Add @group commands in examples.
+
+2006-08-24 Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
+ (INIT_LITERAL_SECTION_NAME): Delete.
+ (lit_state struct): Remove segment names, init_lit_seg, and
+ fini_lit_seg. Add lit_prefix and current_text_seg.
+ (init_literal_head_h, init_literal_head): Delete.
+ (fini_literal_head_h, fini_literal_head): Delete.
+ (xtensa_begin_directive): Move argument parsing to
+ xtensa_literal_prefix function.
+ (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
+ (xtensa_literal_prefix): Parse the directive argument here and
+ record it in the lit_prefix field. Remove code to derive literal
+ section names.
+ (linkonce_len): New.
+ (get_is_linkonce_section): Use linkonce_len. Check for any
+ ".gnu.linkonce.*" section, not just text sections.
+ (md_begin): Remove initialization of deleted lit_state fields.
+ (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
+ to init_literal_head and fini_literal_head.
+ (xtensa_move_literals): Likewise. Skip literals for .init and .fini
+ when traversing literal_head list.
+ (match_section_group): New.
+ (cache_literal_section): Rewrite to determine the literal section
+ name on the fly, create the section and return it.
+ (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
+ (xtensa_switch_to_non_abs_literal_fragment): Likewise.
+ (xtensa_create_property_segments, xtensa_create_xproperty_segments):
+ Use xtensa_get_property_section from bfd.
+ (retrieve_xtensa_section): Delete.
+ * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
+ description to refer to plural literal sections and add xref to
+ the Literal Directive section.
+ (Literal Directive): Describe new rules for deriving literal section
+ names. Add footnote for special case of .init/.fini with
+ --text-section-literals.
+ (Literal Prefix Directive): Replace old naming rules with xref to the
+ Literal Directive section.
+
+2006-08-21 Joseph Myers <joseph@codesourcery.com>
+
+ * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
+ merging with previous long opcode.
+
+2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
+
+ * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
+ * Makefile.in: Regenerate.
+ * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
+ renamed. Adjust.
+
+2006-08-16 Julian Brown <julian@codesourcery.com>
+
+ * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
+ to use ARM instructions on non-ARM-supporting cores.
+ (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
+ mode automatically based on cpu variant.
+ (md_begin): Call above function.
+
+2006-08-16 Julian Brown <julian@codesourcery.com>
+
+ * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
+ recognized in non-unified syntax mode.
+
+2006-08-15 Thiemo Seufer <ths@mips.com>
+ Nigel Stephens <nigel@mips.com>
+ David Ung <davidu@mips.com>
+
+ * configure.tgt: Handle mips*-sde-elf*.
+
+2006-08-12 Thiemo Seufer <ths@networkno.de>
+
+ * config/tc-mips.c (mips16_ip): Fix argument register handling
+ for restore instruction.
+
+2006-08-08 Bob Wilson <bob.wilson@acm.org>
+
+ * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
+ (out_sleb128): New.
+ (out_fixed_inc_line_addr): New.
+ (process_entries): Use out_fixed_inc_line_addr when
+ DWARF2_USE_FIXED_ADVANCE_PC is set.
+ * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
+
+2006-08-08 DJ Delorie <dj@redhat.com>
+
+ * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
+ vs full symbols so that we never have more than one pointer value
+ for any given symbol in our symbol table.
+
+2006-08-08 Sterling Augustine <sterling@tensilica.com>
+
+ * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
+ and emit DW_AT_ranges when code in compilation unit is not
+ contiguous.
+ (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
+ is not contiguous.
+ (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
+ (out_debug_ranges): New function to emit .debug_ranges section
+ when code is not contiguous.
+
+2006-08-08 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (WARN_DEPRECATED): Enable.
+
+2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
+
+ * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
+ only block.
+ (pe_directive_secrel) [TE_PE]: New function.
+ (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
+ loc, loc_mark_labels.
+ [TE_PE]: Handle secrel32.
+ (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
+ call.
+ (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
+ (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
+ (md_section_align): Only round section sizes here for AOUT
+ targets.
+ (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
+ (tc_pe_dwarf2_emit_offset): New function.
+ (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
+ (cons_fix_new_arm): Handle O_secrel.
+ * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
+ DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
+ of OBJ_ELF only block.
+ [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
+ tc_pe_dwarf2_emit_offset.
+
+2006-08-04 Richard Sandiford <richard@codesourcery.com>
+
+ * config/tc-sh.c (apply_full_field_fix): New function.
+ (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
+ in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
+ (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
+ * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
+
+2006-08-03 Nick Clifton <nickc@redhat.com>
+
+ PR gas/2991
+ * config.in: Regenerate.
+
+2006-08-03 Joseph Myers <joseph@codesourcery.com>
+
+ * config/tc-arm.c (parse_operands): Handle invalid register name
+ for OP_RIWR_RIWC.
+
+2006-08-03 Joseph Myers <joseph@codesourcery.com>
+
+ * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
+ (parse_operands): Handle it.
+ (insns): Use it for tmcr and tmrc.
+
+2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
+
+ PR binutils/2983
+ * config/tc-i386.c (md_parse_option): Treat any target starting
+ with elf64_x86_64 as a viable target for the -64 switch.
+ (i386_target_format): For 64-bit ELF flavoured output use
+ ELF_TARGET_FORMAT64.
+ * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
+
+2006-08-02 Nick Clifton <nickc@redhat.com>
+
+ PR gas/2991
+ * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
+ bfd/aclocal.m4.
+ * configure.in: Run BFD_BINARY_FOPEN.
+ * configure: Regenerate.
+ * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
+ file to include.
+
+2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (md_assemble): Don't update
+ cpu_arch_isa_flags.
+
+2006-08-01 Thiemo Seufer <ths@mips.com>
+
+ * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
+
+2006-08-01 Thiemo Seufer <ths@mips.com>
+
+ * config/tc-mips.c (macro_build_lui): Fix comment formatting.
+ (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
+ BFD_RELOC_32 and BFD_RELOC_16.
+ (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
+ md_convert_frag, md_obj_end): Fix comment formatting.
+
+2006-07-31 Thiemo Seufer <ths@mips.com>
+
+ * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
+ handling for BFD_RELOC_MIPS16_JMP.
+
+2006-07-24 Andreas Schwab <schwab@suse.de>
+
+ PR/2756
+ * read.c (read_a_source_file): Ignore unknown text after line
+ comment character. Fix misleading comment.
+
+2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
+ doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
+ doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
+ doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
+ doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
+ doc/c-z80.texi, doc/internals.texi: Fix some typos.
+
+2006-07-21 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
+ linker testsuite.
+
+2006-07-20 Thiemo Seufer <ths@mips.com>
+ Nigel Stephens <nigel@mips.com>
+
+ * config/tc-mips.c (md_parse_option): Don't infer optimisation
+ options from debug options.
+
+2006-07-20 Thiemo Seufer <ths@mips.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
+ (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
+
+2006-07-19 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (insns): Fix rbit Arm opcode.
+
+2006-07-18 Paul Brook <paul@codesourcery.com>
+
+ * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
+ (md_convert_frag): Use correct reloc for add_pc. Use
+ BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
+ (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
+ (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
+
+2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
+
+ * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
+ when file and line unknown.
+
+2006-07-17 Thiemo Seufer <ths@mips.com>
+
+ * read.c (s_struct): Use IS_ELF.
+ * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
+ md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
+ tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
+ s_mips_mask): Likewise.
+
+2006-07-16 Thiemo Seufer <ths@mips.com>
+ David Ung <davidu@mips.com>
+
+ * read.c (s_struct): Handle ELF section changing.
+ * config/tc-mips.c (s_align): Leave enabling auto-align to the
+ generic code.
+ (s_change_sec): Try section changing only if we output ELF.
+
+2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
+ CpuAmdFam10.
+ (smallest_imm_type): Remove Cpu086.
+ (i386_target_format): Likewise.
+
+ * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
+ Update CpuXXX.
+
+2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+ Michael Meissner <michael.meissner@amd.com>
+
+ * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
+ (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
+ * config/tc-i386.c (cpu_arch): Add support for AmdFam10
+ architecture.
+ (i386_align_code): Ditto.
+ (md_assemble_code): Add support for insertq/extrq instructions,
+ swapping as needed for intel syntax.
+ (swap_imm_operands): New function to swap immediate operands.
+ (swap_operands): Deal with 4 operand instructions.
+ (build_modrm_byte): Add support for insertq instruction.
+
+2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.h (Size64): Fix a typo in comment.
+
+2006-07-12 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
+ fixup_segment() to repeat a range check on a value that has
+ already been checked here.
+
+2006-07-07 James E Wilson <wilson@specifix.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
+
+2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
+ Nick Clifton <nickc@redhat.com>
+
+ PR binutils/2877
+ * doc/as.texi: Fix spelling typo: branchs => branches.
+ * doc/c-m68hc11.texi: Likewise.
+ * config/tc-m68hc11.c: Likewise.
+ Support old spelling of command line switch for backwards
+ compatibility.
+
+2006-07-04 Thiemo Seufer <ths@mips.com>
+ David Ung <davidu@mips.com>
+
+ * config/tc-mips.c (s_is_linkonce): New function.
+ (mips16_mark_labels): Don't adjust mips16 symbol addresses for
+ weak, external, and linkonce symbols.
+ (pic_need_relax): Use s_is_linkonce.
+
+2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/as.texinfo (Org): Remove space.
+ (P2align): Add "@var{abs-expr},".
+
+2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch_tune_set): New.
+ (cpu_arch_isa): Likewise.
+ (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
+ nops with short or long nop sequences based on -march=/.arch
+ and -mtune=.
+ (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
+ set cpu_arch_tune and cpu_arch_tune_flags.
+ (md_parse_option): For -march=, set cpu_arch_isa and set
+ cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
+ 0. Set cpu_arch_tune_set to 1 for -mtune=.
+ (i386_target_format): Don't set cpu_arch_tune.
+
+2006-06-23 Nigel Stephens <nigel@mips.com>
+
+ * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
+ generated .sbss.* and .gnu.linkonce.sb.*.
+
+2006-06-23 Thiemo Seufer <ths@mips.com>
+ David Ung <davidu@mips.com>
+
+ * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
+ label_list.
+ * config/tc-mips.c (label_list): Define per-segment label_list.
+ (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
+ append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
+ mips_from_file_after_relocs, mips_define_label): Use per-segment
+ label_list.
+
+2006-06-22 Thiemo Seufer <ths@mips.com>
+
+ * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
+ (append_insn): Use it.
+ (md_apply_fix): Whitespace formatting.
+ (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
+ mips16_extended_frag): Remove register specifier.
+ (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
+ constants.
+
+2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
+
+ * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
+ a directive saving VFP registers for ARMv6 or later.
+ (s_arm_unwind_save): Add parameter arch_v6 and call
+ s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
+ appropriate.
+ (md_pseudo_table): Add entry for new "vsave" directive.
+ * doc/c-arm.texi: Correct error in example for "save"
+ directive (fstmdf -> fstmdx). Also document "vsave" directive.
+
+2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
+ Anatoly Sokolov <aesok@post.ru>
+
+ * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
+ and atmega644p devices. Rename atmega164/atmega324 devices to
+ atmega164p/atmega324p.
+ * doc/c-avr.texi: Document new mcu and arch options.
+
+2006-06-17 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (enum parse_operand_result): Move outside of
+ #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
+
+2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.h (processor_type): New.
+ (arch_entry): Add type.
+
+ * config/tc-i386.c (cpu_arch_tune): New.
+ (cpu_arch_tune_flags): Likewise.
+ (cpu_arch_isa_flags): Likewise.
+ (cpu_arch): Updated.
+ (set_cpu_arch): Also update cpu_arch_isa_flags.
+ (md_assemble): Update cpu_arch_isa_flags.
+ (OPTION_MARCH): New.
+ (OPTION_MTUNE): Likewise.
+ (md_longopts): Add -march= and -mtune=.
+ (md_parse_option): Support -march= and -mtune=.
+ (md_show_usage): Add -march=CPU/-mtune=CPU.
+ (i386_target_format): Also update cpu_arch_isa_flags,
+ cpu_arch_tune and cpu_arch_tune_flags.
+
+ * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
+
+ * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
+
+2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
+
+ * config/tc-arm.c (enum parse_operand_result): New.
+ (struct group_reloc_table_entry): New.
+ (enum group_reloc_type): New.
+ (group_reloc_table): New array.
+ (find_group_reloc_table_entry): New function.
+ (parse_shifter_operand_group_reloc): New function.
+ (parse_address_main): New function, incorporating code
+ from the old parse_address function. To be used via...
+ (parse_address): wrapper for parse_address_main; and
+ (parse_address_group_reloc): new function, likewise.
+ (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
+ OP_ADDRGLDRS, OP_ADDRGLDC.
+ (parse_operands): Support for these new operand codes.
+ New macro po_misc_or_fail_no_backtrack.
+ (encode_arm_cp_address): Preserve group relocations.
+ (insns): Modify to use the above operand codes where group
+ relocations are permitted.
+ (md_apply_fix): Handle the group relocations
+ ALU_PC_G0_NC through LDC_SB_G2.
+ (tc_gen_reloc): Likewise.
+ (arm_force_relocation): Leave group relocations for the linker.
+ (arm_fix_adjustable): Likewise.
+
+2006-06-15 Julian Brown <julian@codesourcery.com>
+
+ * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
+ (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
+ relocs properly.
+
+2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_suffix): Don't add rex64 for
+ "xchg %rax,%rax".
+
+2006-06-09 Thiemo Seufer <ths@mips.com>
+
+ * config/tc-mips.c (mips_ip): Maintain argument count.
+
+2006-06-09 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-iq2000.c: Include sb.h.
+
+2006-06-08 Nigel Stephens <nigel@mips.com>
+
+ * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
+ aliases for better compatibility with SGI tools.
+
+2006-06-08 Alan Modra <amodra@bigpond.net.au>
+
+ * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
+ * Makefile.am (GASLIBS): Expand @BFDLIB@.
+ (BFDVER_H): Delete.
+ (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
+ (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
+ (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
+ Run "make dep-am".
+ * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
+ * Makefile.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
+
+ * po/Make-in (pdf, ps): New dummy targets.
+
+2006-06-07 Julian Brown <julian@codesourcery.com>
+
+ * config/tc-arm.c (stdarg.h): include.
+ (arm_it): Add uncond_value field. Add isvec and issingle to operand
+ array.
+ (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
+ REG_TYPE_NSDQ (single, double or quad vector reg).
+ (reg_expected_msgs): Update.
+ (BAD_FPU): Add macro for unsupported FPU instruction error.
+ (parse_neon_type): Support 'd' as an alias for .f64.
+ (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
+ sets of registers.
+ (parse_vfp_reg_list): Don't update first arg on error.
+ (parse_neon_mov): Support extra syntax for VFP moves.
+ (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
+ OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
+ (parse_operands): Support isvec, issingle operands fields, new parse
+ codes above.
+ (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
+ msr variants.
+ (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
+ (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
+ (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
+ (NEON_SHAPE_DEF): New macro. Define table of possible instruction
+ shapes.
+ (neon_shape): Redefine in terms of above.
+ (neon_shape_class): New enumeration, table of shape classes.
+ (neon_shape_el): New enumeration. One element of a shape.
+ (neon_shape_el_size): Register widths of above, where appropriate.
+ (neon_shape_info): New struct. Info for shape table.
+ (neon_shape_tab): New array.
+ (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
+ (neon_check_shape): Rewrite as...
+ (neon_select_shape): New function to classify instruction shapes,
+ driven by new table neon_shape_tab array.
+ (neon_quad): New function. Return 1 if shape should set Q flag in
+ instructions (or equivalent), 0 otherwise.
+ (type_chk_of_el_type): Support F64.
+ (el_type_of_type_chk): Likewise.
+ (neon_check_type): Add support for VFP type checking (VFP data
+ elements fill their containing registers).
+ (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
+ in thumb mode for VFP instructions.
+ (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
+ and encode the current instruction as if it were that opcode.
+ (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
+ arguments, call function in PFN.
+ (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
+ (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
+ (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
+ (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
+ (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
+ Redirect Neon-syntax VFP instructions to VFP instruction handlers.
+ (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
+ (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
+ (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
+ (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
+ (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
+ (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
+ (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
+ (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
+ (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
+ neon_quad.
+ (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
+ between VFP and Neon turns out to belong to Neon. Perform
+ architecture check and fill in condition field if appropriate.
+ (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
+ (do_neon_cvt): Add support for VFP variants of instructions.
+ (neon_cvt_flavour): Extend to cover VFP conversions.
+ (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
+ vmov variants.
+ (do_neon_ldr_str): Handle single-precision VFP load/store.
+ (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
+ NS_NULL not NS_IGNORE.
+ (opcode_tag): Add OT_csuffixF for operands which either take a
+ conditional suffix, or have 0xF in the condition field.
+ (md_assemble): Add support for OT_csuffixF.
+ (NCE): Replace macro with...
+ (NCE_tag, NCE, NCEF): New macros.
+ (nCE): Replace macro with...
+ (nCE_tag, nCE, nCEF): New macros.
+ (insns): Add support for VFP insns or VFP versions of insns msr,
+ mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
+ vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
+ vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
+ VFP/Neon insns together.
+
+2006-06-07 Alan Modra <amodra@bigpond.net.au>
+ Ladislav Michl <ladis@linux-mips.org>
+
+ * app.c: Don't include headers already included by as.h.
+ * as.c: Likewise.
+ * atof-generic.c: Likewise.
+ * cgen.c: Likewise.
+ * dwarf2dbg.c: Likewise.
+ * expr.c: Likewise.
+ * input-file.c: Likewise.
+ * input-scrub.c: Likewise.
+ * macro.c: Likewise.
+ * output-file.c: Likewise.
+ * read.c: Likewise.
+ * sb.c: Likewise.
+ * config/bfin-lex.l: Likewise.
+ * config/obj-coff.h: Likewise.
+ * config/obj-elf.h: Likewise.
+ * config/obj-som.h: Likewise.
+ * config/tc-arc.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-avr.c: Likewise.
+ * config/tc-bfin.c: Likewise.
+ * config/tc-cris.c: Likewise.
+ * config/tc-d10v.c: Likewise.
+ * config/tc-d30v.c: Likewise.
+ * config/tc-dlx.h: Likewise.
+ * config/tc-fr30.c: Likewise.
+ * config/tc-frv.c: Likewise.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-hppa.c: Likewise.
+ * config/tc-i370.c: Likewise.
+ * config/tc-i860.c: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-ip2k.c: Likewise.
+ * config/tc-iq2000.c: Likewise.
+ * config/tc-m32c.c: Likewise.
+ * config/tc-m32r.c: Likewise.
+ * config/tc-maxq.c: Likewise.
+ * config/tc-mcore.c: Likewise.
+ * config/tc-mips.c: Likewise.
+ * config/tc-mmix.c: Likewise.
+ * config/tc-mn10200.c: Likewise.
+ * config/tc-mn10300.c: Likewise.
+ * config/tc-msp430.c: Likewise.
+ * config/tc-mt.c: Likewise.
+ * config/tc-ns32k.c: Likewise.
+ * config/tc-openrisc.c: Likewise.
+ * config/tc-ppc.c: Likewise.
+ * config/tc-s390.c: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-sh64.c: Likewise.
+ * config/tc-sparc.c: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * config/tc-tic54x.c: Likewise.
+ * config/tc-v850.c: Likewise.
+ * config/tc-vax.c: Likewise.
+ * config/tc-xc16x.c: Likewise.
+ * config/tc-xstormy16.c: Likewise.
+ * config/tc-xtensa.c: Likewise.
+ * config/tc-z80.c: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * macro.h: Don't include sb.h or ansidecl.h.
+ * sb.h: Don't include stdio.h or ansidecl.h.
+ * cond.c: Include sb.h.
+ * itbl-lex.l: Include as.h instead of other system headers.
+ * itbl-parse.y: Likewise.
+ * itbl-ops.c: Similarly.
+ * itbl-ops.h: Don't include as.h or ansidecl.h.
+ * config/bfin-defs.h: Don't include bfd.h or as.h.
+ * config/bfin-parse.y: Include as.h instead of other system headers.
+
+2006-06-06 Ben Elliston <bje@au.ibm.com>
+ Anton Blanchard <anton@samba.org>
+
+ * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
+ (md_show_usage): Document it.
+ (ppc_setup_opcodes): Test power6 opcode flag bits.
+ * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
+
+2006-06-06 Thiemo Seufer <ths@mips.com>
+ Chao-ying Fu <fu@mips.com>
+
+ * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
+ (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
+ (macro_build): Update comment.
+ (mips_ip): Allow DSP64 instructions for MIPS64R2.
+ (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
+ CPU_HAS_MDMX.
+ (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
+ MIPS_CPU_ASE_MDMX flags for sb1.
+
+2006-06-05 Thiemo Seufer <ths@mips.com>
+
+ * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
+ appropriate.
+ (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
+ (mips_ip): Make overflowed/underflowed constant arguments in DSP
+ and MT instructions a fatal error. Use INSERT_OPERAND where
+ appropriate. Improve warnings for break and wait code overflows.
+ Use symbolic constant of OP_MASK_COPZ.
+ (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
+
+2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * po/Make-in (top_builddir): Define.
+
+2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
+
+ * doc/Makefile.am (TEXI2DVI): Define.
+ * doc/Makefile.in: Regenerate.
+ * doc/c-arc.texi: Fix typo.
+
+2006-06-01 Alan Modra <amodra@bigpond.net.au>
+
+ * config/obj-ieee.c: Delete.
+ * config/obj-ieee.h: Delete.
+ * Makefile.am (OBJ_FORMATS): Remove ieee.
+ (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
+ (obj-ieee.o): Remove rule.
+ * Makefile.in: Regenerate.
+ * configure.in (atof): Remove tahoe.
+ (OBJ_MAYBE_IEEE): Don't define.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
+ and LIBINTL_DEP everywhere.
+ (INTLLIBS): Remove.
+ (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
+ * acinclude.m4: Include new gettext macros.
+ * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
+ Remove local code for po/Makefile.
+ * Makefile.in, configure, doc/Makefile.in: Regenerated.
+
+2006-05-30 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+
+2006-05-06 Denis Chertykov <denisc@overta.ru>
+
+ * doc/c-avr.texi: New file.
+ * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
+ * doc/all.texi: Set AVR
+ * doc/as.texinfo: Include c-avr.texi
+
+2006-05-28 Jie Zhang <jie.zhang@analog.com>
+
+ * config/bfin-parse.y (check_macfunc): Loose the condition of
+ calling check_multiply_halfregs ().
+
+2006-05-25 Jie Zhang <jie.zhang@analog.com>
+
+ * config/bfin-parse.y (asm_1): Better check and deal with
+ vector and scalar Multiply 16-Bit Operands instructions.
+
2006-05-24 Nick Clifton <nickc@redhat.com>
* config/tc-hppa.c: Convert to ISO C90 format.
projects / deliverable / binutils-gdb.git / blobdiff