+2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
+
+ * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11, add subdir-objects.
+ (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O): Add config/ prefix.
+ * configure.ac (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O, emfiles,
+ extra_objects): Add config/ prefix.
+ * doc/as.texinfo: Rename to...
+ * doc/as.texi: ... this.
+ * doc/Makefile.am: Rename as.texinfo to as.texi throughout.
+ Remove DISTCLEANFILES hack.
+ (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add no-texinfo.tex and
+ info-in-builddir.
+ * Makefile.in: Re-generate.
+ * aclocal.m4: Re-generate.
+ * config.in: Re-generate.
+ * configure: Re-generate.
+ * doc/Makefile.in: Re-generate.
+
+2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
+
+ * NEWS: Mention MIPS Global INValidate ASE support.
+ * config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV.
+ (md_longopts): Likewise.
+ (mips_ases): Define availability for GINV.
+ (mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV.
+ (md_show_usage): Add help for -mginv and -mno-ginv.
+ * doc/as.texinfo: Document -mginv, -mno-ginv.
+ * doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and
+ .set noginv.
+ * testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV
+ ASE.
+ * testsuite/gas/mips/ase-errors-2.s: Likewise.
+ * testsuite/gas/mips/ase-errors-1.l: Likewise.
+ * testsuite/gas/mips/ase-errors-2.l: Likewise.
+ * testsuite/gas/mips/ginv.d: New test.
+ * testsuite/gas/mips/ginv-err.d: New test.
+ * testsuite/gas/mips/ginv-err.l: New test stderr output.
+ * testsuite/gas/mips/ginv.s: New test source.
+ * testsuite/gas/mips/ginv-err.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
+ Faraz Shahbazker <Faraz.Shahbazker@mips.com>
+ Maciej W. Rozycki <macro@mips.com>
+
+ * NEWS: Mention CRC ASE support.
+ * config/tc-mips.c (options): Add OPTION_CRC and OPTION_NO_CRC.
+ (md_longopts): Likewise.
+ (md_show_usage): Add help for -mcrc and -mno-crc.
+ (mips_ases): Define availability for CRC and CRC64.
+ (mips_convert_ase_flags): Map ASE_CRC to AFL_ASE_CRC.
+ * doc/as.texinfo: Document -mcrc, -mno-crc.
+ * doc/c-mips.texi: Document -mcrc, -mno-crc, .set crc and
+ .set no-crc.
+ * testsuite/gas/mips/ase-errors-1.l: Add error checks for CRC
+ ASE.
+ * testsuite/gas/mips/ase-errors-2.l: Likewise.
+ * testsuite/gas/mips/ase-errors-1.s: Likewise.
+ * testsuite/gas/mips/ase-errors-2.s: Likewise.
+ * testsuite/gas/mips/crc.d: New test.
+ * testsuite/gas/mips/crc64.d: New test.
+ * testsuite/gas/mips/crc-err.d: New test.
+ * testsuite/gas/mips/crc64-err.d: New test.
+ * testsuite/gas/mips/crc-err.l: New test stderr output.
+ * testsuite/gas/mips/crc64-err.l: New test stderr output.
+ * testsuite/gas/mips/crc.s: New test source.
+ * testsuite/gas/mips/crc64.s: New test source.
+ * testsuite/gas/mips/crc-err.s: New test source.
+ * testsuite/gas/mips/crc64-err.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-06-11 Maciej W. Rozycki <macro@mips.com>
+
+ * config/tc-mips.c (md_show_usage): Correct help text for `-O0'
+ and `-O'. Mention `-O1'. Add `-O2' and its description.
+
+2018-06-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add Cortex-A76 entry.
+ * doc/c-arm.texi (-mcpu): Document cortex-a76.
+
+2018-06-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add Cortex-A76 entry.
+ * doc/c-aarch64.texi (-mcpu): Document cortex-a76.
+
+2018-06-08 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com>
+
+ PR 20319
+ * testsuite/gas/aarch64/illegal-3.s: Test if unallocated FMOV encodings
+ are detected as undefined.
+ * testsuite/gas/aarch64/illegal-3.d: Likewise.
+ * testsuite/gas/aarch64/illegal.s: Test if FMOV instructions that are
+ changing the size from 32 bits to 64 bits and vice versa trigger an
+ error.
+ * testsuite/gas/aarch64/illegal.l: Likewise.
+
+2018-06-08 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * tc-aarch64.c (record_operand_error, record_operand_error_with_data):
+ Initialize non_fatal.
+
+2018-06-06 Sameera Deshpande <sameera.deshpande@linaro.org>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add support of ARMv8.4 in
+ saphira.
+
+2018-06-05 Alan Modra <amodra@gmail.com>
+
+ * Makefile.in: Regenerate.
+
+2018-06-04 Volodymyr Arbatov <arbatov@cadence.com>
+
+ * config/tc-xtensa.c (elf32xtensa_separate_props): New
+ declaration.
+ (option_separate_props, option_no_separate_props): New
+ enumeration constants.
+ (md_longopts): Add separate-prop-tables option.
+ (md_parse_option): Add cases for option_separate_props and
+ option_no_separate_props.
+ (md_show_usage): Add help for [no-]separate-prop-tables options.
+
+2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2018-06-01 Alexandre Oliva <aoliva@redhat.com>
+
+ * dwarf2dbg.c (dwarf2_consume_line_info): Drop view.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/ilp32/x86-64-opcode.d,
+ testsuite/gas/i386/x86-64-opcode.d: Adjust expectations.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (add_prefix): Check REX bits individually.
+ * testsuite/gas/i386/rex.s: Add tests for overriding individual
+ REX bits, including when others are already set.
+ * testsuite/gas/i386/ilp32/rex.d, testsuite/gas/i386/rex.d:
+ Adjust expectations.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (control): Delete.
+ (parse_real_register): Simply check "control" bit. Re-wrap.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (build_modrm_byte): Drop REX_B from condition
+ checking for the need of emitting LOCK. Check "control" bit just
+ once.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/invpcid.s,
+ testsuite/gas/i386/x86-64-invpcid.s: Add test with explicit
+ "oword ptr".
+ * testsuite/gas/i386/invpcid.d,
+ testsuite/gas/i386/invpcid-intel.d,
+ testsuite/gas/i386/x86-64-invpcid.d,
+ testsuite/gas/i386/x86-64-invpcid-intel.d: Adjust expectations.
+
+2018-05-30 Amit Pawar <amit.pawar@amd.com>
+
+ * config/tc-i386.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
+ * doc/c-i386.texi : Document znver2.
+ * gas/testsuite/gas/i386/arch-13.s: Updated for znver2.
+ * gas/testsuite/gas/i386/arch-13.d: Updated.
+ * gas/testsuite/gas/i386/arch-13-znver1.d: Updated.
+ * gas/testsuite/gas/i386/arch-13-znver2.d: New file.
+ * gas/testsuite/gas/i386/x86-64-arch-3.s: Updated for znver2.
+ * gas/testsuite/gas/i386/x86-64-arch-3.d: Updated.
+ * gas/testsuite/gas/i386/x86-64-arch-3-znver1.d: Updated.
+ * gas/testsuite/gas/i386/x86-64-arch-3-znver2.d: New file.
+ * gas/testsuite/gas/i386/i386.exp: Updated for new test.
+
+2018-05-25 Alan Modra <amodra@gmail.com>
+
+ * po/POTFILES.in: Regenerate.
+
+2018-05-24 Jim Wilson <jimw@sifive.com>
+
+ PR gas/23219
+ * config/tc-riscv.c (riscv_frag_align_code): Move frag_more call after
+ !riscv_opts.relax check.
+ (riscv_handle_align): Rewrite !riscv_opts.relax support.
+ * config/tc-riscv (MAX_MEM_FOR_RS_ALIGN_CODE): Update.
+ * testsuite/gas/riscv/no-relax-align.d: New
+ * testsuite/gas/riscv/no-relax-align.s: New
+ * testsuite/gas/riscv/no-relax-align-2.d: New
+ * testsuite/gas/riscv/no-relax-align-2.s: New
+
+2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
+
+ * config/tc-ppc.c (md_assemble): Delete handling of fake operands.
+ * testsuite/gas/ppc/common.s (crmove, cror, or., or, nor., nor): Add
+ test of extended mnemonics.
+ * testsuite/gas/ppc/common.d: Likewise. Don't match instruction offset.
+ * testsuite/gas/ppc/spe.s (evor, evnor): Add test of extended mnemonics.
+ * testsuite/gas/ppc/spe.d: Likewise. Don't match instruction offset.
+
+2018-05-18 Kito Cheng <kito.cheng@gmail.com>
+ Monk Chiang <sh.chiang04@gmail.com>
+ Jim Wilson <jimw@sifive.com>
+
+ * config/tc-riscv.c (rve_abi): New.
+ (riscv_set_options): Add rve field. Initialize it.
+ (riscv_set_rve) New function.
+ (riscv_set_arch): Support 'e' ISA subset.
+ (reg_lookup_internal): If rve, check register is available.
+ (riscv_set_abi): New parameter rve.
+ (md_parse_option): Pass new argument to riscv_set_abi.
+ (riscv_after_parse_args): Call riscv_set_rve. If rve_abi, set
+ EF_RISCV_RVE.
+ * doc/c-riscv.texi (-mabi): Document new ilp32e argument.
+
+2018-05-18 John Darrington <john@darrington.wattle.id.au>
+
+ * Makefile.am: Add support for s12z target.
+ * Makefile.in: Regenerate.
+ * NEWS: Mention the new support.
+ * config/tc-s12z.c: New file.
+ * config/tc-s12z.h: New file.
+ * configure.tgt: Add s12z support.
+ * doc/Makefile.am: Likewise.
+ * doc/Makefile.in: Regenerate.
+ * doc/all.texi: Add s12z documentation.
+ * doc/as.textinfo: Likewise.
+ * doc/c-s12z.texi: New file.
+ * testsuite/gas/s12z: New directory.
+ * testsuite/gas/s12z/abs.d: New file.
+ * testsuite/gas/s12z/abs.s: New file.
+ * testsuite/gas/s12z/adc-imm.d: New file.
+ * testsuite/gas/s12z/adc-imm.s: New file.
+ * testsuite/gas/s12z/adc-opr.d: New file.
+ * testsuite/gas/s12z/adc-opr.s: New file.
+ * testsuite/gas/s12z/add-imm.d: New file.
+ * testsuite/gas/s12z/add-imm.s: New file.
+ * testsuite/gas/s12z/add-opr.d: New file.
+ * testsuite/gas/s12z/add-opr.s: New file.
+ * testsuite/gas/s12z/and-imm.d: New file.
+ * testsuite/gas/s12z/and-imm.s: New file.
+ * testsuite/gas/s12z/and-opr.d: New file.
+ * testsuite/gas/s12z/and-opr.s: New file.
+ * testsuite/gas/s12z/and-or-cc.d: New file.
+ * testsuite/gas/s12z/and-or-cc.s: New file.
+ * testsuite/gas/s12z/bfext-special.d: New file.
+ * testsuite/gas/s12z/bfext-special.s: New file.
+ * testsuite/gas/s12z/bfext.d: New file.
+ * testsuite/gas/s12z/bfext.s: New file.
+ * testsuite/gas/s12z/bit-manip.d: New file.
+ * testsuite/gas/s12z/bit-manip.s: New file.
+ * testsuite/gas/s12z/bit.d: New file.
+ * testsuite/gas/s12z/bit.s: New file.
+ * testsuite/gas/s12z/bra-expression-defined.d: New file.
+ * testsuite/gas/s12z/bra-expression-defined.s: New file.
+ * testsuite/gas/s12z/bra-expression-undef.d: New file.
+ * testsuite/gas/s12z/bra-expression-undef.s: New file.
+ * testsuite/gas/s12z/bra.d: New file.
+ * testsuite/gas/s12z/bra.s: New file.
+ * testsuite/gas/s12z/brclr-symbols.d: New file.
+ * testsuite/gas/s12z/brclr-symbols.s: New file.
+ * testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
+ * testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
+ * testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
+ * testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
+ * testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
+ * testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
+ * testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
+ * testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
+ * testsuite/gas/s12z/clb.d: New file.
+ * testsuite/gas/s12z/clb.s: New file.
+ * testsuite/gas/s12z/clr-opr.d: New file.
+ * testsuite/gas/s12z/clr-opr.s: New file.
+ * testsuite/gas/s12z/clr.d: New file.
+ * testsuite/gas/s12z/clr.s: New file.
+ * testsuite/gas/s12z/cmp-imm.d: New file.
+ * testsuite/gas/s12z/cmp-imm.s: New file.
+ * testsuite/gas/s12z/cmp-opr-inc.d: New file.
+ * testsuite/gas/s12z/cmp-opr-inc.s: New file.
+ * testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
+ * testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
+ * testsuite/gas/s12z/cmp-opr-reg.d: New file.
+ * testsuite/gas/s12z/cmp-opr-reg.s: New file.
+ * testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
+ * testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
+ * testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
+ * testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
+ * testsuite/gas/s12z/cmp-opr-xys.d: New file.
+ * testsuite/gas/s12z/cmp-opr-xys.s: New file.
+ * testsuite/gas/s12z/cmp-s-imm.d: New file.
+ * testsuite/gas/s12z/cmp-s-imm.s: New file.
+ * testsuite/gas/s12z/cmp-s-opr.d: New file.
+ * testsuite/gas/s12z/cmp-s-opr.s: New file.
+ * testsuite/gas/s12z/cmp-xy.d: New file.
+ * testsuite/gas/s12z/cmp-xy.s: New file.
+ * testsuite/gas/s12z/com-opr.d: New file.
+ * testsuite/gas/s12z/com-opr.s: New file.
+ * testsuite/gas/s12z/complex-shifts.d: New file.
+ * testsuite/gas/s12z/complex-shifts.s: New file.
+ * testsuite/gas/s12z/db-tb-cc-opr.d: New file.
+ * testsuite/gas/s12z/db-tb-cc-opr.s: New file.
+ * testsuite/gas/s12z/db-tb-cc-reg.d: New file.
+ * testsuite/gas/s12z/db-tb-cc-reg.s: New file.
+ * testsuite/gas/s12z/dbCC.d: New file.
+ * testsuite/gas/s12z/dbCC.s: New file.
+ * testsuite/gas/s12z/dec-opr.d: New file.
+ * testsuite/gas/s12z/dec-opr.s: New file.
+ * testsuite/gas/s12z/dec.d: New file.
+ * testsuite/gas/s12z/dec.s: New file.
+ * testsuite/gas/s12z/div.d: New file.
+ * testsuite/gas/s12z/div.s: New file.
+ * testsuite/gas/s12z/eor.d: New file.
+ * testsuite/gas/s12z/eor.s: New file.
+ * testsuite/gas/s12z/exg.d: New file.
+ * testsuite/gas/s12z/exg.s: New file.
+ * testsuite/gas/s12z/ext24-ld-xy.d: New file.
+ * testsuite/gas/s12z/ext24-ld-xy.s: New file.
+ * testsuite/gas/s12z/inc-opr.d: New file.
+ * testsuite/gas/s12z/inc-opr.s: New file.
+ * testsuite/gas/s12z/inc.d: New file.
+ * testsuite/gas/s12z/inc.s: New file.
+ * testsuite/gas/s12z/inh.d: New file.
+ * testsuite/gas/s12z/inh.s: New file.
+ * testsuite/gas/s12z/jmp.d: New file.
+ * testsuite/gas/s12z/jmp.s: New file.
+ * testsuite/gas/s12z/jsr.d: New file.
+ * testsuite/gas/s12z/jsr.s: New file.
+ * testsuite/gas/s12z/ld-imm-page2.d: New file.
+ * testsuite/gas/s12z/ld-imm-page2.s: New file.
+ * testsuite/gas/s12z/ld-imm.d: New file.
+ * testsuite/gas/s12z/ld-imm.s: New file.
+ * testsuite/gas/s12z/ld-immu18.d: New file.
+ * testsuite/gas/s12z/ld-immu18.s: New file.
+ * testsuite/gas/s12z/ld-large-direct.d: New file.
+ * testsuite/gas/s12z/ld-large-direct.s: New file.
+ * testsuite/gas/s12z/ld-opr.d: New file.
+ * testsuite/gas/s12z/ld-opr.s: New file.
+ * testsuite/gas/s12z/ld-s-opr.d: New file.
+ * testsuite/gas/s12z/ld-s-opr.s: New file.
+ * testsuite/gas/s12z/ld-small-direct.d: New file.
+ * testsuite/gas/s12z/ld-small-direct.s: New file.
+ * testsuite/gas/s12z/lea-immu18.d: New file.
+ * testsuite/gas/s12z/lea-immu18.s: New file.
+ * testsuite/gas/s12z/lea.d: New file.
+ * testsuite/gas/s12z/lea.s: New file.
+ * testsuite/gas/s12z/mac.d: New file.
+ * testsuite/gas/s12z/mac.s: New file.
+ * testsuite/gas/s12z/min-max.d: New file.
+ * testsuite/gas/s12z/min-max.s: New file.
+ * testsuite/gas/s12z/mod.d: New file.
+ * testsuite/gas/s12z/mod.s: New file.
+ * testsuite/gas/s12z/mov.d: New file.
+ * testsuite/gas/s12z/mov.s: New file.
+ * testsuite/gas/s12z/mul-imm.d: New file.
+ * testsuite/gas/s12z/mul-imm.s: New file.
+ * testsuite/gas/s12z/mul-opr-opr.d: New file.
+ * testsuite/gas/s12z/mul-opr-opr.s: New file.
+ * testsuite/gas/s12z/mul-opr.d: New file.
+ * testsuite/gas/s12z/mul-opr.s: New file.
+ * testsuite/gas/s12z/mul-reg.d: New file.
+ * testsuite/gas/s12z/mul-reg.s: New file.
+ * testsuite/gas/s12z/mul.d: New file.
+ * testsuite/gas/s12z/mul.s: New file.
+ * testsuite/gas/s12z/neg-opr.d: New file.
+ * testsuite/gas/s12z/neg-opr.s: New file.
+ * testsuite/gas/s12z/not-so-simple-shifts.d: New file.
+ * testsuite/gas/s12z/not-so-simple-shifts.s: New file.
+ * testsuite/gas/s12z/opr-18u.d: New file.
+ * testsuite/gas/s12z/opr-18u.s: New file.
+ * testsuite/gas/s12z/opr-expr.d: New file.
+ * testsuite/gas/s12z/opr-expr.s: New file.
+ * testsuite/gas/s12z/opr-ext-18.d: New file.
+ * testsuite/gas/s12z/opr-ext-18.s: New file.
+ * testsuite/gas/s12z/opr-idx-24-reg.d: New file.
+ * testsuite/gas/s12z/opr-idx-24-reg.s: New file.
+ * testsuite/gas/s12z/opr-idx3-reg.d: New file.
+ * testsuite/gas/s12z/opr-idx3-reg.s: New file.
+ * testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
+ * testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
+ * testsuite/gas/s12z/opr-indirect-expr.d: New file.
+ * testsuite/gas/s12z/opr-indirect-expr.s: New file.
+ * testsuite/gas/s12z/opr-symbol.d: New file.
+ * testsuite/gas/s12z/opr-symbol.s: New file.
+ * testsuite/gas/s12z/or-imm.d: New file.
+ * testsuite/gas/s12z/or-imm.s: New file.
+ * testsuite/gas/s12z/or-opr.d: New file.
+ * testsuite/gas/s12z/or-opr.s: New file.
+ * testsuite/gas/s12z/p2-mul.d: New file.
+ * testsuite/gas/s12z/p2-mul.s: New file.
+ * testsuite/gas/s12z/page2-inh.d: New file.
+ * testsuite/gas/s12z/page2-inh.s: New file.
+ * testsuite/gas/s12z/psh-pul.d: New file.
+ * testsuite/gas/s12z/psh-pul.s: New file.
+ * testsuite/gas/s12z/qmul.d: New file.
+ * testsuite/gas/s12z/qmul.s: New file.
+ * testsuite/gas/s12z/rotate.d: New file.
+ * testsuite/gas/s12z/rotate.s: New file.
+ * testsuite/gas/s12z/s12z.exp: New file.
+ * testsuite/gas/s12z/sat.d: New file.
+ * testsuite/gas/s12z/sat.s: New file.
+ * testsuite/gas/s12z/sbc-imm.d: New file.
+ * testsuite/gas/s12z/sbc-imm.s: New file.
+ * testsuite/gas/s12z/sbc-opr.d: New file.
+ * testsuite/gas/s12z/sbc-opr.s: New file.
+ * testsuite/gas/s12z/shift.d: New file.
+ * testsuite/gas/s12z/shift.s: New file.
+ * testsuite/gas/s12z/simple-shift.d: New file.
+ * testsuite/gas/s12z/simple-shift.s: New file.
+ * testsuite/gas/s12z/single-ops.d: New file.
+ * testsuite/gas/s12z/single-ops.s: New file.
+ * testsuite/gas/s12z/specd6.d: New file.
+ * testsuite/gas/s12z/specd6.s: New file.
+ * testsuite/gas/s12z/st-large-direct.d: New file.
+ * testsuite/gas/s12z/st-large-direct.s: New file.
+ * testsuite/gas/s12z/st-opr.d: New file.
+ * testsuite/gas/s12z/st-opr.s: New file.
+ * testsuite/gas/s12z/st-s-opr.d: New file.
+ * testsuite/gas/s12z/st-s-opr.s: New file.
+ * testsuite/gas/s12z/st-small-direct.d: New file.
+ * testsuite/gas/s12z/st-small-direct.s: New file.
+ * testsuite/gas/s12z/st-xy.d: New file.
+ * testsuite/gas/s12z/st-xy.s: New file.
+ * testsuite/gas/s12z/sub-imm.d: New file.
+ * testsuite/gas/s12z/sub-imm.s: New file.
+ * testsuite/gas/s12z/sub-opr.d: New file.
+ * testsuite/gas/s12z/sub-opr.s: New file.
+ * testsuite/gas/s12z/tfr.d: New file.
+ * testsuite/gas/s12z/tfr.s: New file.
+ * testsuite/gas/s12z/trap.d: New file.
+ * testsuite/gas/s12z/trap.s: New file.
+
+2018-05-16 Maciej W. Rozycki <macro@mips.com>
+
+ * tc-nds32.c (md_assemble): Rename `expr' local variable to
+ `insn_expr'.
+
+2018-05-15 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * testsuite/gas/aarch64/illegal-sysreg-2.s: Fix pmbidr_el1 test.
+ * testsuite/gas/aarch64/illegal-sysreg-2.l: Likewise.
+ * testsuite/gas/aarch64/illegal-sysreg-2.d: Likewise.
+ * testsuite/gas/aarch64/sysreg-diagnostic.s: New.
+ * testsuite/gas/aarch64/sysreg-diagnostic.l: New.
+ * testsuite/gas/aarch64/sysreg-diagnostic.d: New.
+
+2018-05-15 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * config/tc-aarch64.c (print_operands): Indicate no notes.
+ (output_operand_error_record): Support non-fatal errors.
+ (output_operand_error_report, warn_unpredictable_ldst, md_assemble):
+ Likewise.
+
+2018-05-15 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * config/tc-aarch64.c (parse_sys_reg): Return register flags.
+ (parse_operands): Fill in register flags.
+
+2018-05-14 Nick Clifton <nickc@redhat.com>
+
+ * write.c (maybe_generate_build_notes): Generate notes on a
+ per-code-section basis. Skip linkonce sections.
+
+2018-05-14 Nick Clifton <nickc@redhat.com>
+
+ PR 23153
+ * as.c (main): When checking for an output file that is also an
+ input file, also check that the inode is not zero.
+
+2018-05-12 Alan Modra <amodra@gmail.com>
+
+ * config/tc-score.c (s3_do_macro_bcmp): Don't use fixed size
+ buffers.
+ (s3_do_macro_bcmpz): Likewise.
+
+2018-05-10 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-aarch64.c (parse_aarch64_imm_float): Remove restrictions.
+ * testsuite/gas/aarch64/diagnostic.s: Move fmov int test to..
+ * testsuite/gas/aarch64/fpmov.s: Here.
+ * testsuite/gas/aarch64/fpmov.d: Update results with fmov.
+ * testsuite/gas/aarch64/diagnostic.l: Remove fmov values.
+ * testsuite/gas/aarch64/sve-invalid.s: Update test files.
+ * testsuite/gas/aarch64/sve-invalid.l: Likewise
+
+2018-05-10 Tamar Christina <tamar.christina@arm.com>
+
+ * gas/config/tc-arm.c (do_neon_mov): Allow integer literal for float
+ immediate.
+ * testsuite/gas/arm/vfp-mov-enc.s: New.
+ * testsuite/gas/arm/vfp-mov-enc.d: New.
+
+2018-05-09 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (xtensa_is_init_fini): New function.
+ (xtensa_move_literals): Only attempt to assign literal pool to
+ literals with tc_frag_data.is_literal mark and not in .init or
+ .fini sections.
+ Join nested 'if' conditions to simplify function structure.
+ (xtensa_switch_to_non_abs_literal_fragment): Use
+ xtensa_is_init_fini to test for .init/.fini sections.
+ * testsuite/gas/xtensa/all.exp (auto-litpools-3)
+ (auto-litpools-4, text-section-literals-1): New tests.
+ * testsuite/gas/xtensa/auto-litpools-3.d: New test results.
+ * testsuite/gas/xtensa/auto-litpools-3.s: New test source.
+ * testsuite/gas/xtensa/auto-litpools-4.d: New test results.
+ * testsuite/gas/xtensa/auto-litpools-4.s: New test source.
+ * testsuite/gas/xtensa/text-section-literals-1.d: New test results.
+ * testsuite/gas/xtensa/text-section-literals-1.s: New test source.
+
+2018-05-09 Dimitar Dimitrov <dimitar@dinux.eu>
+
+ * config/tc-pru.c (md_apply_fix): Make LDI32 relocation conformant
+ to TI ABI.
+ (pru_assemble_arg_i): Likewise.
+ (output_insn_ldi32): Likewise.
+ * testsuite/gas/pru/ldi.d: Update test for the now fixed LDI32.
+ * gas/config/tc-pru.c (pru_assemble_arg_b): Check imm8 operand range.
+ * gas/testsuite/gas/pru/illegal2.l: New test.
+ * gas/testsuite/gas/pru/illegal2.s: New test.
+ * gas/testsuite/gas/pru/pru.exp: Register new illegal2 test.
+
+2018-05-08 Jim Wilson <jimw@sifive.com>
+
+ * testsuite/gas/riscv/c-zero-imm.d: Add more tests.
+ * testsuite/gas/riscv/c-zero-imm.s: Likewise.
+ * testsuite/gas/riscv/c-zero-reg.d: Fix typo in test. Add disabled
+ future test for RV128 support.
+ * testsuite/gas/riscv/c-zero-reg.s: Likewise.
+
+2018-05-07 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+ H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
+ (cpu_noarch): Likewise.
+ (process_suffix): Add check for register size.
+ * doc/c-i386.texi: Document movdiri, movdir64b.
+ * testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
+ * testsuite/gas/i386/movdir-intel.d: New file.
+ * testsuite/gas/i386/movdir.d: Likewise.
+ * testsuite/gas/i386/movdir.s: Likewise.
+ * testsuite/gas/i386/movdir64b-reg.s: Likewise.
+ * testsuite/gas/i386/movdir64b-reg.l: Likewise.
+ * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.s: Likewise.
+ * testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
+ * testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.
+
+2018-05-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_suffix): Check addrprefixopreg
+ instead of addrprefixop0.
+
+2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
+
+ * config/tc-ppc.c (ppc_setup_opcodes) <powerpc_opcodes>: Rewrite code
+ to dump the entire opcode table.
+ (ppc_setup_opcodes) <spe2_opcodes>: Likewise.
+ (ppc_setup_opcodes) <vle_opcodes>: Likewise. Fix calculation of
+ opcode index.
+
+2018-05-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/xmmhi32.d: Also allow dir32 relocation.
+
+2018-05-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/avx512f-plain.s: Append ".p2align 4,0".
+ * testsuite/gas/i386/avx512vl-plain.s: Likewise.
+ * testsuite/gas/i386/bnd.s: Likewise.
+ * testsuite/gas/i386/stN.s: Likewise.
+ * testsuite/gas/i386/avx512f-plain.l: Updated.
+ * testsuite/gas/i386/avx512vl-plain.l: Likewise.
+ * testsuite/gas/i386/bnd.l: Likewise.
+ * testsuite/gas/i386/stN.l: Likewise.
+
+2018-05-04 Alan Modra <amodra@gmail.com>
+
+ * config/obj-evax.c (shorten_identifier): Use memcpy in place
+ of strncpy.
+ * config/obj-macho.c (obj_mach_o_make_or_get_sect): Ensure
+ segname and sectname fields are NUL terminated.
+
+2018-05-01 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+
+2018-04-27 Maciej W. Rozycki <macro@mips.com>
+
+ * testsuite/lib/gas-defs.exp (run_dump_test): Use `match_target'
+ in place of `istarget' for matching with `target', `not-target',
+ `skip' and `not-skip' options.
+
+2018-04-26 Nick Clifton <nickc@redhat.com>
+
+ * as.c (flag_generate_build_notes): New variable.
+ (show_usage): Add entry for --generate-missing-build-notes.
+ (parse_args): Parse --generate-missing-build-notes.
+ * as.h: Export flag_generate_build_notes.
+ * symbols.c (save_symbol_name): Ensure that the name parameter is
+ not NULL.
+ * write.c (create_obj_attrs_section): Reformat.
+ (create_note_reloc): New function - creates a relocation for a
+ field in a GNU Build attribute note.
+ (maybe_generate_build_notes): New function - created GNU Build
+ attribute notes if none are present in the output file.
+ (write_object_file): Call maybe_generate_build_notes.
+ * configure.ac (--enable-generate-build-notes): New option.
+ * NEWS: Announce the new feature.
+ * doc/as.textinfo: Document the new option.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+
+2018-04-26 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_VecOperands): Add AVX512VL check. Set
+ .baseindex.
+ (match_template): Don't set suffix_check when Intel syntax and
+ broadcast. Make check_register a per-operand bitmap.
+
+2018-04-26 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Check for zeroing
+ masking.
+ * testsuite/gas/i386/optimize-1.d,
+ testsuite/gas/i386/optimize-4.d,
+ testsuite/gas/i386/optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-2.d,
+ testsuite/gas/i386/x86-64-optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-6.d: Adjust expectations.
+
2018-04-26 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (parse_real_register): Check .cpuvrex before
recording EVEX encoding. Don't check previously specified
encoding.
* testsuite/gas/i386/xmmhi32.s: Add {x,y,z}mm{16,24} cases.
- * testsuite/gas/i386/xmmhi32.d: Adjust expectations.
+ * testsuite/gas/i386/xmmhi32.d: Adjust expectations.
* testsuite/gas/i386/xmmhi64.s, testsuite/gas/i386/xmmhi64.d:
New.
* testsuite/gas/i386/i386.exp: Run new test.