+2015-03-12 Nick Clifton <nickc@redhat.com>
+
+ PR gas/17444
+ * config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment
+ to arm_apply_sym_value. Update prototype.
+ * config/tc-arm.c (arm_apply_sym_value): Add segment argument.
+ Do not apply the value if the symbol is in a different segment to
+ the current segment.
+
+2015-03-11 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_assemble): Don't abort on 8 byte insn fixups.
+ (md_apply_fix): Report an error on data-only fixups used with insns.
+
+2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/tc-s390.c (md_gather_operands): Check for valid
+ length field operands.
+
+2015-03-10 Michael Perkins <perkinsmg75@yahoo.co.uk>
+
+ * config/tc-arm.c (parse_operands): Fix bug setting writeback
+ values for '^' on OP_REGLSTs.
+ (do_push_pop): Add new writeback constraint.
+
+2015-03-10 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-arm.c (mapping_state): Remove first MAP_DATA emitting code.
+ (mapping_state_2): Emit first MAP_DATA symbol here.
+
+2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-aarch64.c (mapping_state): Set minimum alignment for
+ code sections.
+
+2015-03-10 Nick Clifton <nickc@redhat.com>
+
+ PR gas/17852
+ * config/tc-arm.c (md_begin): Ensure that selected_cpu is
+ initialised when CPU_DEFAULT is defined.
+
+2015-03-05 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-v850.c (md_parse_option): Fix code to set or clear
+ EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the
+ -m8byte-align and -m4byte-align command line options.
+
+2015-03-04 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR gas/17843
+ * config/tc-aarch64.c (process_movw_reloc_info): Allow
+ R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
+ for MOVK.
+
+2015-02-28 Alan Modra <amodra@gmail.com>
+
+ * write.c (SUB_SEGMENT_ALIGN): Don't pad non-code sections at
+ end to their alignment.
+
+2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Generate
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21.
+ (md_apply_fix, aarch64_force_relocation): Handle
+ BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+
+2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Generate
+ BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+ (md_apply_fix, aarch64_force_relocation): Handle
+ BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+
+2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Generate
+ BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19.
+ (md_apply_fix, aarch64_force_relocation): Handle
+ BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19.
+
+2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Add ld_literal_type.
+ (reloc_table): Likewise.
+ (parse_address_main): Use ld_literal_type.
+
+2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Add adr_type.
+ (reloc_table): Likewise.
+ (parse_address_main): Use adr_type.
+
+2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (aarch64_arch_any, aarch64_arch_node): Remove.
+
2015-02-25 Andrew Burgess <andrew.burgess@embecosm.com>
* config/tc-avr.c: Add elf32-avr.h include.