+2018-07-11 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/23192
+ * testsuite/gas/aarch64/illegal-by-element.s: New.
+ * testsuite/gas/aarch64/illegal-by-element.d: New.
+ * testsuite/gas/aarch64/illegal-by-element.l: New.
+
+2018-07-11 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-arm.c (insns): Add new ssbb and pssbb instructions.
+ * testsuite/gas/arm/csdb.s: Add new tests for ssbb and pssbb.
+ * testsuite/gas/arm/csdb.d: Likewise
+ * testsuite/gas/arm/thumb2_it_bad.s: Likewise.
+ * testsuite/gas/arm/thumb2_it_bad.l: Likewise.
+ * testsuite/gas/arm/barrier.d: Update with ssbb.
+ * testsuite/gas/arm/barrier-thumb.d: Likewise.
+
+2018-07-11 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (inoutportreg, reg16_inoutportreg): Delete.
+ (i386_att_operand): Replace uses of reg16_inoutportreg and
+ inoutportreg.
+
+2018-07-11 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (output_insn): Remove check_prefix label and
+ fold remaining expression.
+
+2018-07-11 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/cet.s, testsuite/gas/i386/x86-64-cet.s:
+ Add Intel cases with operand size specifiers.
+ * testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
+ testsuite/gas/i386/x86-64-cet-intel.d,
+ testsuite/gas/i386/x86-64-cet.d: Adjust expectations.
+
+2018-07-11 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_assemble): Also replace an already
+ present REP prefix.
+ * testsuite/gas/i386/mpx-add-bnd-prefix.s,
+ testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.s: Test RET with
+ all REP flavors.
+ * testsuite/gas/i386/mpx-add-bnd-prefix.d,
+ testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d: Adjust
+ expectations.
+ * testsuite/gas/i386/mpx-add-bnd-prefix.e,
+ testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.e: New.
+
+2018-07-09 Jeff Law <law@redhat.com>
+
+ * testsuite/nds32/ji-jr.d: Fix name tag.
+
+2018-07-06 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/23369
+ * testsuite/gas/aarch64/msr.d (csselr_el1,
+ vsesr_el2, osdtrrx_el1, osdtrtx_el1, pmsidr_el1): New.
+ * testsuite/gas/aarch64/msr.s: Likewise.
+
+2018-07-06 Nick Clifton <nickc@redhat.com>
+
+ * write.c (maybe_generate_build_notes): Bias reloc offsets by the
+ number of notes already generated.
+
+2018-07-05 Nick Clifton <nickc@redhat.com>
+
+ * po/ru.po: Updated Russian translation.
+
+2018-07-02 Maciej W. Rozycki <macro@mips.com>
+
+ * config/tc-mips.c (macro_build) <'i', 'j'>: Also accept
+ BFD_RELOC_16, BFD_RELOC_MIPS_GOT16, BFD_RELOC_MIPS_CALL16,
+ BFD_RELOC_MIPS_GOT_HI16, BFD_RELOC_MIPS_GOT_LO16,
+ BFD_RELOC_MIPS_CALL_HI16, BFD_RELOC_MIPS_CALL_LO16,
+ BFD_RELOC_MIPS_SUB, BFD_RELOC_MIPS_GOT_PAGE,
+ BFD_RELOC_MIPS_HIGHEST, BFD_RELOC_MIPS_GOT_DISP,
+ BFD_RELOC_MIPS_TLS_GD, BFD_RELOC_MIPS_TLS_LDM,
+ BFD_RELOC_MIPS_TLS_DTPREL_HI16, BFD_RELOC_MIPS_TLS_DTPREL_LO16,
+ BFD_RELOC_MIPS_TLS_GOTTPREL, BFD_RELOC_MIPS_TLS_TPREL_HI16 and
+ BFD_RELOC_MIPS_TLS_TPREL_LO16 relocations if in the microMIPS
+ mode.
+ * testsuite/gas/mips/elf-rel28-lldscd-n32.d: New test.
+ * testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d: New test.
+ * testsuite/gas/mips/elf-rel28-lldscd-n64.d: New test.
+ * testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d: New test.
+ * testsuite/gas/mips/elf-rel28.s: Add instruction selection.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-07-02 Maciej W. Rozycki <macro@mips.com>
+
+ * testsuite/gas/mips/elf-rel28-micromips-n32.d: New test.
+ * testsuite/gas/mips/elf-rel28-micromips-n64.d: New test.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (cpu_arch_ver): Use symbolic TAG_CPU_ARCH macros
+ rather than hardcode their values.
+
+2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * NEWS: Use command-line consistently when used in a compount word.
+ * doc/as.texi: Likewise.
+ * doc/c-aarch64.texi: Likewise.
+ * doc/c-alpha.texi: Likewise.
+ * doc/c-arc.texi: Likewise.
+ * doc/c-arm.texi: Likewise.
+ * doc/c-avr.texi: Likewise.
+ * doc/c-bfin.texi: Likewise.
+ * doc/c-cris.texi: Likewise.
+ * doc/c-epiphany.texi: Likewise.
+ * doc/c-i386.texi: Likewise.
+ * doc/c-ia64.texi: Likewise.
+ * doc/c-lm32.texi: Likewise.
+ * doc/c-m32r.texi: Likewise.
+ * doc/c-m68k.texi: Likewise.
+ * doc/c-mips.texi: Likewise.
+ * doc/c-mmix.texi: Likewise.
+ * doc/c-msp430.texi: Likewise.
+ * doc/c-mt.texi: Likewise.
+ * doc/c-nios2.texi: Likewise.
+ * doc/c-ppc.texi: Likewise.
+ * doc/c-pru.texi: Likewise.
+ * doc/c-rl78.texi: Likewise.
+ * doc/c-rx.texi: Likewise.
+ * doc/c-tic6x.texi: Likewise.
+ * doc/c-v850.texi: Likewise.
+ * doc/c-vax.texi: Likewise.
+ * doc/c-visium.texi: Likewise.
+ * doc/c-xstormy16.texi: Likewise.
+ * doc/c-xtensa.texi: Likewise.
+ * doc/c-z80.texi: Likewise.
+ * doc/c-z8k.texi: Likewise.
+ * doc/internals.texi: Likewise.
+
2018-06-29 Jim Wilson <jimw@sifive.com>
* config/tc-riscv.c (md_begin): Call hash_reg_name for "fp".