+2010-03-15 Thomas Schwinge <thomas@codesourcery.com>
+
+ * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
+ cases, and not only for .eh_frame.
+
+ * dw2gencfi.c (output_cie): Make it more explicit which code paths
+ belong to .eh_frame only.
+
+2010-03-13 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/tc-v850.c (v850_insert_operand): Handle out-of-range
+ assembler constants on 64-bit hosts.
+
+2010-03-10 Mike Frysinger <michael.frysinger@analog.com>
+
+ * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
+ Strip trailing whitespace.
+
+2010-03-10 Mike Frysinger <michael.frysinger@analog.com>
+
+ * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
+ * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
+ BFIN_CPU_BF506.
+ (bfin_cpus[]): Add 0.0 for bf504 and bf506.
+
+2010-03-10 Jie Zhang <jie@codesourcery.com>
+
+ * doc/as.texinfo: Add Blackfin options.
+ * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
+ * config/tc-bfin.c (md_show_usage): Show usage for all
+ Blackfin specific options.
+
+2010-03-09 Alan Modra <amodra@gmail.com>
+
+ PR gas/11356
+ * listing.c (listing_newline): Correct backslash quote logic.
+
+2010-03-08 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
+ (ELF_TARGET_FORMAT64): Define.
+
+2010-03-05 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
+
+2010-03-02 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/tc-sh.c (get_specific): Move overflow checking code to avoid
+ reading uninitialized data.
+
+2010-03-01 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
+
+2010-02-26 Doug Evans <dje@sebabeach.org>
+
+ * configure.tgt: Fix mep cpu case.
+
+2010-02-26 Jie Zhang <jie@codesourcery.com>
+
+ * config/tc-arm.c (do_t_strexd): Remove
+ operand[1] != operand[2] contraint.
+
+2010-02-26 Jie Zhang <jie@codesourcery.com>
+
+ * config/tc-arm.c (neon_select_shape): No need to match
+ the remaining operands in the shape when one operand does
+ not match.
+
+2010-02-26 Jie Zhang <jie@codesourcery.com>
+
+ * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
+ alignment.
+
+2010-02-25 Doug Evans <dje@sebabeach.org>
+
+ * cgen.c: Whitespace fixes.
+ (weak_operand_overflow_check): Formatting fix.
+
+2010-02-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_template): Update error messages.
+
+2010-02-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (_i386_insn): Add err_msg.
+ (operand_size_match): Set err_msg on failure.
+ (operand_type_match): Likewise.
+ (operand_type_register_match): Likewise.
+ (VEX_check_operands): Likewise.
+ (match_template): Likewise. Use i.err_msg with as_bad.
+
+2010-02-25 Wu Zhangjin <wuzhangjin@gmail.com>
+
+ * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
+ mips_fix_loongson2f_jump): New variables.
+ (md_longopts): Add New options -mfix-loongson2f-nop/jump,
+ -mno-fix-loongson2f-nop/jump.
+ (md_parse_option): Initialize variables via above options.
+ (options): New enums for the above options.
+ (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
+ (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
+ New functions.
+ (append_insn): call fix_loongson2f().
+ (mips_handle_align): Replace the implicit nops.
+ * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
+ for the new mips_handle_align().
+ * doc/c-mips.texi: Document the new options.
+
+2010-02-23 Daniel Gutson <dgutson@codesourcery.com>
+
+ * config/tc-arm.c (do_rd_rm_rn): Added warning
+ for obsolete insns.
+
+2010-02-23 Andrew Zabolotny <anpaza@mail.ru>
+
+ PR binutils/11297
+ * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
+ (avr_cons_fix_new): Handle fixups of a single byte.
+
+2010-02-22 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ PR 9861
+ * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
+ compiler's predefines.
+
+2010-02-19 Alan Modra <amodra@gmail.com>
+
+ * configure.tgt: Whiltespace. Sort moxie entry.
+
+2010-02-18 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
+ * doc/c-arm.texi: Likewise.
+
+2010-02-12 Daniel Gutson <dgutson@codesourcery.com>
+
+ * config/tc-arm.c (asm_opcode): operands type
+ change.
+ (BAD_PC_ADDRESSING): New macro message.
+ (BAD_PC_WRITEBACK): Likewise.
+ (MIX_ARM_THUMB_OPERANDS): New macro.
+ (operand_parse_code): Added enum values.
+ (parse_operands): Added thumb/arm distinction,
+ plus new enum values handling.
+ (encode_arm_addr_mode_2): Validations enhanced.
+ (encode_arm_addr_mode_3): Likewise.
+ (do_rm_rd_rn): Likewise.
+ (encode_thumb32_addr_mode): Likewise.
+ (do_t_ldrex): Likewise.
+ (do_t_ldst): Likewise.
+ (do_t_strex): Likewise.
+ (md_assemble): Call parse_operands with
+ a new parameter.
+ (OPS_1): New macro.
+ (OPS_2): Likewise.
+ (OPS_3): Likewise.
+ (OPS_4): Likewise.
+ (OPS_5): Likewise.
+ (OPS_6): Likewise.
+ (insns): Updated insns operands.
+
+2010-02-12 Tristan Gingold <gingold@adacore.com>
+ Douglas B Rupp <rupp@gnat.com>
+
+ * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
+ (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
+ (pseudo_func): Add an entry for slotcount.
+ (md_begin): Initialize slotcount pseudo symbol.
+ (ia64_parse_name): Handle @slotcount parameter.
+ (ia64_gen_real_reloc_type): Handle slotcount.
+ (md_apply_fix): Ditto.
+ * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
+
+2010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com>
+
+ * config/tc-xtensa.c (istack_init): Don't call memset.
+
+2010-02-11 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
+ well as suffixes.
+
+2010-02-11 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
+
+2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_modrm_byte): Reformat.
+
+2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c: Update copyright.
+
+2010-02-10 Quentin Neill <quentin.neill@amd.com>
+ Sebastian Pop <sebastian.pop@amd.com>
+
+ * config/tc-i386.c (vec_imm4) New operand type.
+ (fits_in_imm4): New.
+ (VEX_check_operands): New.
+ (check_reverse): Call VEX_check_operands.
+ (build_modrm_byte): Reintroduce code for 5
+ operand insns. Fix whitespace.
+
+2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
+
+ * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
+ -mpwr6 and -mpwr7.
+
+2010-02-09 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
+ (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
+ (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
+
+2010-02-08 Christophe Lyon <christophe.lyon@st.com>
+
+ * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
+ non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
+ BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
+ BFD_RELOC_ARM_PCREL_CALL)
+
+2010-02-08 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (frag_format_size): Generalize logic to
+ handle more instruction sizes and fetch widths.
+ (branch_align_power): Likewise.
+ (text_align_power): Likewise.
+ (bytes_to_stretch): Likewise.
+
+2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+
+ * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
+ (ppc_mach): Handle titan.
+ * doc/c-ppc.texi: Mention -mtitan.
+
+2010-02-05 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
+ replace with...
+ (xtensa_fetch_width) ...this.
+
+2010-02-05 Joseph Myers <joseph@codesourcery.com>
+
+ * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
+ MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
+ * Makefile.in: Regenerate.
+
+2010-02-03 Quentin Neill <quentin.neill@amd.com>
+
+ * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
+ (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
+ * config/tc-i386.h (processor_type): Same.
+ * doc/c-i386.texi: Change amdfam15 to bdver1.
+
+2010-01-29 Nick Clifton <nickc@redhat.com>
+
+ PR 11136
+ * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
+ NS_NULL.
+
+2010-01-27 Dave Korn <dave.korn.cygwin@gmail.com>
+
+ * NEWS: Mention new feature.
+ * config/obj-coff.c (obj_coff_section): Accept digits and use
+ to override default section alignment power if specified.
+ * doc/as.texinfo (.section directive): Update documentation.
+
+2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (avxscalar): New.
+ (OPTION_MAVXSCALAR): Likewise.
+ (build_vex_prefix): Select vector_length for scalar instructions
+ based on avxscalar.
+ (md_longopts): Add OPTION_MAVXSCALAR.
+ (md_parse_option): Handle OPTION_MAVXSCALAR.
+ (md_show_usage): Add -mavxscalar=.
+
+ * doc/c-i386.texi: Document -mavxscalar=.
+
+2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
+ 0xc4 individually.
+
+2010-01-23 Richard Sandiford <r.sandiford@uk.ibm.com>
+
+ * write.h (fix_at_start): Declare.
+ * write.c (fix_new_internal): Add at_beginning parameter.
+ Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
+ seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
+ (fix_new, fix_new_exp): Update accordingly.
+ (fix_at_start): New function.
+ * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
+ (ppc_ref): New function, for OBJ_XCOFF.
+ (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
+ * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
+
+2010-01-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
+ on 64-bit Solaris/x86.
+ Include obj-format.h earlier.
+
+2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (s390_elf_final_processing): New function.
+ * config/tc-s390.h (elf_tc_final_processing): New macro definition.
+ (s390_elf_final_processing): Added prototype.
+
+
+2010-01-20 Nick Clifton <nickc@redhat.com>
+
+ PR 11109
+ * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
+ code to handle round-to-zero for VCVT conversions.
+ (do_neon_cvt): New. Call do_neon_cvt_1.
+ (do_neon_cvtr): New. Call do_neon_cvt_1.
+ (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
+ insn.
+
+2010-01-18 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
+
+2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
+
+ * config/tc-i386.c (md_assemble): Before accessing the IMM field
+ check that it's not an XOP insn.
+
+2010-01-14 Jie Zhang <jie.zhang@analog.com>
+
+ * config/bfin-aux.h: Remove argument names in function
+ declarations.
+ * config/bfin-lex.l (parse_int): Fix shadowed variable name
+ warning.
+ * config/bfin-parse.y (value_match): Remove argument names
+ in declaration.
+ (notethat): Likewise.
+ (yyerror): Likewise.
+
+2010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
+
2010-01-13 Nick Clifton <nickc@redhat.com>
* config/tc-h8300.c (h8300_elf_section): New function - issue a
projects / deliverable / binutils-gdb.git / blobdiff