-Wed Jun 3 18:21:56 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+Wed Jun 24 19:06:04 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * subsegs.h (segment_info_type): Give the struct a name.
+ * config/tc-h8300.h (tc_reloc_mangle): Add prototype.
+ * config/tc-h8500.h (tc_reloc_mangle): Declare.
+ * config/tc-sh.h (sh_coff_reloc_mangle): Add prototype.
+ * config/tc-w65.h (tc_reloc_mangle): Declare.
+ * config/tc-z8k.h (tc_reloc_mangle): Declare.
+
+Wed Jun 24 13:45:00 1998 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-v850.c (v850_comm): Restore old section
+ after common processing.
+
+Wed Jun 24 11:50:54 1998 Klaus Kaempf <kkaempf@progis.de>
+
+ * config/obj-vms.c (Create_VMS_Object_File): Force binary file.
+
+start-sanitize-am33
+Wed Jun 24 09:38:10 1998 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.c (r_registers): Add a0-a3,d0-d3 and e0-e7
+ as synonyms for "rN" registers.
+ (xr_registers): Add mcrh, mcrl, mcvf, mdrq and sp as synonyms
+ for "xrN" registers.
+ (md_assemble): Fix typo computing the size of relocations.
+
+end-sanitize-am33
+Tue Jun 23 17:47:31 1998 Jim Wilson <wilson@cygnus.com>
+
+ * config/tc-h8300.c (do_a_fix_imm, build_bytes): Replace cast to
+ char with code that explicitly sign-extends.
+
+Tue Jun 23 13:54:57 1998 Nick Clifton <nickc@cygnus.com>
+start-sanitize-v850e
+ * config/tc-v850.c (md_begin): Restore text section as the current
+ section after creating call table sections.
+end-sanitize-v850e
+ * config/obj-coff.h (SYM_AUXINFO): New macro to conceal ugly
+ code.
+
+ * config/obj-coff.c (c_symbol_merge): Replace complex expresion
+ with call to macro SYM_AUXINFO.
+
+Tue Jun 23 15:09:27 1998 Mike Stump <mrs@wrs.com>
+
+ * Makefile.am (install-exec-local): Don't let EXEEXT interfere
+ with the program transform name.
+ * Makefile.in: Rebuild.
+
+Mon Jun 22 19:52:42 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-coff.c (c_symbol_merge): Fix copying of auxiliary
+ information.
+
+start-sanitize-am33
+Mon Jun 22 13:45:19 1998 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300: Handle FMT_D10 instructions.
+
+end-sanitize-am33
+Mon Jun 22 15:18:58 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-i386.c (i386_operand): Be prepared for a space between
+ the open parenthesis and the start of the register operand,
+ because of the June 16 change.
+
+start-sanitize-r5900
+Mon Jun 22 11:08:07 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * config/tc-mips.c (mips_ip): Allow VU vi and vf registers
+ to be named with a `$' prefix. Likewise, allow CFC2/CTC2 to
+ refer to "$viNN" registers.
+
+end-sanitize-r5900
+Sun Jun 21 21:27:03 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-sh.c (md_apply_fix): Handle weak symbols correctly if
+ BFD_ASSEMBLER.
+
+Sun Jun 21 12:26:36 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-d30v.c (d30v_align): Always perform alignment request,
+ even if it is belived to be unnecessary.
+
+start-sanitize-r5900
+Fri Jun 19 19:56:50 1998 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mips.c (hilo_interlocks): Check mips_5900, not
+ mips_cpu == 5900.
+
+end-sanitize-r5900
+start-sanitize-am33
+Fri Jun 19 16:49:56 1998 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.c (md_assemble): Handle FMT_D8 and FMT_D9
+ instruction formats. Handle MN10300_OPERAND_24BIT modifier.
+ (mn10300_insert_operand): Likewise.
+ (mn10300_check_operand): Likewise.
+
+end-sanitize-am33
+Fri Jun 19 13:57:06 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * write.c (adjust_reloc_syms): Never adjust relocs against weak
+ symbols.
+ * config/tc-mips.c (md_apply_fix): Adjust accordingly.
+
+Fri Jun 19 09:50:17 1998 Jeffrey A Law (law@cygnus.com)
+
+start-sanitize-am33
+ * config/tc-mn10300.c (r_registers): Add missing registers.
+ (xr_registers): New set of registers.
+ (xr_register_name): New function.
+ (md_assemble): Handle XRREG and PLUS operands. Tweak handling of
+ RREG operand insertion. Handle new D6 and D7 instruction formats.
+end-sanitize-am33
+ * config/tc-mn10300.c (mn10300_insert_operand): Do not hardcode the
+ shift amount for a repeated operand. The shift amount for the
+ repeated copy comes from the size of the operand.
+
+Fri Jun 19 00:44:19 1998 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-h8300.c (get_operand): Fix typos in ldm/stm support.
+
+start-sanitize-am33
+Wed Jun 17 18:09:03 1998 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.c (r_registers): New register table.
+ (r_register_name): New function.
+ (md_assemble): Handle new am33 operand types.
+
+end-sanitize-am33
+Wed Jun 17 13:07:05 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (md_show_usage): Fix -mipsN usage.
+
+Tue Jun 16 13:06:21 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * app.c (do_scrub_begin): If tc_symbol_chars is defined, treat all
+ characters in it as LEX_IS_SYMBOL_COMPONENT.
+ * config/tc-i386.h (tc_symbol_chars): Define.
+ (extra_symbol_chars): Declare.
+ * config/tc-i386.c (extra_symbol_chars): Define.
+ (comment_chars): Don't use '/' as comment start if TE_LINUX.
+ (line_comment_chars): Set to '/' if TE_LINUX.
+ * doc/c-i386.texi (i386-prefixes): Update.
+ * doc/internals.texi (CPU backend): Document tc_symbol_chars.
+
+Fri Jun 12 13:36:54 1998 Tom Tromey <tromey@cygnus.com>
+
+ * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
+ ($(PACKAGE).pot): Unconditionally depend on POTFILES.
+
+start-sanitize-sky
+Fri Jun 12 12:46:57 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * config/tc-dvp.c (create_vuoverlay_section): Don't set a non-zero
+ section vma.
+
+end-sanitize-sky
+1998-06-12 Vladimir N. Makarov <vmakarov@cygnus.com>
+
+ * config/tc-d10v.c (md_apply_fix3): Checking displacement
+ constraint in instructions REP & REPI.
+
+Thu Jun 11 08:56:46 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-d30v.c (md_apply_fix3): Catch BFD_RELOC_8,
+ BFD_RELOC_16, BFD_RELOC_64 and issue appropriate error messages.
+
+ (check_range): If the operand is shifted, then shift the number
+ before checking its range.
+
+ * write.c (adjust_reloc_syms): Add more checks for NULL pointers.
+
+ * config/tc-v850.c (v850_comm): Set SEC_COMMON bit on special
+ common sections.
+
+Wed Jun 10 17:26:35 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-v850.c (v850_comm): Create special sections as needed.
+
+1998-06-10 Vladimir N. Makarov <vmakarov@cygnus.com>
+
+ * config/tc-d10v.c (write_2_short): Addition of swapping
+ instructions for sequential and reverse sequential order when
+ given order is not possible.
+
+start-sanitize-sky
+Tue Jun 9 12:20:44 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * config/tc-dvp.c (assemble_vu): Print better error message if
+ lower insn is missing.
+
+end-sanitize-sky
+Tue Jun 9 13:52:53 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.am: Rebuild dependencies.
+ (DEP_INCLUDES): Fix reference to intl build directory.
+ * Makefile.in: Rebuild.
+
+Tue Jun 9 12:20:05 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * doc/c-i386.texi: Update 16 bit documentation.
+
+ * config/tc-i386.h: Change Data16 to Size16, Data32 to Size32,
+ IgnoreDataSize to IgnoreSize as they are used for address size as
+ well as data size.
+ * config/tc-i386.c: Likewise. Add code to reject addr32/data32 in
+ 32-bit mode, similarly addr16/data16 and variants.
+
+Mon Jun 8 18:32:01 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-d30v.c (md_assemble): Fix handling of reverse
+ sequential word multiply instructions.
+
+ (do_assemble): Add extra command line argument, to allow mul32
+ attribute to be preserved across parallel insns.
+ (md_assemble): Insert NOPs between explicitly parallel insns which
+ contain an 32 bit multiply and a 16 multiply.
+
+start-sanitize-sky
+Mon Jun 8 15:41:43 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * config/tc-dvp.c (dvp_relax_frag): Adjust target address by stretch.
+
+end-sanitize-sky
+Mon Jun 8 12:20:30 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c: REPNE renamed to REPNE_PREFIX_OPCODE, and
+ likewise for REPE.
+
+ * config/tc-i386.c (reloc): Add braces.
+
+ * config/tc-i386.c (struct _i386_insn): Rename bi to sib to be
+ consistent with Intel naming.
+ * config/tc-i386.h (base_index_byte): Rename to sib_byte. Don't
+ use bitfields in sib_byte.
+ (modrm_byte): Don't use bitfields here either.
+
+ * config/tc-i386.c (current_templates): Add const.
+ (parse_register): Add const to return, param, and char *s.
+ (i386_operand): Add const to reg_entry *r.
+ * config/tc-i386.h (templates): Add const to start, end.
+
+ Inspired by code for 16 bit gas support from Martynas Kunigelis
+ <martynas@nm3.ktu.lt>:
+ * config/tc-i386.c (md_assemble): Add full support for 16 bit
+ modrm, and Jump, JumpByte, JumpDword, JumpInterSegment insns.
+ (uses_mem_addrmode): Remove.
+ (md_estimate_size_before_relax): Add support here too.
+ (md_relax_table): Rewrite interface to md_relax for 16 bit
+ support.
+ (BYTE, WORD, DWORD, UNKNOWN_SIZE): Remove.
+ (opcode_suffix_to_type): Remove.
+ (CODE16, SMALL, SMALL16, BIG, BIG16): Define.
+ (SIZE_FROM_RELAX_STATE): Modify to suit above.
+ (md_convert_frag): Likewise.
+ (i386_operand): Add support for 16 bit base/index regs,
+ immediates, and displacements. Remove some unnecessary casts, and
+ localise end_of_operand_string, displacement_string_start,
+ displacement_string_end variables. Add GCC_ASM_O_HACK.
+ * config/tc-i386.h (NO_BASE_REGISTER_16): Define.
+
+ * config/tc-i386.c (prefix_hash): Remove.
+ (md_begin): Rewrite without obstacks. Remove prefix hash table
+ handling. Rewrite lexical table handling.
+ (i386_print_statistics): Don't print prefix statistics.
+ (md_assemble): Rewrite instruction parser so that line is not
+ converted to lower case. Don't do a hash_find for prefixes,
+ instead recognise them via opcode modifier.
+ (expecting_operand, paren_not_balanced): Localise variables.
+ * config/tc-i386.h (IsPrefix): Define.
+ (prefix_entry): Remove.
+
+ * config/tc-i386.h (PREFIX_SEPERATOR): Don't define.
+ * config/tc-i386.c (PREFIX_SEPARATOR): Define here instead, using
+ '\\' in case where comment_chars contains '/'.
+
+ * config/tc-i386.c (MATCH): Ensure given operand and template
+ match for JumpAbsolute. Makes e.g. `ljmp table(%ebx)' invalid;
+ you must write `ljmp *table(%ebx)'.
+
+ From H.J. Lu <hjl@gnu.org>:
+ * config/tc-i386.c (BFD_RELOC_16, BFD_RELOC_16_PCREL): Define
+ as 0 ifndef BFD_ASSEMBLER.
+ (md_assemble): Allow immediate operands without suffix or
+ other reg operand to default in size to the current code size.
+
+start-sanitize-v850e
+Mon Jun 8 09:45:00 1998 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-v850.c (md_begin): Restore creation of
+ .call_table_text and .call_table_data sections.
+
+end-sanitize-v850e
+Sat Jun 6 00:02:41 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-d30v.c (md_assemble): Set execution type to unknown
+ after emitting a word of noops.
+
+Fri Jun 5 23:27:04 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c (mode_from_disp_size): Disp16 is mode 2.
+ (i386_operand): Simplify checks for valid base/index combinations.
+ Disallow `in 4(%dx),%al'.
+
+ * config/tc-i386.c (struct _i386_insn): Make regs, base_reg, and
+ index_reg const.
+ (add_prefix): Change parameter from char to int.
+
+ * config/tc-i386.h (Ugh): Define opcode modifier.
+ * config/tc-i386.c (md_assemble): Print warnings for Ugh insns.
+
+ * config/tc-i386.c (md_assemble): Rewrite MATCH and
+ CONSISTENT_REGISTER_MATCH macros to check register types more
+ thoroughly. Check for illegal suffix/operand combinations
+ when matching insns with operands. Handle new `s' suffix, and
+ associated FloatMF opcode modifier for float insns with memory
+ operands.
+ * config/tc-i386.h (FloatMF): Define new opcode modifier.
+ (No_sSuf, No_bSuf, No_wSuf, No_lSuf): Likewise.
+ (SHORT_OPCODE_SUFFIX, LONG_OPCODE_SUFFIX): Define.
+ * config/tc-i386.c: Rename WORD_PREFIX_OPCODE to
+ DATA_PREFIX_OPCODE throughout.
+
+ * config/tc-i386.c (REGISTER_WARNINGS): Define.
+ (md_assemble): Rewrite suffix/register operand checking code to be
+ more thorough. Remove Abs8,16,32. Change occurrences of Mem to
+ AnyMem, the better to grep.
+ (pi): Remove Abs.
+ (i386_operand): Don't set Mem bits in i.types[this_operand] when
+ given a memory operand. Don't set Abs bits either.
+ (type_names): Remove Mem*, Abs*.
+ * config/tc-i386.h (Mem8, Mem16, Mem32, Abs8, Abs16, Abs32): Don't
+ define opcode_modifiers as these cases are handled by Disp8,
+ Disp16, Disp32 and suffix checks.
+ (COMES_IN_BOTH_DIRECTIONS): Remove.
+ (FloatR): Define. It's OK to share the bit with ReverseRegRegmem.
+
+ * config/tc-i386.c (md_assemble): Don't emit operand size prefix
+ if IgnoreDataSize modifier given. Remove ShortformW modifier
+ test. Add test for ShortForm in W base_opcode modification.
+ Merge Seg2ShortForm and Seg3ShortForm code.
+ * config/tc-i386.h (ShortFormW): Remove.
+ (IgnoreDataSize): Define.
+
+Fri Jun 5 10:50:53 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-d30v.c (md_assemble): Store previous segment state
+ with previous instruction.
+
+Wed Jun 3 18:21:56 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Define.
(ebp, esp): Remove static variables.
(i386_operand): Add warning for scale without index.
Rewrite checks for valid base/index combinations.
+ * config/tc-i386.c (END_STRING_AND_SAVE): Protect arguments of
+ macros and enclose in do while(0).
+ (RESTORE_END_STRING): Likewise.
+ (md_assemble): Add one to printed operand number so we start
+ from 1 not 0. Add some more gettext invocations.
+ (i386_operand): Fix `%%s' -> `%%%s'. Inc printed operand
+ number here too.
+
+ * config/tc-i386.h (WAIT_PREFIX, LOCKREP_PREFIX, ADDR_PREFIX,
+ DATA_PREFIX, SEG_PREFIX): Define.
+ * config/tc-i386.c (struct _i386_insn): Remove wait_prefix field.
+ (check_prefix): Remove function.
+ (add_prefix): New function. Add prefix to i.prefix as well as
+ doing checks.
+ (md_assemble): Changes for add_prefix. Remove hack for wait
+ prefix, instead always output prefixes in fixed order. Test
+ for jcxz/loop when selecting between word & dword operations,
+ and add address size prefix rather than operand size prefix.
+ Remove operand -> address size hack when emitting jcxz/loop.
+ (i386_operand): Remove O_Absent check as it's done in expr.
+
Wed Jun 3 15:09:10 1998 Ian Lance Taylor <ian@cygnus.com>
* configure.in: Recognize m5200 as a cpu_type of m68k.
* config/tc-mips.c (mips_ip): Specs changed for
VCALLMSR instruction.
-end-sanitize-vr5900
+end-sanitize-r5900
start-sanitize-vr5400
Wed Apr 15 07:06:04 1998 Catherine Moore <clm@cygnus.com>
start-sanitize-r5900
Fri Mar 20 09:04:13 1998 Jeffrey A Law (law@cygnus.com)
- * config/tc-mips.c: Change '%' to '#' in r5900 code to avoid conflict
- with vr5400 support.
+ * config/tc-mips.c: Change '%' to '#' in r5900 support.
end-sanitize-r5900
Thu Mar 19 16:03:12 1998 Nick Clifton <nickc@cygnus.com>