[binutils][arm] Arm CDE CX*A instructions allow condition code
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 01cce9f4bd3160b250865576ebc8937ba29694ad..601fb5082d398999d7e3c294c8fe37a6214adc29 100644 (file)
@@ -1,3 +1,104 @@
+2020-02-26  Matthew Malcomson  <matthew.malcomson@arm.com>
+
+       * config/tc-arm.c (enum pred_instruction_type): Remove
+       NEUTRAL_IT_NO_VPT_INSN predication type.
+       (cxn_handle_predication): Modify to require condition suffixes.
+       (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
+       * testsuite/gas/arm/cde-scalar.s: Update test.
+       * testsuite/gas/arm/cde-warnings.l: Update test.
+       * testsuite/gas/arm/cde-warnings.s: Update test.
+
+2020-02-26  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
+       N_() on empty string.
+
+2020-02-26  Alan Modra  <amodra@gmail.com>
+
+       * read.c (read_a_source_file): Call strncpy with length one
+       less than size of original_case_string.
+
+2020-02-26  Alan Modra  <amodra@gmail.com>
+
+       * config/obj-elf.c: Indent labels correctly.
+       * config/obj-macho.c: Likewise.
+       * config/tc-aarch64.c: Likewise.
+       * config/tc-alpha.c: Likewise.
+       * config/tc-arm.c: Likewise.
+       * config/tc-cr16.c: Likewise.
+       * config/tc-crx.c: Likewise.
+       * config/tc-frv.c: Likewise.
+       * config/tc-i386-intel.c: Likewise.
+       * config/tc-i386.c: Likewise.
+       * config/tc-ia64.c: Likewise.
+       * config/tc-mn10200.c: Likewise.
+       * config/tc-mn10300.c: Likewise.
+       * config/tc-nds32.c: Likewise.
+       * config/tc-riscv.c: Likewise.
+       * config/tc-s12z.c: Likewise.
+       * config/tc-xtensa.c: Likewise.
+       * config/tc-z80.c: Likewise.
+       * read.c: Likewise.
+       * symbols.c: Likewise.
+       * write.c: Likewise.
+
+2020-02-20  Nelson Chu  <nelson.chu@sifive.com>
+
+       * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
+       we are assembling instruction with CSR.  Call riscv_csr_read_only_check
+       after parsing all arguments.
+       (enum csr_insn_type): New enum is used to classify the CSR instruction.
+       (riscv_csr_insn_type, riscv_csr_read_only_check): New functions.  These
+       are used to check if we write a read-only CSR by the CSR instruction.
+       * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase.  Test
+       all CSR for the read-only CSR checking.
+       * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
+       * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
+       * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase.  Test
+       all CSR instructions for the read-only CSR checking.
+       * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
+       * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
+
+       * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
+       (riscv_opts): Initialize it.
+       (reg_lookup_internal): Check the `riscv_opts.csr_check`
+       before doing the CSR checking.
+       (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
+       (md_longopts): Add mcsr-check and mno-csr-check.
+       (md_parse_option): Handle new enum option values.
+       (s_riscv_option): Handle new long options.
+       * doc/c-riscv.texi: Add description for the new .option and assembler
+       options.
+       * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
+       the CSR checking.
+       * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
+
+       * config/tc-riscv.c (csr_extra_hash): New.
+       (enum riscv_csr_class): New enum.  Used to decide
+       whether or not this CSR is legal in the current ISA string.
+       (struct riscv_csr_extra): New structure to hold all extra information
+       of CSR.
+       (riscv_init_csr_hashes): New.  According to the DECLARE_CSR and
+       DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
+       Call hash_reg_name to insert CSR address into reg_names_hash.
+       (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
+       Decide whether the CSR is valid according to the csr_extra_hash.
+       (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
+       (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
+       not a boolean.  This is same as riscv_init_csr_hash, so keep the
+       consistent usage.
+       (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
+       * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
+       * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
+       * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase.  The source
+       file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
+       f-ext CSR are not allowed.
+       * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
+       * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase.  The
+       source file is `priv-reg.s`, and the ISA is rv64if, so the
+       rv32-only CSR are not allowed.
+       * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
+
 2020-02-21  Alan Modra  <amodra@gmail.com>
 
        * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
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