Add support for V_4B so we can properly reject it.

[deliverable/binutils-gdb.git] / gas / ChangeLog

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+2017-12-19  Tamar Christina  <tamar.christina@arm.com>
+
+       PR 22529
+       * config/tc-aarch64.c (vectype_to_qualifier): Support AARCH64_OPND_QLF_V_4B.
+       * gas/testsuite/gas/aarch64/pr22529.s: New.
+       * gas/testsuite/gas/aarch64/pr22529.d: New.
+       * gas/testsuite/gas/aarch64/pr22529.l: New.
+
+2017-12-18  Nick Clifton  <nickc@redhat.com>
+
+       PR 22493
+       * config/tc-arm.c (encode_ldmstm): Do not use A2 encoding of the
+       PUSH insn when pushing the stack pointer.
+
+2017-12-18  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (regymm, regzmm): Delete.
+       (operand_type_register_match). Extend comment. Also handle some
+       memory operands here. Extend to cover .regsimd.
+       (build_vex_prefix): Derive vector_length from actual operand
+       size.
+       (process_operands, build_modrm_byte): Use .regsimd.
+
+2017-12-18  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (match_simd_size): New.
+       (match_mem_size): Use it.
+       (operand_size_match): Likewise. Split .reg and .acc checks.
+       (pi, check_VecOperands, match_template, check_byte_reg,
+       check_long_reg, check_qword_reg, build_modrm_byte,
+       parse_real_register): Replace .regxmm, .regymm, and .regzmm
+       checks.
+       (md_assemble): Qualify .acc check with .xmmword one.
+       (bad_implicit_operand): Delete.
+       (process_operands): Replace .firstxmm0 checks with .acc plus
+       .xmmword ones. Drop now pointless assertions. Convert .acc to
+       .regsimd.
+       * config/tc-i386-intel.c (i386_intel_simplify_register): Replace
+       .regxmm, .regymm, and .regzmm checks.
+       * testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations.
+
 2017-12-18  Jan Beulich  <jbeulich@suse.com>
 
        * config/tc-i386.c (operand_type_check): Extend comment.