Add support for Nuxi CloudABI on x86-64
[deliverable/binutils-gdb.git] / gas / ChangeLog
index e4b3077e6401cca6747a0519e5ca3ebf013c5966..7052c62ed364f97d235e873f1548d2737a628831 100644 (file)
@@ -1,3 +1,204 @@
+2015-03-31  Ed Schouten  <ed@nuxi.nl>
+
+       * configure.tgt (fmt): Set to elf for *-*-cloudabi*.
+
+2015-03-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * configure.ac: Revert the AM_ZLIB change.
+       * Makefile.in: Regenerated.
+       * aclocal.m4: Likewise.
+       * configure: Likewise.
+
+2015-03-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * Makefile.am (ZLIBINC): New.
+       (AM_CFLAGS): Add $(ZLIBINC).
+       * as.c: (show_usage): Don't check HAVE_ZLIB_H.
+       (parse_args): Likewise.
+       * compress-debug.c: Don't check HAVE_ZLIB_H to include <zlib.h>.
+       (compress_init): Don't check HAVE_ZLIB_H.
+       (compress_data): Likewise.
+       (compress_finish): Likewise.
+       * configure.ac (AM_ZLIB): Removed.
+       (zlibinc): New.  AC_SUBST.
+       Add --with-system-zlib.
+       * Makefile.in: Regenerated.
+       * config.in: Likewise.
+       * configure: Likewise.
+       * doc/Makefile.in: Likewise.
+
+2015-03-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (cpu_flags_set): Removed.
+
+2015-03-25  Renlin Li  <renlin.li@arm.com>
+
+       * config/tc-aarch64.c (mapping_state): Remove first MAP_DATA emitting
+       code.
+       (mapping_state_2): Emit first MAP_DATA symbol here.
+
+2015-03-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/18087
+       * write.c (compress_debug): Don't write the zlib header if
+       compression didn't make the section smaller.
+
+2015-03-24  Terry Guo  <terry.guo@arm.com>
+
+       * config/tc-arm.c (no_cpu_selected): Use new macro to compare
+       features.
+       (parse_psr): Likewise.
+       (do_t_mrs): Likewise.
+       (do_t_msr): Likewise.
+       (static const arm_feature_set arm_ext_*): Defined with new macros.
+       (static const arm_feature_set arm_cext_*): Likewise.
+       (static const arm_feature_set fpu_fpa_ext_*): Likewise.
+       (static const arm_feature_set fpu_vfp_ext_*): Likewise.
+       (deprecated_coproc_regs): Likewise.
+       (UL_BARRIER): Likewise.
+       (barrier_opt_names): Likewise.
+       (arm_cpus): Likewise.
+       (arm_extensions): Likewise.
+
+2015-03-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (i386_align_code): Limit multi-byte nop
+       instructions to 10 bytes.
+
+2015-03-19  Nick Clifton  <nickc@redhat.com>
+
+       * config/tc-rl78.c (enum options): Add G13 and G14.
+       (md_longopts): Add -mg13 and -mg14.
+       (md_parse_option): Handle -mg13 and -mg14.
+       (md_show_usage): List -mg13 and -mg14.
+       * doc/c-rl78.texi: Add description of -mg13 and -mg14 options.
+
+2015-03-18  Jon Turney  <jon.turney@dronecode.org.uk>
+           Nick Clifton  <nickc@redhat.com>
+
+       PR binutils/18087
+       * doc/as.texinfo: Note that when gas compresses debug sections the
+       compression is only performed if it makes the section smaller.
+       * write.c (compress_debug): Do not compress a debug section if
+       doing so would make it larger.
+
+2015-03-17  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
+
+       * config/tc-i386.c (cpu_arch): Add PROCESSOR_ZNVER flags.
+       (i386_align_code): Add PROCESSOR_ZNVER cases.
+       * config/tc-i386.h (processor_type): Add PROCESSOR_ZNVER.
+       * doc/c-i386.texi: Add znver1 and clzero.
+
+2015-03-16  Nick Clifton  <nickc@redhat.com>
+
+       * dwarf2dbg.c (out_header): Remove spurious #if 1.
+
+2015-03-13  Jiong Wang  <jiong.wang@arm.com>
+
+       * config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg
+       number 31.
+
+2015-03-13  Jiong Wang  <jiong.wang@arm.com>
+
+       * config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero.
+
+2015-03-12  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+       * config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
+       * doc/c-mips.texi: Document i6400 -march option.
+
+2015-03-12  Nick Clifton  <nickc@redhat.com>
+
+       PR gas/17444
+       * config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment
+       to arm_apply_sym_value.  Update prototype.
+       * config/tc-arm.c (arm_apply_sym_value): Add segment argument.
+       Do not apply the value if the symbol is in a different segment to
+       the current segment.
+
+2015-03-11  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (md_assemble): Don't abort on 8 byte insn fixups.
+       (md_apply_fix): Report an error on data-only fixups used with insns.
+
+2015-03-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+       * config/tc-s390.c (md_gather_operands): Check for valid
+       length field operands.
+
+2015-03-10  Michael Perkins  <perkinsmg75@yahoo.co.uk>
+
+       * config/tc-arm.c (parse_operands): Fix bug setting writeback
+       values for '^' on OP_REGLSTs.
+       (do_push_pop): Add new writeback constraint.
+
+2015-03-10  Renlin Li  <renlin.li@arm.com>
+
+       * config/tc-arm.c (mapping_state): Remove first MAP_DATA emitting code.
+       (mapping_state_2): Emit first MAP_DATA symbol here.
+
+2015-03-10  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/tc-aarch64.c (mapping_state): Set minimum alignment for
+       code sections.
+
+2015-03-10  Nick Clifton  <nickc@redhat.com>
+
+       PR gas/17852
+       * config/tc-arm.c (md_begin): Ensure that selected_cpu is
+       initialised when CPU_DEFAULT is defined.
+
+2015-03-05  Nick Clifton  <nickc@redhat.com>
+
+       * config/tc-v850.c (md_parse_option): Fix code to set or clear
+       EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the
+       -m8byte-align and -m4byte-align command line options.
+
+2015-03-04  Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR gas/17843
+       * config/tc-aarch64.c (process_movw_reloc_info): Allow
+       R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
+       for MOVK.
+
+2015-02-28  Alan Modra  <amodra@gmail.com>
+
+       * write.c (SUB_SEGMENT_ALIGN): Don't pad non-code sections at
+       end to their alignment.
+
+2015-02-19  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+       * config/tc-aarch64.c (reloc_table_entry): Generate
+       BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21.
+       (md_apply_fix, aarch64_force_relocation): Handle
+       BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+
+2015-02-19  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+       * config/tc-aarch64.c (reloc_table_entry): Generate
+       BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+       (md_apply_fix, aarch64_force_relocation): Handle
+       BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+
+2015-02-19  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+       * config/tc-aarch64.c (reloc_table_entry): Generate
+       BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19.
+       (md_apply_fix, aarch64_force_relocation): Handle
+       BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19.
+
+2015-02-26  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+       * config/tc-aarch64.c (reloc_table_entry): Add ld_literal_type.
+       (reloc_table): Likewise.
+       (parse_address_main): Use ld_literal_type.
+
+2015-02-26  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+       * config/tc-aarch64.c (reloc_table_entry): Add adr_type.
+       (reloc_table): Likewise.
+       (parse_address_main): Use adr_type.
+
 2015-02-26  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 
        * config/tc-aarch64.c (aarch64_arch_any, aarch64_arch_node): Remove.
This page took 0.02486 seconds and 4 git commands to generate.