x86/Intel: drop pointless suffix setting for "fword ptr"
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 7307dc8e44457d4a1a33f0e6e245c9bfe7ef7955..70aff3d9324c695eec60baa0ec1c6f1b3c08b71c 100644 (file)
@@ -1,3 +1,100 @@
+2019-12-09  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386-intel.c (i386_intel_operand): Don't set suffix
+       for floating point insns when handling O_fword_ptr.
+
+2019-12-09  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386-intel.c (i386_intel_operand): Don't special
+       case LDS et al when handling O_word_ptr.
+
+2019-12-08  Alan Modra  <amodra@gmail.com>
+
+       * testsuite/gas/aarch64/bfloat16.d: Match 32-bit and 64-bit output.
+       * testsuite/gas/aarch64/dgh.d: Likewise.
+       * testsuite/gas/aarch64/f32mm.d: Likewise.
+       * testsuite/gas/aarch64/f64mm.d: Likewise.
+       * testsuite/gas/aarch64/i8mm.d: Likewise.
+       * testsuite/gas/aarch64/pac_ab_key.d: Likewise.
+       * testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise.
+       * testsuite/gas/aarch64/reloc-prel_g0.d: Likewise.
+       * testsuite/gas/aarch64/reloc-prel_g0_nc.d: Likewise.
+       * testsuite/gas/aarch64/reloc-prel_g1.d: Likewise.
+       * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Likewise.
+       * testsuite/gas/aarch64/sve-movprfx-mm.d: Likewise.
+       * testsuite/gas/aarch64/sve2.d: Likewise.
+
+2019-12-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * dw2gencfi.c (cfi_pseudo_table): Add cfi_negate_ra_state.
+       * testsuite/gas/aarch64/pac_negate_ra_state.s: New file.
+       * testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise.
+
+2019-12-05  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-aarch64.c (aarch64_features): Drop redundant AES and
+       SHA2 flags from "crypto" entry.
+
+2019-12-05  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-aarch64.c (aarch64_features): Make SHA2 a prereq of
+       SHA3.
+       * testsuite/gas/aarch64/crypto.s
+       * testsuite/gas/aarch64/crypto-directive.d: Refer to crypto.d
+       for actual output.
+       * testsuite/gas/aarch64/illegal-crypto-nofp.l: Relax
+       expectations.
+       * testsuite/gas/aarch64/crypto-directive2.d,
+       testsuite/gas/aarch64/crypto-directive3.d: New.
+
+2019-12-04  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386-intel.c (i386_intel_operand): Handle LFS et al
+       as well as LGDT at al when processing O_tbyte_ptr.
+       * testsuite/gas/i386/intelbad.s: Add LDS et al cases.
+       * testsuite/gas/i386/x86-64-intel64.s,
+       * testsuite/gas/i386/x86-64-opcode.s:  Add LFS et al cases.
+       * testsuite/gas/i386/ilp32/x86-64-intel64.d: Add -mintel64
+       command line option and fold expectations with parent dir test.
+       * testsuite/gas/i386/x86-64-intel64.d: Add -mintel64 command
+       line option and adjust expectations.
+       * testsuite/gas/i386/intelbad.l,
+       testsuite/gas/i386/x86-64-opcode.d: Adjust expectations.
+
+2019-12-04  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386-intel.c (i386_intel_operand): Also handle DWORD
+       with 64-bit mode branches.
+       * testsuite/gas/i386/x86-64-jump.s: Extend Intel syntax branch
+       operand coverage.
+       * testsuite/gas/i386/x86-64-jump.d: Adjust expectations.
+
+2019-12-04  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (output_insn): Don't consider Cpu* settings
+       when setting GNU_PROPERTY_X86_FEATURE_2_MMX.
+
+2019-12-04  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/movdir.s: Add Intel syntax case with
+       operand size specifier.
+       * testsuite/gas/i386/x86-64-movdir.s: Add Intel syntax cases
+       with operand size specifier and wit 32-bit operands.
+       * testsuite/gas/i386/movdir-intel.d,
+       testsuite/gas/i386/movdir.d,
+       testsuite/gas/i386/x86-64-movdir-intel.d,
+       testsuite/gas/i386/x86-64-movdir.d: Adjust expectations.
+
+2019-12-04  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): Arrange for insns with a
+       single non-GPR register operand to not have its suffix guessed
+       from GPR operands. Extend DefaultSize handling to cover PUSH/POP
+       of segment registers.
+       * testsuite/gas/i386/general.s: Add PUSH/POP sreg to .code16gcc
+       set of insns.
+       * testsuite/gas/i386/general.l: Adjust expectations.
+
 2019-12-04  Jan Beulich  <jbeulich@suse.com>
 
        * config/tc-i386.c (process_suffix): Exclude SYSRET alongside
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