Correct ChangeLog entry for commit b8426d169d3f8a
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 7428c24526b0b8cbc5d03132bc3f3ddf9c5e4ede..72857e1604670567be1e56cae128ad52b41d1909 100644 (file)
@@ -1,3 +1,161 @@
+2018-09-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/23691
+       * Makefile.am (bfin-parse.c): Depend on $(srcdir)/../bfd/reloc.c.
+       (rl78-parse.c): Likewise.
+       (rx-parse.c): Likewise.
+       * Makefile.in: Regenerated.
+
+2018-09-21  Alan Modra  <amodra@gmail.com>
+
+       * testsuite/gas/avr/large-debug-line-table.d: Update.
+
+2018-09-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/23695
+       * testsuite/gas/elf/dwarf2-11.d: Update expected outputs of
+       "readelf -wL".
+       * testsuite/gas/elf/dwarf2-12.d: Likewise.
+       * testsuite/gas/elf/dwarf2-13.d: Likewise.
+       * testsuite/gas/elf/dwarf2-14.d: Likewise.
+       * testsuite/gas/elf/dwarf2-15.d: Likewise.
+       * testsuite/gas/elf/dwarf2-16.d: Likewise.
+       * testsuite/gas/elf/dwarf2-17.d: Likewise.
+       * testsuite/gas/elf/dwarf2-18.d: Likewise.
+       * testsuite/gas/elf/dwarf2-5.d: Likewise.
+       * testsuite/gas/elf/dwarf2-6.d: Likewise.
+       * testsuite/gas/elf/dwarf2-7.d: Likewise.
+
+2018-09-20  Maciej W. Rozycki  <macro@linux-mips.org>
+
+       * config/tc-s12z.c (lex_opr): Use an auxiliary unsigned variable
+       in encoding a constant operand.
+
+2018-09-20  Maciej W. Rozycki  <macro@linux-mips.org>
+
+       * config/tc-ppc.c (ppc_dwsect): Use `valueT' rather than
+       `offsetT' as the type of `flag'.
+
+2018-09-20  Maciej W. Rozycki  <macro@linux-mips.org>
+
+       * config/tc-arc.c (md_number_to_chars_midend): Append `ull' to
+       large constants.
+
+2018-09-20  Nelson Chu <nelson.chu1990@gmail.com>
+
+       * config/tc-nds32.c: Remove the unused target features.
+       (nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp,
+       nds32_set_elf_flags_by_insn, nds32_insert_relax_entry,
+       nds32_apply_fix): Likewise.
+       (nds32_no_ex9_begin): Removed.
+       * config/tc-nds32.c (add_mapping_symbol_for_align,
+       make_mapping_symbol, add_mapping_symbol): New functions.
+       * config/tc-nds32.h (enum mstate): New.
+       (nds32_segment_info_type): Likewise.
+       * configure.ac (--enable-dsp-ext, --enable-zol-ext): New options.
+       * config.in: Regenerated.
+       * configure: Regenerated.
+       * config/tc-nds32.c (nds32_dx_regs):
+       Set the value according to the configuration.
+       (nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext):
+       Likewise.
+       (nds32_dsp_ext): New variable. Set the value according to the
+       configuration.
+       (nds32_zol_ext): Likewise.
+       (asm_desc, nds32_pseudo_opcode_table): Make them static.
+       (nds32_set_elf_flags_by_insn): Updated.
+       (nds32_check_insn_available): Updated.
+       (nds32_str_tolower): New function.
+       * config/tc-nds32.c (relax_table): Updated.
+       (md_begin): Updated.
+       (md_assemble): Use XNEW macro to allocate space for `insn.info',
+       and then remember to free it.
+       (md_section_align): Cast (-1) to ValueT.
+       (nds32_get_align): Cast (~0U) to addressT.
+       (nds32_relax_branch_instructions): Updated.
+       (md_convert_frag): Add new local variable `final_r_type'.
+       (invalid_prev_frag): Add new bfd_boolean parameter `relax'.
+       All callers changed.
+       * config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field.
+       (struct nds32_hint_map): Add `option_list' field.
+       (struct suffix_name, suffix_table): Remove the unused `pic' field.
+       (do_pseudo_b, do_pseudo_bal): Remove the suffix checking.
+       (do_pseudo_la_internal, do_pseudo_pushpopm): Indent.
+       (relax_hint_bias, relax_hint_id_current): New static variables.
+       (reset_bias, relax_hint_begin): New variables.
+       (nds_itoa): New function.
+       (CLEAN_REG, GET_OPCODE): New macros.
+       (struct relax_hint_id): New.
+       (nds32_relax_hint): For .relax_hint directive, we can use `begin'
+       and `end' to mark the relax pattern without giving exactly id number.
+       (nds32_elf_append_relax_relocs): Handle the case that the .relax_hint
+       directives are attached to pseudo instruction.
+       (nds32_elf_save_pseudo_pattern): Change the second parameter from
+       instruction's opcode to byte code.
+       (nds32_elf_build_relax_relation): Add new bfd_boolean parameter
+       `pseudo_hint'.
+       (nds32_lookup_pseudo_opcode): Fix the overflow issue.
+       (enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT.
+       (nds32_elf_record_fixup_exp, relax_ls_table, hint_map,
+       nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name):
+       Updated.
+       * config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6.
+       (enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and
+       NDS32_RELAX_HINT_LS into NDS32_RELAX_HINT_LALS. Add
+       NDS32_RELAX_HINT_LA_PLT, NDS32_RELAX_HINT_LA_GOT and
+       NDS32_RELAX_HINT_LA_GOTOFF.
+       * config/tc-nds32.h (relax_ls_table): Add floating load/store
+       to gp relax pattern.
+       (hint_map, nds32_find_reloc_table): Likewise.
+       * configure.ac: Define NDS32_LINUX_TOOLCHAIN.
+       * configure: Regenerated.
+       * config.in: Regenerated.
+       * config/tc-nds32.h (enum nds32_ramp): Updated.
+       (enum nds32_relax_hint_type): Likewise.
+       * config/tc-nds32.c: Include "errno.h" and "limits.h".
+       (relax_ls_table): Add TLS relax patterns.
+       (nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on
+       each instructions of TLS patterns.
+       (nds32_elf_record_fixup_exp): Updated.
+       (nds32_apply_fix): Likewise.
+       (suffix_table): Add TLSDESC suffix.
+
+2018-09-18 Tamar Christina  <tamar.christina@arm.com>
+
+       * config/tc-aarch64.c (output_operand_error_report): Apply filtering to
+       current instead of head message.
+
+2018-09-17  Kito Cheng  <kito@andestech.com>
+
+       * testsuite/gas/riscv/bge.d: New.
+       * testsuite/gas/riscv/bge.s: Likewise.
+
+2018-09-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/23670
+       * testsuite/gas/i386/evex-lig-2.d: New file.
+       * testsuite/gas/i386/evex-lig-2.s: Likewise.
+       * testsuite/gas/i386/x86-64-evex-lig-2.d: Likewise.
+       * testsuite/gas/i386/x86-64-evex-lig-2.s: Likewise.
+       * testsuite/gas/i386/i386.exp: Run evex-lig-2 and
+       x86-64-evex-lig-2.
+
+2018-09-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/23665
+       * testsuite/gas/i386/avx-scalar.s: Remove vmovq and vmovd tests.
+       * testsuite/gas/i386/x86-64-avx-scalar.s: Likewise.
+       * testsuite/gas/i386/avx-scalar-intel.d: Updated.
+       * testsuite/gas/i386/avx-scalar.d: Likewise.
+       * testsuite/gas/i386/x86-64-avx-scalar-intel.d: Likewise.
+       * testsuite/gas/i386/x86-64-avx-scalar.d: Likewise.
+       * testsuite/gas/i386/i386.exp: Run avx-scalar2 and
+       x86-64-avx-scalar2.
+       * testsuite/gas/i386/avx-scalar-2.d: New file.
+       * testsuite/gas/i386/avx-scalar-2.s: Likewise.
+       * testsuite/gas/i386/x86-64-avx-scalar-2.d: Likewise.
+       * testsuite/gas/i386/x86-64-avx-scalar-2.s: Likewise.
+
 2018-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gas/NEWS: Mention -mvexwig=[0|1] option.
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