[ARM] Rework Tag_CPU_arch build attribute value selection
[deliverable/binutils-gdb.git] / gas / ChangeLog
index d85e1d42b1d65933db68f1ffaa7fd9a2dc2a01f6..87eea613b362182c56d9f7265b9ec5bcc3162495 100644 (file)
@@ -1,3 +1,110 @@
+2017-06-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/tc-arm.c (fpu_any): Defined from FPU_ANY.
+       (cpu_arch_ver): Add all architectures and sort by release date.
+       (have_ext_for_needed_feat_p): New.
+       (get_aeabi_cpu_arch_from_fset): New.
+       (aeabi_set_public_attributes): Call above function to determine
+       Tag_CPU_arch and Tag_CPU_arch_profile values.  Adapt Tag_ARM_ISA_use
+       and Tag_THUMB_ISA_use selection logic to check absence of feature bit
+       accordingly.
+       * testsuite/gas/arm/attr-march-armv1.d: Fix expected Tag_CPU_arch build
+       attribute value.
+       * testsuite/gas/arm/attr-march-armv2.d: Likewise.
+       * testsuite/gas/arm/attr-march-armv2a.d: Likewise.
+       * testsuite/gas/arm/attr-march-armv2s.d: Likewise.
+       * testsuite/gas/arm/attr-march-armv3.d: Likewise.
+       * testsuite/gas/arm/attr-march-armv3m.d: Likewise.
+       * testsuite/gas/arm/pr12198-2.d: Likewise.
+
+2017-06-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * testsuite/gas/i386/cet-intel.d: Updated.
+       * testsuite/gas/i386/cet.d: Likewise.
+       * testsuite/gas/i386/x86-64-cet-intel.d: Likewise.
+       * testsuite/gas/i386/x86-64-cet.d: Likewise.
+       * testsuite/gas/i386/cet.s: Update incsspd and setssbsy tests.
+       * testsuite/gas/i386/x86-64-cet.s: Likewise.
+
+2017-06-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * testsuite/gas/i386/cet-intel.d: Updated.
+       * testsuite/gas/i386/cet.d: Likewise.
+       * testsuite/gas/i386/x86-64-cet-intel.d: Likewise.
+       * testsuite/gas/i386/x86-64-cet.d: Likewise.
+       * testsuite/gas/i386/cet.s: Replace savessp with saveprevssp.
+       * testsuite/gas/i386/x86-64-cet.s: Likewise.
+
+2017-06-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (md_assemble): Update NOTRACK prefix check.
+       * testsuite/gas/i386/notrack-intel.d: Updated.
+       * testsuite/gas/i386/notrack.d: Likewise.
+       * testsuite/gas/i386/notrackbad.l: Likewise.
+       * testsuite/gas/i386/x86-64-notrack-intel.d: Likewise.
+       * testsuite/gas/i386/x86-64-notrack.d: Likewise.
+       * testsuite/gas/i386/x86-64-notrackbad.l: Likewise.
+       * testsuite/gas/i386/notrack.s: Add NOTRACK prefix tests with
+       memory indirect branch.
+       * testsuite/gas/i386/x86-64-notrack.s: Likewise.
+       * testsuite/gas/i386/notrackbad.s: Remove memory indirect branch
+       with NOTRACK prefix.
+       * testsuite/gas/i386/x86-64-notrackbad.s: Likewise.
+
+2017-06-20  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/tc-arm.c (arm_extensions): New duplicate idiv entry to enable
+       Thumb division for ARMv7 architecture.
+       (arm_parse_extension): Document expected behavior for duplicate
+       entries.
+       (s_arm_arch_extension): Likewise.
+       * testsuite/gas/arm/forbid-armv7-idiv-ext.d: New test.
+       * testsuite/gas/arm/forbid-armv7-idiv-ext.l: New expected output for
+       above test.
+
+2017-06-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/tc-arm.c (aeabi_set_public_attributes): Populate flags from
+       feature bits used or selected_cpu depending on whether a CPU was
+       selected by the user.
+
+2017-06-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/tc-arm.c (aeabi_set_public_attributes): Test *mcpu_ext_opt to
+       decide whether to set Tag_DSP_extension build attribute value.  Remove
+       now useless arm_arch variable.
+
+2017-06-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/tc-arm.c (dyn_mcpu_ext_opt): New static variable.
+       (dyn_march_ext_opt): Likewise.
+       (md_begin): Copy extension feature bits alongside architecture ones.
+       Merge extensions feature bits in selected_cpu and cpu_variant if there
+       is some.
+       (arm_parse_extension): Pass architecture and extension feature bits in
+       separate parameters, with architecture bits being read only.  Update
+       **opt_p directly rather than *ext_set and initialize it if needed.
+       (arm_parse_cpu): Stop merging architecture and extension feature bits
+       and instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them
+       respectively.  Adapt to change in parameters of arm_parse_extension.
+       (arm_parse_arch): Adapt to change in parameters of arm_parse_extension.
+       (aeabi_set_attribute_string): Make function static.
+       (arm_md_post_relax): New function.
+       (s_arm_cpu): Stop merging architecture and extension feature bits and
+       instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them
+       respectively.  Merge extension feature bits in cpu_variant
+       if there is any.
+       (s_arm_arch): Reset extension feature bit.  Set selected_cpu from
+       *mcpu_cpu_opt and cpu_variant from selected_cpu and *mfpu_opt for
+       consistency with s_arm_cpu.
+       (s_arm_arch_extension): Update *dyn_mcpu_ext_opt rather than
+       selected_cpu, allocating it before hand if needed.  Set selected_cpu
+       from it and then cpu_variant.
+       (s_arm_fpu): Merge *mcpu_ext_opt feature bits if any in cpu_variant.
+       * config/tc-arm.h (md_post_relax_hook): Set to arm_md_post_relax.
+       (aeabi_set_public_attributes): Delete external declaration.
+       (arm_md_post_relax): Declare externally.
+
 2017-06-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        * config/tc-arm.c (struct arm_cpu_option_table): New ext field.
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