+2020-01-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25438
+ * config/tc-i386.c (check_long_reg): Always disallow double word
+ suffix in mnemonic with word general register.
+ * testsuite/gas/i386/general.s: Replace word general register
+ with double word general register for movl.
+ * testsuite/gas/i386/inval.s: Add tests for movl with word general
+ register.
+ * testsuite/gas/i386/general.l: Updated.
+ * testsuite/gas/i386/inval.l: Likewise.
+
+2020-01-22 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
+ __tls_get_addr_desc and __tls_get_addr_opt.
+
+2020-01-21 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/inval-crc32.s,
+ testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
+ * testsuite/gas/i386/inval-crc32.l,
+ testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
+
+2020-01-21 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Merge CRC32 handling into
+ generic code path. Deal with No_lSuf being set in a template.
+ * testsuite/gas/i386/inval-crc32.l,
+ testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
+ instead of error(s) when operand size is ambiguous.
+ * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
+ testsuite/gas/i386/noreg64.s: Add CRC32 tests.
+ * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
+ testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
+ testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
+ Adjust expectations.
+
+2020-01-21 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Drop SYSRET special case
+ and an intel_syntax check. Re-write lack-of-suffix processing
+ logic.
+ * doc/c-i386.texi: Document operand size defaults for suffix-
+ less AT&T syntax insns.
+ * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
+ testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
+ testsuite/gas/i386/x86-64-avx-scalar.s,
+ testsuite/gas/i386/x86-64-avx.s,
+ testsuite/gas/i386/x86-64-bundle.s,
+ testsuite/gas/i386/x86-64-intel64.s,
+ testsuite/gas/i386/x86-64-lock-1.s,
+ testsuite/gas/i386/x86-64-opcode.s,
+ testsuite/gas/i386/x86-64-sse2avx.s,
+ testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
+ * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
+ testsuite/gas/i386/x86-64-nops.s,
+ testsuite/gas/i386/x86-64-ptwrite.s,
+ testsuite/gas/i386/x86-64-simd.s,
+ testsuite/gas/i386/x86-64-sse-noavx.s,
+ testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
+ insns.
+ * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
+ testsuite/gas/i386/noreg64.s: Add further tests.
+ * testsuite/gas/i386/ilp32/x86-64-nops.d,
+ testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
+ testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
+ testsuite/gas/i386/sse-noavx.d,
+ testsuite/gas/i386/x86-64-intel64.d,
+ testsuite/gas/i386/x86-64-nops.d,
+ testsuite/gas/i386/x86-64-opcode.d,
+ testsuite/gas/i386/x86-64-ptwrite-intel.d,
+ testsuite/gas/i386/x86-64-ptwrite.d,
+ testsuite/gas/i386/x86-64-simd-intel.d,
+ testsuite/gas/i386/x86-64-simd-suffix.d,
+ testsuite/gas/i386/x86-64-simd.d,
+ testsuite/gas/i386/x86-64-sse-noavx.d
+ testsuite/gas/i386/x86-64-suffix.d,
+ testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
+ * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
+ testsuite/gas/i386/noreg64.l: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2020-01-21 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx512_bf16_vl.s,
+ testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
+ of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
+ broadcast forms of VCVTNEPS2BF16.
+ * testsuite/gas/i386/avx512_bf16_vl.d,
+ testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
+
+2020-01-20 Nick Clifton <nickc@redhat.com>
+
+ * po/uk.po: Updated Ukranian translation.
+
+2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/25416
+ * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
+ for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
+ x32 object.
+ * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
+ * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
+ R_X86_64_GOTPC32_TLSDESC relocation.
+
+2020-01-18 Nick Clifton <nickc@redhat.com>
+
+ * configure: Regenerate.
+ * po/gas.pot: Regenerate.
+
+2020-01-18 Nick Clifton <nickc@redhat.com>
+
+ Binutils 2.34 branch created.
+
+2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
+ with vex_encoding_vex.
+ (parse_insn): Likewise.
+ * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
+ and {vex3} documentation.
+ * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
+ {vex}.
+ * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
+
+2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR 25376
+ * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
+ (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
+ * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
+ * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
+ * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
+ * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
+
+2020-01-16 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_template): Drop found_cpu_match local
+ variable.
+
+2020-01-16 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx512dq-inval.l,
+ testsuite/gas/i386/avx512dq-inval.s: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
+ relocations when the target is 430X, except when extracting part of an
+ expression.
+ (msp430_srcoperand): Adjust comment.
+ Initialize the expp member of the msp430_operand_s struct as
+ appropriate.
+ (msp430_dstoperand): Likewise.
+ * testsuite/gas/msp430/msp430.exp: Run new test.
+ * testsuite/gas/msp430/reloc-lo-430x.d: New test.
+ * testsuite/gas/msp430/reloc-lo-430x.s: New test.
+
2020-01-15 Alan Modra <amodra@gmail.com>
* configure.tgt: Add sparc-*-freebsd case.