+2005-09-08 Chao-ying Fu <fu@mips.com>
+
+ * doc/as.texinfo: Document -mdsp and -mno-dsp options.
+ * doc/c-mips.texi: Likewise, and document ".set dsp" and ".set nodsp"
+ directives.
+
+2005-09-08 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_smi, do_t_smi): Rename ...
+ (do_smc, do_t_smc): ... to this.
+ (insns): Remane smi to smc.
+ (md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
+ BFD_RELOC_ARM_SMC.
+
+2005-09-07 Richard Henderson <rth@redhat.com>
+
+ * dwarf2dbg.c (dwarf2_where): Set line->isa.
+ (dwarf2_set_isa): New.
+ (dwarf2_directive_loc): Rearrange to allow all options on one line.
+ * dwarf2dbg.h (dwarf2_set_isa): Declare.
+ * doc/as.texinfo: Update .loc documentation.
+
+2005-09-07 Richard Henderson <rth@redhat.com>
+
+ * dwarf2dbg.c: Include safe-ctype.h.
+ (DWARF2_LINE_OPCODE_BASE): Bump to 13.
+ (current): Initialize.
+ (dwarf2_emit_insn): Clear DWARF2_FLAG_BASIC_BLOCK,
+ DWARF2_FLAG_PROLOGUE_END, DWARF2_FLAG_EPILOGUE_BEGIN.
+ (dwarf2_directive_file): Cope with invalid filename.
+ (dwarf2_directive_loc): Add handling for basic_block, prologue_end,
+ epilogue_begin, is_stmt, isa.
+ (emit_inc_line_addr): Move line_delta == 0, addr_delta == 0 special
+ case down lower.
+ (process_entries): Handle isa, DWARF2_FLAG_PROLOGUE_END,
+ and DWARF2_FLAG_EPILOGUE_BEGIN.
+ (out_debug_line): Emit sizes for DW_LNS_set_prologue_end,
+ DW_LNS_set_epilogue_begin, DW_LNS_set_isa.
+ * dwarf2dbg.h (DWARF2_FLAG_IS_STMT): Rename from DWARF2_FLAG_BEGIN_STMT.
+ (DWARF2_FLAG_BASIC_BLOCK): Rename from DWARF2_FLAG_BEGIN_BLOCK.
+ (DWARF2_FLAG_PROLOGUE_END, DWARF2_FLAG_EPILOGUE_BEGIN): New.
+ (struct dwarf2_line_info): Add isa member.
+ * doc/as.texinfo (LNS directives): New node.
+
+2005-09-07 David Ung <davidu@mips.com>
+
+ * config/tc-mips.c (append_insn): Undo last change. Instead add
+ guard to suppress calling frag_grow if the current instruction is
+ one that allows a delay slot.
+
+2005-09-06 Chao-ying Fu <fu@mips.com>
+
+ * config/tc-mips.c (mips_set_options): Add ase_mt for MT instructions.
+ (mips_opts): Add -1 to initialize ase_mt.
+ (file_ase_mt): New variable for -mmt.
+ (CPU_HAS_MT): New define.
+ (validate_mips_insn): Add supports for +t, +T, !, $, *, &, g operand
+ formats.
+ (mips_ip): Check ase_mt to enable MT instructions.
+ Handle !, $, *, &, +T, +t, g operand formats.
+ For "mftc1", "mfthc1", "cftc1", "mttc1", "mtthc1", "cttc1", we allow
+ odd float registers.
+ (OPTION_MT, OPTION_NO_MT): New define.
+ (OPTION_COMPAT_ARCH_BASE): Change because of inserting MT define.
+ (md_parse_option): Parse OPTION_MT and OPTION_NO_MT.
+ (mips_after_parse_args): Set ase_mt based on CPU.
+ (s_mipsset): Handle ".set mt" and ".set nomt".
+ (mips_elf_final_processing): Remind of adding new flag for MT ASE.
+ (md_show_usage): Show usage of -mmt and -mno-mt.
+ * doc/as.texinfo: Document -mmt and -mno-mt options.
+ * doc/c-mips.texi: Likewise, and document ".set mt" and ".set nomt"
+ directives.
+
+2005-09-06 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (arm_it): Add relax field.
+ (T16_32_TAB): Add addi, addis, add_pc, add_sp, dec_sp, inc_sp,
+ b, bcond, ldr_pc, ldr_pc2, ldr_sp, str_sp, subi, subis.
+ (do_t_add_sub, do_t_addr, do_t_branch, do_t_ldst,
+ do_t_mov_cmp): Allow relaxation.
+ (output_relax_insn): New function.
+ (put_thumb32_insn): New function.
+ (output_inst): Use new functions.
+ (md_assemble): Don't throw error on relaxable instructions.
+ (insns): Change "b" entry from TCE(...) to tCE(...).
+ (md_estimate_size_before_relax): Return 2.
+ (md_convert_frag, relax_immediate, relax_adr, relax_addsub,
+ relax_branch, arm_relax_frag): New functions.
+ (arm_force_relocation): Return 0 for Thumb-2 immediate operand
+ relocations.
+ * config/tc-arm.h (md_convert_frag): Remove definition.
+ (md_relax_frag): Define.
+ (arm_relax_frag): Add prototype.
+
+2005-09-02 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_rn_rd): Enforce SWP operand constraints.
+
+2005-09-02 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (encode_arm_cp_address): Use
+ BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
+ (do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
+ mode.
+ (md_assemble): Only allow coprocessor instructions when Thumb-2 is
+ available.
+ (cCE, cC3): Define.
+ (insns): Use them for coprocessor instructions.
+ (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
+ (get_thumb32_insn): New function.
+ (put_thumb32_insn): New function.
+ (md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
+ BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
+
+2005-09-02 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (opcode_lookup): Look for infix opcode when
+ incorrect suffix matches.
+
+2005-09-01 David Ung <davidu@mips.com>
+
+ * config/tc-mips.c (append_insn): Correctly handle mips16 case
+ when the frags are different for the 2 instructions we want to
+ swap. If the lengths of the 2 instructions are not the same, we
+ won't do the swap but emit an nop.
+
+2005-09-01 Dmitry Diky <diwil@spec.ru>
+
+ * config/tc-msp430.c (msp430_operands): Emit dwarf2_emit_insn()
+ as appropriate. Change frag_variant() to frag_var() for relaxes.
+
+2005-08-29 Nick Clifton <nickc@redhat.com>
+
+ * write.c (generic_force_reloc): Do not call S_FORCE_RELOC if
+ there is no symbol.
+
+2005-08-26 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (intel_e09): Set JumpAbsolute when seeing a PTR-
+ qualified operand of a branch.
+ (intel_bracket_expr): Set JumpAbsolute here...
+ (intel_e11): ... rather than here.
+
+2005-08-26 Christian Groessler <chris@groessler.org>
+
+ * configure.tgt: Set bfd_gas also for z8k cpu.
+ * config/tc-z8k.c (s_segm): Use bfd_set_arch_mach to set machine
+ type.
+ (newfix): Adapt to bfd reloc types.
+ (build_bytes): Adapt to bfd reloc types. Ensure that enough space
+ is available in the current frag.
+ (md_convert_frag): Adapt function parameters.
+ (tc_gen_reloc): New function.
+ (md_section_align): Use bfd_get_section_alignment.
+ (md_apply_fix): Adapt to bfd reloc types. Fix handling of
+ BFD_RELOC_Z8K_IMM4L, BFD_RELOC_8, BFD_RELOC_16, and BFD_RELOC_32
+ relocations.
+ * config/tc-z8k.h (TARGET_ARCH): Define.
+ (tc_fix_adjustable): Define.
+
+2005-08-25 Chao-ying Fu <fu@mips.com>
+
+ * config/tc-mips.c (mips_set_options): Add ase_dsp for DSP instructions.
+ (mips_opts): Add -1 to initialize ase_dsp.
+ (file_ase_dsp): New variable for -mdsp.
+ (CPU_HAS_DSP): New define.
+ (validate_mips_insn): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, ', :, @
+ operand formats.
+ (mips_ip): Add min_range and max_range for checking singed numbers.
+ Check ase_dsp to enable DSP instructions.
+ Handle 3, 4, 5, 6, 7, 8, 9, 0, ', :, @ operand formats.
+ (OPTION_DSP, OPTION_NO_DSP): New define.
+ (OPTION_COMPAT_ARCH_BASE): Change because of inserting DSP define.
+ (md_parse_option): Parse OPTION_DSP and OPTION_NO_DSP.
+ (mips_after_parse_args): Set ase_dsp based on CPU.
+ (s_mipsset): Handle ".set dsp" and ".set nodsp".
+ (mips_elf_final_processing): Remind of adding new flag for DSP ASE.
+ (md_show_usage): Show usage of -mdsp and -mno-dsp.
+
+2005-08-23 David Ung <davidu@mips.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add 5kf to the table of
+ cpu names.
+
+2005-08-23 Alan Modra <amodra@bigpond.net.au>
+
+ PR 1036
+ * config/tc-ppc.c (ppc_symbol_chars): Add '%' and '['.
+
+2005-08-23 Phil Edwards <phil@codesourcery.com>
+
+ * configure.tgt (*-*-vxworks): Match vxworks* instead.
+
+2005-08-22 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (object_64bit): New.
+ (i386_target_format): Initialize it.
+ (output_disp): Use object_64bit for relocation type determination.
+ (output_imm): Likewise.
+ (i386_validate_fix): Likewise.
+ (tc_gen_reloc): Likewise.
+ (lex_got): Likewise. Remove static mode_name. Change array size
+ of gotrel's rel field, and adjust its initializer. Adjust diagnostic.
+ (x86_cons): Use object_64bit for deciding whether quad fields can
+ have relocations.
+
+2005-08-18 Christian Groessler <chris@groessler.org>
+
+ * config/tc-h8300.h: Remove TC_RELOC_MANGLE/tc_reloc_mangle.
+ * config/tc-mcore.h: Likewise.
+ * config/tc-z8k.h: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * config/tc-sh.h: Remove TC_RELOC_MANGLE and
+ sh_coff_reloc_mangle declaration.
+ * config/tc-sh.c: (md_apply_fix): Fix comment for case
+ BFD_RELOC_SH_USES.
+
+2005-08-18 Kaz Kojima <kkojima@rr.iij4u.or.jp>
+
+ * config/tc-sh64.c (sh64_target_format): Check preset_target_arch
+ to confirm that no ISA is specified.
+
+2005-08-18 Nick Clifton <nickc@redhat.com>
+
+ * write.c (relax_segment): Count the number of frags being
+ processed and use this to compute a maximum limit on the number of
+ iterations that will be allowed when attempting to relax the
+ segment.
+
+2005-08-17 Danny Smith <dannysmith@users.sourceforge.net>
+
+ * config/obj-coff.c (obj_coff_weak): Set auxiliary record
+ of NT weak externals to IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY.
+
+2005-08-16 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.c (ppc_set_cpu): Don't select 64-bit based on
+ default cpu.
+
+2005-08-15 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_t_mov_cmp): Fix encoding of i16-bit conditional
+ instructions.
+ (do_t_mvn_tst, do_t_neg, do_t_shift): Ditto.
+
+2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * config/tc-ppc.c (parse_cpu): Add -me300 support.
+ (md_show_usage): Likewise.
+ * doc/c-ppc.texi (PowerPC-Opts): Document it.
+
+2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * config/tc-s390.c (md_parse_option): Add cpu type z9-109.
+ (md_gather_operands): Add support for optional operands.
+
+2005-08-12 Dmitry Diky <diwil@spec.ru>
+ * config/tc-msp430.c (msp430_enable_relax): New flag.
+ (msp430_enable_polys): Likewise.
+ (OPTION_RELAX): New option.
+ (OPTION_POLYMORPHS): Likewise.
+ (md_longopts): New long options.
+ (md_show_usage): Updated.
+ (md_parse_option): Add new options handler.
+ (msp430_operands): Add check if polymorph insns are enabled.
+ (msp430_force_relocation_local): New function.
+ (md_apply_fix): Now delete relocs according to new flags combination.
+ (msp430_relax_frag): Convert long branches to short branches only if
+ flag msp430_enable_relax is set.
+ * config/tc-msp430.h (TC_FORCE_RELOCATION_LOCAL): Defined.
+ (msp430_force_relocation_local): Likewise.
+ * doc/c-msp430.texi: Describe new options.
+
+2005-08-11 Ian Lance Taylor <ian@airs.com>
+
+ * Makefile.am ($(srcdir)/make-gas.com): Remove target.
+ (stamp-mk.com): Likewise.
+ (EXTRA_DIST): Remove make-gas.com from list.
+ (MOSTLYCLEANFILES): Remove stamp-mk.com from list.
+ * Makefile.in: Regenerate.
+
+2005-08-11 Hans-Peter Nilsson <hp@axis.com>
+
+ * subsegs.c (subseg_change): Move declaration of seginfo to before
+ first statement.
+
+2005-08-11 Alan Modra <amodra@bigpond.net.au>
+
+ * README-vms: Delete.
+ * config-gas.com: Delete.
+ * makefile.vms: Delete.
+ * vmsconf.sh: Delete.
+ * config/atof-tahoe.c: Delete.
+ * config/m88k-opcode.h: Delete.
+ * config/obj-bout.c: Delete.
+ * config/obj-bout.h: Delete.
+ * config/obj-hp300.c: Delete.
+ * config/obj-hp300.h: Delete.
+ * config/tc-a29k.c: Delete.
+ * config/tc-a29k.h: Delete.
+ * config/tc-h8500.c: Delete.
+ * config/tc-h8500.h: Delete.
+ * config/tc-m88k.c: Delete.
+ * config/tc-m88k.h: Delete.
+ * config/tc-tahoe.c: Delete.
+ * config/tc-tahoe.h: Delete.
+ * config/tc-tic80.c: Delete.
+ * config/tc-tic80.h: Delete.
+ * config/tc-w65.c: Delete.
+ * config/tc-w65.h: Delete.
+ * config/te-aux.h: Delete.
+ * config/te-delt88.h: Delete.
+ * config/te-delta.h: Delete.
+ * config/te-dpx2.h: Delete.
+ * config/te-hp300.h: Delete.
+ * config/te-ic960.h: Delete.
+ * config/vms-a-conf.h: Delete.
+ * doc/c-a29k.texi: Delete.
+ * doc/c-h8500.texi: Delete.
+ * doc/c-m88k.texi: Delete.
+ * README: Remove obsolete examples, and list of supported targets.
+ * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65,
+ bout and hp300 support.
+ (DEP_FLAGS): Don't define BFD_ASSEMBLER.
+ * configure.in: Remove --enable-bfd-assembler, need_bfd,
+ primary_bfd_gas.
+ * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf,
+ m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy.
+ * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets.
+ * as.h: Likewise.
+ * dw2gencfi.c: Likewise.
+ * dwarf2dbg.c: Likewise.
+ * ehopt.c: Likewise.
+ * input-file.c: Likewise.
+ * listing.c: Likewise.
+ * literal.c: Likewise.
+ * messages.c: Likewise.
+ * obj.h: Likewise.
+ * output-file.c: Likewise.
+ * read.c: Likewise.
+ * stabs.c: Likewise.
+ * struc-symbol.h: Likewise.
+ * subsegs.c: Likewise.
+ * subsegs.h: Likewise.
+ * symbols.c: Likewise.
+ * symbols.h: Likewise.
+ * tc.h: Likewise.
+ * write.c: Likewise.
+ * write.h: Likewise.
+ * config/aout_gnu.h: Likewise.
+ * config/obj-aout.c: Likewise.
+ * config/obj-aout.h: Likewise.
+ * config/obj-coff.c: Likewise.
+ * config/obj-coff.h: Likewise.
+ * config/obj-evax.h: Likewise.
+ * config/obj-ieee.h: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-arm.h: Likewise.
+ * config/tc-avr.c: Likewise.
+ * config/tc-avr.h: Likewise.
+ * config/tc-crx.h: Likewise.
+ * config/tc-d10v.h: Likewise.
+ * config/tc-d30v.h: Likewise.
+ * config/tc-dlx.h: Likewise.
+ * config/tc-fr30.h: Likewise.
+ * config/tc-frv.h: Likewise.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-h8300.h: Likewise.
+ * config/tc-hppa.h: Likewise.
+ * config/tc-i370.h: Likewise.
+ * config/tc-i386.c: Likewise.
+ * config/tc-i386.h: Likewise.
+ * config/tc-i860.h: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-i960.h: Likewise.
+ * config/tc-ip2k.h: Likewise.
+ * config/tc-iq2000.h: Likewise.
+ * config/tc-m32c.h: Likewise.
+ * config/tc-m32r.h: Likewise.
+ * config/tc-m68hc11.h: Likewise.
+ * config/tc-m68k.c: Likewise.
+ * config/tc-m68k.h: Likewise.
+ * config/tc-maxq.c: Likewise.
+ * config/tc-maxq.h: Likewise.
+ * config/tc-mcore.c: Likewise.
+ * config/tc-mcore.h: Likewise.
+ * config/tc-mn10200.h: Likewise.
+ * config/tc-mn10300.c: Likewise.
+ * config/tc-mn10300.h: Likewise.
+ * config/tc-ms1.h: Likewise.
+ * config/tc-msp430.c: Likewise.
+ * config/tc-msp430.h: Likewise.
+ * config/tc-ns32k.c: Likewise.
+ * config/tc-ns32k.h: Likewise.
+ * config/tc-openrisc.h: Likewise.
+ * config/tc-or32.c: Likewise.
+ * config/tc-or32.h: Likewise.
+ * config/tc-ppc.c: Likewise.
+ * config/tc-ppc.h: Likewise.
+ * config/tc-s390.h: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-sh.h: Likewise.
+ * config/tc-sparc.c: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * config/tc-tic30.h: Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * config/tc-tic4x.h: Likewise.
+ * config/tc-tic54x.c: Likewise.
+ * config/tc-tic54x.h: Likewise.
+ * config/tc-v850.h: Likewise.
+ * config/tc-vax.c: Likewise.
+ * config/tc-vax.h: Likewise.
+ * config/tc-xstormy16.h: Likewise.
+ * config/tc-xtensa.h: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * config/tc-z8k.h: Likewise.
+ * config/vms-a-conf.h
+ * doc/Makefile.am: Likewise.
+ * doc/all.texi: Likewise.
+ * doc/as.texinfo: Likewise.
+ * doc/internals.texi: Likewise.
+ * doc/Makefile.in: Regenerate.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2005-08-09 Nick Clifton <nickc@redhat.com>
+
+ PR 1070
+ * macro.c (getstring): Do not treat round parentheses exactly the
+ same as angle brackets - the parentheses need to be preserved and
+ passed on to the macro processing code.
+
+2005-08-08 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c (MSP430_ISA_21): Define.
+ (mcu_types): Add entries for msp430x21xx variants.
+
+2005-08-08 Nick Clifton <nickc@redhat.com>
+
+ PR 1070
+ * macro.c (getstring): Treat round parentheses in the same way as
+ angle brackets.
+ (get_any_string): Likewise.
+
+2005-08-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/1118
+ * as.c (parse_args): Handle -al=<FILE>.
+
+2005-08-07 Nick Clifton <nickc@redhat.com>
+
+ * read.c (s_app_line): Accept a line number of 0 for compatibility
+ with gcc's output for assembler-with-cpp files.
+
+2005-08-05 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (current_it_mask, current_cc): New variables.
+ (do_t_add_sub): Use correct encodings inside IT block.
+ (do_t_arit3c): Ditto.
+ (do_t_it): Simplify logic. Set current_it_mask and current_cc.
+ (md_assemble): Verify conditional suffixes agains IT blocks.
+
+2005-08-05 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (encode_thumb32_immediate): Only accept shifted
+ constants.
+ (encode_thumb32_shifted_operand): Prohibit register shifts.
+ (encode_thumb32_addr_mode): Fix typo.
+ (insns): Correct thumb2 ldm and stm opcodes.
+
+2005-08-02 Khem Raj <kraj@mvista.com>
+
+ * config/tc-arm.c (do_iwmmxt_wldstd): Correct the offset range for
+ WLDRD/WSTRD instruction.
+
+2005-08-02 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.c (md_apply_fix <ELF>): Don't warn on overflow
+ if emitting a reloc.
+
+2005-07-29 Thiemo Seufer <ths@networkno.de>
+
+ * config/tc-mips.c (s_mips_globl): Allow multiple symbols per .globl.
+
+2005-07-29 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and
+ pop.
+ (do_t_addr): Implement 32-bit variant.
+ (do_t_push_pop): Make some errors warnings. Handle single register
+ 32-bit case.
+ (insns): Use tCE for adr.
+ (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12.
+ (md_apply_fix): Ditto.
+
+2005-07-29 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (parse_tb): New function.
+ (enum operand_parse_code): Add OP_TB.
+ (parse_operands): Handle OP_TB.
+ (do_t_add_sub_w, do_t_tb): New functions.
+ (insns): Add entries for addw, subw, tbb and tbh.
+ (md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12.
+
+2005-07-29 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+ * config/tc-m32r.c (m32r_check_fixup): Fixed X_op check.
+
+2007-07-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (handle_large_common): Declare only for ELF.
+
+2005-07-27 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-ia64.h (unw_r_record): Change type of fr_mem to unsigned
+ int.
+ (unw_p_record): Remove unused/redundant fields imask and rmask.
+ Combine spoff and pspoff into a union. Combine gr and br into a
+ union. Change type of grmask and brmask to unsigned char. Change type
+ of frmask to unsigned int.
+ (unw_x_record): Combine spoff, pspoff, and treg into a union.
+ * config/tc-ia64.c (unwind): New field 'pending_saves'.
+ (check_pending_save): New.
+ (alloc_record): Clear out entire record.
+ (output_psp_gr): Use renamed structure fields.
+ (output_psp_sprel): Likewise.
+ (output_rp_gr): Likewise.
+ (output_rp_br): Likewise.
+ (output_rp_psprel): Likewise.
+ (output_rp_sprel): Likewise.
+ (output_pfs_gr): Likewise.
+ (output_pfs_psprel): Likewise.
+ (output_pfs_sprel): Likewise.
+ (output_preds_gr): Likewise.
+ (output_preds_psprel): Likewise.
+ (output_preds_sprel): Likewise.
+ (output_spill_base): Likewise.
+ (output_unat_gr): Likewise.
+ (output_unat_psprel): Likewise.
+ (output_unat_sprel): Likewise.
+ (output_lc_gr): Likewise.
+ (output_lc_psprel): Likewise.
+ (output_lc_sprel): Likewise.
+ (output_fpsr_gr): Likewise.
+ (output_fpsr_psprel): Likewise.
+ (output_fpsr_sprel): Likewise.
+ (output_priunat_gr): Likewise.
+ (output_priunat_psprel): Likewise.
+ (output_priunat_sprel): Likewise.
+ (output_bsp_gr): Likewise.
+ (output_bsp_psprel): Likewise.
+ (output_bsp_sprel): Likewise.
+ (output_bspstore_gr): Likewise.
+ (output_bspstore_psprel): Likewise.
+ (output_bspstore_sprel): Likewise.
+ (output_rnat_gr): Likewise.
+ (output_rnat_psprel): Likewise.
+ (output_rnat_sprel): Likewise.
+ (output_spill_psprel): Likewise.
+ (output_spill_sprel): Likewise.
+ (output_spill_reg): Likewise.
+ (output_fr_mem): Likewise. Allocate one unwind record per set mask
+ bit.
+ (output_frgr_mem): Likewise.
+ (output_gr_mem): Likewise.
+ (output_br_mem): Likewise.
+ (output_gr_gr): Likewise.
+ (output_br_gr): Likewise.
+ (fixup_unw_records): Likewise.
+ (process_one_record): Use renamed structure fields. For gr_gr and
+ br_gr, collect mask from chain of records before output.
+ (in_prologue): Simplify and eliminate early returns. Call
+ check_pending_save.
+ (in_body): Simplify and eliminate early returns.
+ (dot_body): Call check_pending_save.
+ (md_assemble): Update comment. Deal with pending saves.
+
+2005-07-26 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (optimize_imm): Calculate candidate immediates
+ mask from guessed suffix, but mask out other immediate types only
+ if at least on candidate is valid for the insn.
+
+2005-07-25 DJ Delorie <dj@redhat.com>
+
+ * config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
+ Support %mod() modifiers from opcodes.
+ * doc/c-m32c.texi (M32C-Modifiers): New section.
+
+2005-07-25 Jan Hubicka <jh@suse.cz>
+ H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is
+ defined.
+ (elf_com_section_ptr): New.
+ (elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr.
+ (elf_common_parse): Make it global. Use elf_com_section_ptr
+ instead of bfd_com_section_ptr.
+ (obj_elf_change_section): Handle x86-64 large bss sections.
+
+ * config/obj-elf.h (elf_com_section_ptr): New.
+ (elf_common_parse): New.
+
+ * config/tc-i386.c (handle_large_common): New.
+ (md_pseudo_table): Add "largecomm".
+ (x86_64_section_letter): New.
+ (x86_64_section_word): New.
+
+ * config/tc-i386.h (x86_64_section_word): New.
+ (x86_64_section_letter): New.
+ (md_elf_section_letter): New. Defined.
+ (md_elf_section_word): Likewise.
+
+2005-07-21 Ralf Corsepius <ralf.corsepius@rtems.org>
+
+ * configure.tgt: Remove i386-*-rtemself*.
+ Remove sparc-*-rtemself*.
+
+2005-07-21 Ben Elliston <bje@gnu.org>
+
+ * config/tc-m68k.h: Remove TE_LYNX conditional code.
+
+2005-07-21 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (encode_thumb32_addr_mode): Don't set
+ inst.reloc.pc_rel.
+
+2005-07-20 Tavis Ormandy <taviso@gentoo.org>
+
+ * messages.c: Use vsnprintf instead of vsprintf.
+
+2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+ * config/tc-m32r.c (tc_gen_reloc): Check BFD_RELOC_32_PCREL and
+ BFD_RELOC_16_PCREL to Support R_M32R_REL32.
+
+2005-07-18 Nick Clifton <nickc@redhat.com>
+
+ * configure.tgt: Restore alpha ordering to list of arches.
+
+2005-07-18 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ * tc-hppa.c (pa_ip): Reject match for '#' immediate if not pa20.
+
+2005-07-18 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (md_begin): Use IS_ELF.
+ (tc_i386_fix_adjustable): Likewise.
+ (md_estimate_size_before_relax): Likewise.
+ (md_apply_fix): Likewise.
+ (i386_target_format): Likewise.
+ (lex_got): Define to NULL when not ELF or when LEX_AT. Check IS_ELF.
+ (i386_immediate): Remove #ifdef LEX_AT.
+ (i386_displacement): Likewise.
+ * config/tc-i386.h (x86_cons): Prototype only when ELF and when not
+ LEX_AT.
+
+2005-07-18 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (reloc): Convert to ISO C90. Change first
+ parameter to unsigned. Parameter sign now is tristate - zero/
+ positive mean unsigned/signed, negative means signedness doesn't
+ matter. Check field size,
+ signedness, and pcrel-ness are in agreement between relocated field
+ and relocation type. Adjust diagnostics.
+ (optimize_imm): And type mask of operand instead of overwriting it.
+ (lex_got): Convert to ISO C90. Add third parameter. Add new field to
+ local structure and initialize gotrel accordingly. Pass caller as
+ mask of types that the operator can match.
+ (x86_cons_fix_new): Let reloc know that signedness of relocation
+ doesn't matter.
+ (x86_pe_cons_fix_new): Likewise.
+ (x86_cons): Pass additional argument to lex_got.
+ (i386_immediate): New local variable 'types'. Pass its address as
+ additional argument to lex_got. Mask out operand types not supported
+ befoe returning.
+ (i386_displacement): Likewise. Set bigdisp to all types supported in
+ 64-bit mode, combining the previously split initialization.
+
+2005-07-18 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (parse_insn): Reject prefix if unavailable in
+ current mode.
+
+2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ * config/tc-hppa.c (pa_ip): Search entire mnemonic before considering
+ promoted match.
+
+2005-07-16 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/config/tc-i386.h (CpuVMX): New.
+ (CpuUnknownFlags): Add CpuVMX.
+
+2005-07-14 Jim Blandy <jimb@redhat.com>
+
+ Add support for the Renesas M32C.
+ * Makefile.am (CPU_TYPES): List m32c.
+ (TARGET_CPU_CFILES): List config/tc-m32c.c.
+ (TARGET_CPU_HFILES): List config/tc-m32c.h.
+ * configure.in: Add case for m32c.
+ * configure.tgt: Add cases for m32c and m32c-*-elf.
+ * configure: Regenerated.
+ * config/tc-m32c.c, config/tc-m32c.h: New files.
+ * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
+ * doc/Makefile.in: Regenerated.
+ * doc/all.texi: Set M32C.
+ * doc/as.texinfo: Add text for the M32C-specific options and line
+ comment characters, and refer to c-m32c.texi.
+ * doc/c-m32c.texi: New file.
+
+2005-07-14 Nick Clifton <nickc@redhat.com>
+
+ PR 1069
+ * config/tc-crx.c (reset_vars): Use strncpy to prevent overflowing
+ the ins_parse buffer.
+
+2005-07-10 Ralf Corsepius <ralf.corsepius@rtems.org>
+
+ * configure.tgt: Remove a29k-*-rtems*, hppa*-*-rtems*,i386-go32-rtems*,
+ i386-*-rtemscoff*, sparc-*-rtemsaout*.
+
+2005-07-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (optimize_disp): Optimize signed 32bit
+ displacements.
+
+2005-07-08 Ben Elliston <bje@au.ibm.com>
+
+ * frags.h: Remove ANSI_PROTOTYPES conditional code.
+ * config/obj-elf.h: Likewise.
+ * config/tc-h8300.h: Likewise.
+ * config/tc-h8500.h: Likewise.
+ * config/tc-i370.h: Likewise.
+ * config/tc-i386.h: Likewise.
+ * config/tc-m68hc11.h: Likewise.
+ * config/tc-m68k.h: Likewise.
+ * config/tc-ppc.h: Likewise.
+ * config/tc-s390.h: Likewise.
+ * config/tc-sh.h: Likewise.
+ * config/tc-sparc.h: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * config/tc-w65.h: Likewise.
+ * config/tc-xtensa.h: Likewise.
+
+2005-07-08 Hans-Peter Nilsson <hp@axis.com>
+
+ PR gas/1049
+ * config/tc-cris.h (MD_APPLY_SYM_VALUE): Define.
+
+2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * config/tc-tic30.c (debug): Add format attribute. Fix format
+ bugs.
+
+2005-07-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add sse3.
+
+ * config/tc-i386.h (CpuSSE3): Renamed from ...
+ (CpuPNI): This. Defined as CpuSSE3.
+
+ * doc/c-i386.texi: Document .sse3.
+
+2005-07-06 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-ia64.c (nop): Use zero for L-unit pseudo-nop.
+
+2005-07-05 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-pdp11.c (md_apply_fix): Cast first argument to
+ md_chars_to_numbers to an unsigned pointer in order to avoid a
+ compile time warning.
+
+2005-07-05 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-ppc.c (ppc_target_format): Add VxWorks.
+
+2005-07-05 Aldy Hernandez <aldyh@redhat.com>
+
+ * config/tc-ms1.c: New.
+ * config/tc-ms1.h: New.
+ * testsuite/gas/ms1/allinsn.d: New.
+ * testsuite/gas/ms1/allinsn.s: New.
+ * testsuite/gas/ms1/badinsn.s: New.
+ * testsuite/gas/ms1/badinsn1.s: New.
+ * testsuite/gas/ms1/badoffsethigh.s: New.
+ * testsuite/gas/ms1/badoffsetlow.s: New.
+ * testsuite/gas/ms1/badorder.s: New.
+ * testsuite/gas/ms1/badreg.s: New.
+ * testsuite/gas/ms1/badsignedimmhigh.s: New.
+ * testsuite/gas/ms1/badsignedimmlow.s: New.
+ * testsuite/gas/ms1/badsyntax.s: New.
+ * testsuite/gas/ms1/badsyntax1.s: New.
+ * testsuite/gas/ms1/badunsignedimmhigh.s: New.
+ * testsuite/gas/ms1/badunsignedimmlow.s: New.
+ * testsuite/gas/ms1/errors.exp: New.
+ * testsuite/gas/ms1/ldst.s: New.
+ * testsuite/gas/ms1/misc.d: New.
+ * testsuite/gas/ms1/misc.s: New.
+ * testsuite/gas/ms1/ms1-16-003.d: New.
+ * testsuite/gas/ms1/ms1-16-003.s: New.
+ * testsuite/gas/ms1/ms1.exp: New.
+ * testsuite/gas/ms1/msys.d: New.
+ * testsuite/gas/ms1/msys.s: New.
+ * testsuite/gas/ms1/relocs.d: New.
+ * testsuite/gas/ms1/relocs.exp: New.
+ * testsuite/gas/ms1/relocs1.s: New.
+ * testsuite/gas/ms1/relocs2.s: New.
+
+2005-07-05 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.h (CpuSVME): New.
+ (CpuUnknownFlags): Include CpuSVME.
+ * config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
+ as alias of sledgehammer.
+ (md_assemble): Include invlpga in the check for insns with two source
+ operands.
+ (process_operands): Include SVME insns in the check for ignored
+ segment overrides. Adjust diagnostic.
+ (i386_index_check): Special-case SVME insns with memory operands.
+
+2005-07-04 Khem Raj <kraj@mvista.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * tc-arm.c (struct arm_it): Make operands.imm signed to match its
+ use an immediate value.
+ (parse_vfp_reg_list): Make the 2nd parameter an unsigned pointer
+ since the register field of the operands structure is unsigned.
+ (s_arm_unwind_save_vfp): Make "reg" unsigned.
+ (parse_operands): Make the 2ns parameter an unsigned pointer to
+ match its use.
+ (do_ldrd): When using the imm field of the operands structure as a
+ second register field, treat it as unsigned.
+
+2005-07-04 Alan Modra <amodra@bigpond.net.au>
+
+ PR 1004
+ * config/obj-elf.c (obj_elf_change_section): Use backend
+ get_sec_type_attr.
+
+2005-07-01 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-ia64.c (line_separator_chars): Add '{' and '}'.
+ (output_spill_psprel, output_spill_psprel_p): Combine.
+ (output_spill_sprel, output_spill_sprel_p): Combine.
+ (output_spill_reg, output_spill_regp_p): Combine.
+ (process_one_record): Handle psp_psprel.
+ (parse_predicate_and_operand): New.
+ (convert_expr_to_ab_reg): Two new parameters. Return void. Always
+ initialize output values. Emit diagnostic case here.
+ (convert_expr_to_xy_reg): Likewise. Don't allow r0, f0, and f1.
+ (add_unwind_entry): New second parameter. Allow first parameter to
+ be NULL. Parse optional tag, emit warning about further support for
+ it otherwise being missing. Check end-of-line when requested.
+ (dot_fframe): Clear operand when wrong. Allow tag.
+ (dot_vframe): Likewise.
+ (dot_vframesp): Likewise. Rename parameter, issue warning when psp
+ relative.
+ (dot_vframepsp): Remove.
+ (dot_altrp): Clear operand when wrong. Allow tag.
+ (dot_save): Likewise. Let default case also go through
+ add_unwind_entry.
+ (dot_savemem): Likewise.
+ (dot_restore): Don't return when wrong operand. Allow tag.
+ (dot_spillreg, dot_spillreg_p): Combine. Simplify by using
+ parse_predicate_and_operand and the new arguments to
+ convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
+ when wrong operand. Allow tag.
+ (dot_restorereg, dot_restorereg_p): Likewise.
+ (dot_spillmem, dot_spillmem_p): Likewise.
+ (dot_saveg): Clear operand when wrong. Perform tighter operand
+ checks. Allow tag.
+ (dot_savef): Likewise.
+ (dot_saveb): Likewise.
+ (dot_savegf): Likewise.
+ (dot_spill): Remove end-of-line check. Combine. Simplify by using
+ parse_predicate_and_operand and the new arguments to
+ convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
+ when wrong operand. Allow tag.
+ (popcount): New.
+ (dot_label_state): Don't return when wrong operand.
+ (dot_copy_state): Likewise.
+ (dot_unwabi): Likewise. Check if in prologue.
+ (dot_body): Don't call demand_empty_rest_of_line.
+ (dot_prologue): Type of mask and grsave is unsigned. Perform tighter
+ operand checks.
+ (md_pseudo_table): Also use dot_restorereg for .restorereg.p. Also
+ use dot_spillreg for .spillreg.p. Also use dot_spillmem for
+ .spillpsp.p and .spillsp.p. Also use dot_vframesp for .vframepsp.
+ (parse_operand): New second parameter. Don't deal with '}' here
+ anymore. Don't advance past end-of-line.
+ (parse_operands): Pass second argument to parse_operand.
+ (ia64_start_line): Prevent out-of-bounds access through
+ input_line_pointer. Deal with '}' here.
+ (ia64_unrecognized_line): Don't deal with '}' here.
+ (dot_alias): Use ignore_rest_of_line not its deprecated alias
+ discard_rest_of_line.
+
2005-06-30 Zack Weinberg <zack@codesourcery.com>
* config/tc-arm.c (T_OPCODE_BRANCH, encode_arm_addr_mode_2)
projects / deliverable / binutils-gdb.git / blobdiff