+2015-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (shared): New.
+ (OPTION_MSHARED): Likewise.
+ (elf_symbol_resolved_in_segment_p): Add relocation argument.
+ Check PLT relocations and shared.
+ (md_estimate_size_before_relax): Pass fragP->fr_var to
+ elf_symbol_resolved_in_segment_p.
+ (md_longopts): Add -mshared.
+ (md_show_usage): Likewise.
+ (md_parse_option): Handle OPTION_MSHARED.
+ * doc/c-i386.texi: Document -mshared.
+
+2015-05-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * write.c (compress_debug): Don't write the zlib header, which
+ is handled by bfd_update_compression_header.
+
+2015-05-13 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (xtensa_relax_frag): Allow trampoline to be
+ closer than J_RANGE / 2 to jump frag.
+
+2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.tgt (arch): Set to iamcu for i386-*-elfiamcu target.
+ * config/tc-i386.c (i386_mach): Support iamcu.
+ (i386_target_format): Likewise.
+
+2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add iamcu.
+ (i386_align_code): Handle PROCESSOR_IAMCU.
+ (i386_arch): Likewise.
+ (i386_mach): Likewise.
+ (i386_target_format): Likewise.
+ (valid_iamcu_cpu_flags): New function.
+ (check_cpu_arch_compatible): Only allow Intel MCU instructions
+ when targeting Intel MCU.
+ (set_cpu_arch): Call valid_iamcu_cpu_flags to check if CPU flags
+ are valid for Intel MCU.
+ (md_parse_option): Likewise.
+ * tc-i386.h (ELF_TARGET_IAMCU_FORMAT): New.
+ (processor_type): Add PROCESSOR_IAMCU.
+ * doc/c-i386.texi: Document iamcu.
+
+2015-05-08 Nick Clifton <nickc@redhat.com>
+
+ PR gas/18347
+ * config/tc-arm.h (TC_EQUAL_IN_INSN): Define.
+ * config/tc-arm.c (arm_tc_equal_in_insn): New function. Move
+ the symbol name checking code to here from...
+ (md_undefined_symbo): ... here.
+
+2015-05-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (elf_symbol_resolved_in_segment_p): New.
+ (md_estimate_size_before_relax): Use it.
+
+2015-05-06 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c: Typo in comment fixed.
+
+2015-05-06 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (sparc_ip): Support the %ncc "natural"
+ condition codes
+ * doc/c-sparc.texi (Sparc-Regs): Document %ncc.
+
+2015-05-06 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (Dollar Local Labels): Note that these are only
+ supported on some targets.
+
+2015-05-06 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (mapping_state): Recording alignment before exit.
+
+2015-05-05 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (aarch64_init_frag): Always generate mapping
+ symbols.
+
+2015-05-05 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c (MAX_OP_LEN): Increase to 4096.
+ (msp430_make_init_symbols): New function.
+ (msp430_section): Call it.
+ (msp430_frob_section): Likewise.
+
+2015-05-02 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (cached_fixupS, fixup_cacheS): New typedefs.
+ (struct cached_fixup, struct fixup_cache): New structures.
+ (fixup_order, xtensa_make_cached_fixup),
+ (xtensa_realloc_fixup_cache, xtensa_cache_relaxable_fixups),
+ (xtensa_find_first_cached_fixup, xtensa_delete_cached_fixup),
+ (xtensa_add_cached_fixup): New functions.
+ (xtensa_relax_frag): Cache fixups pointing at potentially
+ oversized jumps at the beginning of every relaxation pass. Only
+ check subset of this cache in the reach of single jump from the
+ trampoline frag currently being relaxed.
+
+2015-05-01 Nick Clifton <nickc@redhat.com>
+
+ * config/rl78-parse.y (MULU): Remove ISA_G14.
+ (MULH, DIVHU, DIVWU, MACHI, MACH): Update error strings.
+
+2015-05-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_elf_emit_arch_note): Removed.
+ * config/tc-i386.h (md_end): Likewise.
+ (i386_elf_emit_arch_note): Likewise.
+
+2015-05-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.tgt: Support i386-*-elf*.
+
+2015-04-30 DJ Delorie <dj@redhat.com>
+
+ * config/rl78-defs.h (rl78_isa_g10): New.
+ (rl78_isa_g13): New.
+ (rl78_isa_g14): New.
+ * config/rl78-parse.y (ISA_G10): New.
+ (ISA_G13): New.
+ (ISA_G14): New.
+ (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
+ * config/tc-rl78.c (rl78_isa_g10): New.
+ (rl78_isa_g13): New.
+ (rl78_isa_g14): New.
+
+2015-04-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_target_format): Use "else if" on
+ cpu_arch_isa.
+
+2015-04-30 Nick Clifton <nickc@redhat.com>
+
+ PR gas/18347
+ * config/tc-arm.c (md_undefined_symbol): Issue a warning message
+ (if enabled) when the user creates a symbol with the same name as
+ an ARM instruction.
+ (flag_warn_syms): New static variable.
+ (arm_opts): Add mwarn-syms and mno-warn-syms.
+ * doc/c-arm.texi (ARM Options): Document the -m[no-]warn-syms
+ options.
+
+ PR gas/18353
+ * doc/as.texinfo (Zero): Add documentation of the .zero pseudo-op.
+
+2015-04-29 Nick Clifton <nickc@redhat.com>
+
+ PR 18256
+ * config/tc-arm.c (encode_arm_cp_address): Issue an error message
+ if the operand is neither a register nor a vector.
+
+2015-04-29 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (Set): Note that a symbol cannot be set multiple
+ times if the expression is not constant and the target uses linker
+ relaxation.
+
+2015-04-28 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-arm.c (arm_init_frag): Always emit mapping symbols.
+
+2015-04-28 Nick Clifton <nickc@redhat.com>
+
+ PR 18313
+ * cond.c (s_if): Stop compile time warning about stopc being used
+ before it is set.
+ (s_ifc): Likewise.
+
+2015-04-27 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (s_aarch64_inst): Don't align code for non-text
+ section.
+ (md_assemble): Likewise, move the align code outside the loop.
+
+2015-04-24 Jim Wilson <jim.wilson@linaro.org>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add CRC and CRYPTO features
+ for thunderx.
+
+2015-04-24 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/tc-arm.h (arm_min): New function.
+ (SUB_SEGMENT_ALIGN): Define.
+
+2015-04-23 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (macro): State the recommended way of creating
+ 32-bit or 64-bit addresses.
+
+2015-04-23 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_mem_size): Also allow no size
+ specification when broadcasting.
+
+2015-04-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/as.texinfo (Bundle directives): Shorten menu entry and
+ use @subsection.
+ (CFI directives): Use @subsection.
+ (SH-Dependent, SH64-Dependent): Moved after SCORE-Dependent.
+ * doc/c-i386.texi (i386-Mnemonics): Use @subsection.
+
+2015-04-17 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ * config/tc-avr.c (create_record_for_frag): Rename link to
+ prop_rec_link.
+
+2015-04-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention
+ --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi].
+
+2015-04-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * as.h (compressed_debug_section_type): Removed.
+
+2015-04-14 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-rl78.h (TC_LINKRELAX_FIXUP): Define.
+ (TC_FORCE_RELOCATION_SUB_SAME): Define.
+ (DWARF2_USE_FIXED_ADVANCE_PC): Define.
+
+2015-04-10 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/18198
+ * doc/c-arm.texi (ARM Options): Add a note about the interaction of
+ the -EB option with the linker's --be8 option.
+
+2015-04-09 Hans-Peter Nilsson <hp@axis.com>
+
+ * doc/c-rx.texi: Fix markup typos in last change.
+
+2015-04-09 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-rx.c (enum options): Add OPTION_DISALLOW_STRING_INSNS.
+ (md_longopts): Add -mno-allow-string-insns.
+ (md_parse_option): Handle -mno-allow-string-insns.
+ (md_show_usage): Mention -mno-allow-string-insns.
+ (rx_note_string_insn_use): New function. Produces an error
+ message if a string insn is used when it is not allowed.
+ * config/rx-parse.y (SCMPU): Call rx_note_string_insn_use.
+ (SMOVU, SMOVB, SMOVF, SUNTIL, SWHILE, RMPA): Likewise.
+ * config/rx-defs.h (rx_note_string_insn_use): Prototype.
+ * doc/c-rx.texi: Document -mno-allow-string-insns.
+
+2015-04-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * as.c (show_usage): Update --compress-debug-sections.
+ (std_longopts): Use optional_argument on compress-debug-sections.
+ (parse_args): Handle
+ --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
+ * as.h (compressed_debug_section_type): New.
+ (flag_compress_debug): Change type to compressed_debug_section_type.
+ --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
+ * write.c (compress_debug): Set BFD_COMPRESS_GABI for
+ --compress-debug-sections=zlib-gabi. Call
+ bfd_get_compression_header_size to get compression header size.
+ Don't rename section name for --compress-debug-sections=zlib-gabi.
+ * config/tc-i386.c (compressed_debug_section_type): Set to
+ COMPRESS_DEBUG_ZLIB.
+ * doc/as.texinfo: Document
+ --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
+
+2015-04-07 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (mapping_state): Use subseg_text_p.
+ (s_aarch64_inst): Likewise.
+ (md_assemble): Likewise.
+
+2015-04-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * write.c (compress_debug): Use bfd_putb64 to write uncompressed
+ section size.
+
+2015-04-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * write.c (compress_debug): Don't write the zlib header if
+ compressed section size is the same as before compression.
+
+2015-04-02 Nick Clifton <nickc@redhat.com>
+
+ PR gas/18189
+ * config/tc-microblaze.c (parse_imm): Use offsetT as the type for
+ min and max parameters. Sign extend values before testing.
+
+2015-04-02 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (mapping_state): Emit MAP_DATA within text section in order.
+ (mapping_state_2): Don't emit MAP_DATA here.
+ (s_aarch64_inst): Align frag during state transition.
+ (md_assemble): Likewise.
+
+2015-04-02 Ed Maste <emaste@freebsd.org>
+
+ * config/tc-aarch64.c (set_error_kind): Delete.
+ (set_error_message): Delete.
+
+2015-04-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2015-04-01 Evandro Menezes <e.menezes@samsung.com>
+
+ * config/tc-aarch64.c: Add support for Samsung Exynos M1.
+ * doc/c-aarch64.texi (-mcpu=): Add "exynos-m1".
+
+2015-04-01 Evandro Menezes <e.menezes@samsung.com>
+
+ * config/tc-arm.c: Add support for Samsung Exynos M1.
+ * doc/c-arm.texi (-mcpu=): Add "exynos-m1".
+
+2015-04-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2015-03-31 Ed Schouten <ed@nuxi.nl>
+
+ * configure.tgt (fmt): Set to elf for *-*-cloudabi*.
+
+2015-03-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.ac: Revert the AM_ZLIB change.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+ * configure: Likewise.
+
+2015-03-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am (ZLIBINC): New.
+ (AM_CFLAGS): Add $(ZLIBINC).
+ * as.c: (show_usage): Don't check HAVE_ZLIB_H.
+ (parse_args): Likewise.
+ * compress-debug.c: Don't check HAVE_ZLIB_H to include <zlib.h>.
+ (compress_init): Don't check HAVE_ZLIB_H.
+ (compress_data): Likewise.
+ (compress_finish): Likewise.
+ * configure.ac (AM_ZLIB): Removed.
+ (zlibinc): New. AC_SUBST.
+ Add --with-system-zlib.
+ * Makefile.in: Regenerated.
+ * config.in: Likewise.
+ * configure: Likewise.
+ * doc/Makefile.in: Likewise.
+
+2015-03-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_flags_set): Removed.
+
+2015-03-25 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (mapping_state): Remove first MAP_DATA emitting
+ code.
+ (mapping_state_2): Emit first MAP_DATA symbol here.
+
+2015-03-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/18087
+ * write.c (compress_debug): Don't write the zlib header if
+ compression didn't make the section smaller.
+
+2015-03-24 Terry Guo <terry.guo@arm.com>
+
+ * config/tc-arm.c (no_cpu_selected): Use new macro to compare
+ features.
+ (parse_psr): Likewise.
+ (do_t_mrs): Likewise.
+ (do_t_msr): Likewise.
+ (static const arm_feature_set arm_ext_*): Defined with new macros.
+ (static const arm_feature_set arm_cext_*): Likewise.
+ (static const arm_feature_set fpu_fpa_ext_*): Likewise.
+ (static const arm_feature_set fpu_vfp_ext_*): Likewise.
+ (deprecated_coproc_regs): Likewise.
+ (UL_BARRIER): Likewise.
+ (barrier_opt_names): Likewise.
+ (arm_cpus): Likewise.
+ (arm_extensions): Likewise.
+
+2015-03-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_align_code): Limit multi-byte nop
+ instructions to 10 bytes.
+
+2015-03-19 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-rl78.c (enum options): Add G13 and G14.
+ (md_longopts): Add -mg13 and -mg14.
+ (md_parse_option): Handle -mg13 and -mg14.
+ (md_show_usage): List -mg13 and -mg14.
+ * doc/c-rl78.texi: Add description of -mg13 and -mg14 options.
+
+2015-03-18 Jon Turney <jon.turney@dronecode.org.uk>
+ Nick Clifton <nickc@redhat.com>
+
+ PR binutils/18087
+ * doc/as.texinfo: Note that when gas compresses debug sections the
+ compression is only performed if it makes the section smaller.
+ * write.c (compress_debug): Do not compress a debug section if
+ doing so would make it larger.
+
+2015-03-17 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
+
+ * config/tc-i386.c (cpu_arch): Add PROCESSOR_ZNVER flags.
+ (i386_align_code): Add PROCESSOR_ZNVER cases.
+ * config/tc-i386.h (processor_type): Add PROCESSOR_ZNVER.
+ * doc/c-i386.texi: Add znver1 and clzero.
+
+2015-03-16 Nick Clifton <nickc@redhat.com>
+
+ * dwarf2dbg.c (out_header): Remove spurious #if 1.
+
+2015-03-13 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg
+ number 31.
+
+2015-03-13 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero.
+
+2015-03-12 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
+ * doc/c-mips.texi: Document i6400 -march option.
+
+2015-03-12 Nick Clifton <nickc@redhat.com>
+
+ PR gas/17444
+ * config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment
+ to arm_apply_sym_value. Update prototype.
+ * config/tc-arm.c (arm_apply_sym_value): Add segment argument.
+ Do not apply the value if the symbol is in a different segment to
+ the current segment.
+
+2015-03-11 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_assemble): Don't abort on 8 byte insn fixups.
+ (md_apply_fix): Report an error on data-only fixups used with insns.
+
+2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/tc-s390.c (md_gather_operands): Check for valid
+ length field operands.
+
+2015-03-10 Michael Perkins <perkinsmg75@yahoo.co.uk>
+
+ * config/tc-arm.c (parse_operands): Fix bug setting writeback
+ values for '^' on OP_REGLSTs.
+ (do_push_pop): Add new writeback constraint.
+
+2015-03-10 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-arm.c (mapping_state): Remove first MAP_DATA emitting code.
+ (mapping_state_2): Emit first MAP_DATA symbol here.
+
+2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-aarch64.c (mapping_state): Set minimum alignment for
+ code sections.
+
+2015-03-10 Nick Clifton <nickc@redhat.com>
+
+ PR gas/17852
+ * config/tc-arm.c (md_begin): Ensure that selected_cpu is
+ initialised when CPU_DEFAULT is defined.
+
+2015-03-05 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-v850.c (md_parse_option): Fix code to set or clear
+ EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the
+ -m8byte-align and -m4byte-align command line options.
+
+2015-03-04 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR gas/17843
+ * config/tc-aarch64.c (process_movw_reloc_info): Allow
+ R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
+ for MOVK.
+
+2015-02-28 Alan Modra <amodra@gmail.com>
+
+ * write.c (SUB_SEGMENT_ALIGN): Don't pad non-code sections at
+ end to their alignment.
+
+2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Generate
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21.
+ (md_apply_fix, aarch64_force_relocation): Handle
+ BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+
+2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Generate
+ BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+ (md_apply_fix, aarch64_force_relocation): Handle
+ BFD_RELOC_AARCH64_TLSGD_ADR_PREL21.
+
+2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Generate
+ BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19.
+ (md_apply_fix, aarch64_force_relocation): Handle
+ BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19.
+
+2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Add ld_literal_type.
+ (reloc_table): Likewise.
+ (parse_address_main): Use ld_literal_type.
+
+2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (reloc_table_entry): Add adr_type.
+ (reloc_table): Likewise.
+ (parse_address_main): Use adr_type.
+
+2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (aarch64_arch_any, aarch64_arch_node): Remove.
+
+2015-02-25 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-avr.c: Add elf32-avr.h include.
+ (struct avr_property_record_link): New structure.
+ (avr_output_property_section_header): New function.
+ (avr_record_size): New function.
+ (avr_output_property_record): New function.
+ (avr_create_property_section): New function.
+ (avr_handle_align): New function.
+ (exclude_section_from_property_tables): New function.
+ (create_record_for_frag): New function.
+ (append_records_for_section): New function.
+ (avr_create_and_fill_property_section): New function.
+ (avr_post_relax_hook): New function.
+ * config/tc-avr.h (md_post_relax_hook): Define.
+ (avr_post_relax_hook): Declare.
+ (HANDLE_ALIGN): Define.
+ (avr_handle_align): Declare.
+ (strut avr_frag_data): New structure.
+ (TC_FRAG_TYPE): Define.
+
+2015-02-25 Matthew Wahab <matthew.wahab@arm.com>
+
+ * doc/c-arm.texi (-mcpu=): Add cortex-a53, cortex-a57 and
+ cortex-a72.
+
2015-02-24 Nick Clifton <nickc@redhat.com>
* config/tc-v850.c (soft_float): New variable.
projects / deliverable / binutils-gdb.git / blobdiff