+2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
+ nosse4.
+ * doc/c-i386.texi: Document sse4a and nosse4a.
+
+2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/c-i386.texi: Remove the old movsx and movzx documentation
+ for AT&T syntax.
+
+2020-02-14 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/25438
+ * config/tc-i386.c (md_assemble): Move movsx/movzx special
+ casing ...
+ (process_suffix): ... here. Consider just the first operand
+ initially.
+ (check_long_reg): Drop opcode 0x63 special case again.
+ * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
+ testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
+ Move ambiguous operand size tests ...
+ * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
+ testsuite/gas/i386/noreg64.s: ... here.
+ * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
+ testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
+ testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
+ testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
+ testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
+ testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
+ testsuite/gas/i386/x86-64-movsxd.d,
+ testsuite/gas/i386/x86-64-movsxd-intel.d,
+ testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
+ Adjust expectations.
+ * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
+ testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
+ testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2020-02-14 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_operands): Also skip segment
+ override prefix emission if it matches an already present one.
+ * testsuite/gas/i386/prefix32.s: Add double segment override
+ cases.
+ * testsuite/gas/i386/prefix32.l: Adjust expectations.
+
+2020-02-14 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_operands): Drop ineffectual segment
+ overrides when optimizing.
+ * testsuite/gas/i386/lea-optimize.d: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2020-02-14 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_operands): Also check insn prefix
+ for ineffectual segment override warning. Don't cover possible
+ VEX/EVEX encoded insns there.
+ * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
+ testsuite/gas/i386/lea.e: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25438
+ * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
+ syntax.
+
+2020-02-13 Fangrui Song <maskray@google.com>
+ H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25551
+ * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
+ BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
+ * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
+ * testsuite/gas/i386/relax-5.d: New file.
+ * testsuite/gas/i386/relax-5.s: Likewise.
+ * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
+ * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
+
+2020-02-13 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
+ "nosse4" entry.
+
+2020-02-12 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (avx512): New (at file scope), moved from
+ (check_VecOperands): ... here.
+ (process_suffix): Add [XYZ]MMword operand size handling.
+ * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
+ * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
+ tests.
+ * testsuite/gas/i386/avx512dq-inval.l,
+ testsuite/gas/i386/noavx512-2.l: Adjust expectations.
+
+2020-02-12 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/24546
+ * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
+ code only.
+ * config/tc-i386-intel.c (i386_intel_operand): Also handle
+ CALL/JMP in O_tbyte_ptr case.
+ * doc/c-i386.texi: Mention far call and full pointer load ISA
+ differences.
+ * testsuite/gas/i386/x86-64-branch-3.s,
+ testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
+ * testsuite/gas/i386/x86-64-branch-3.d,
+ testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
+ * testsuite/gas/i386/x86-64-branch-5.l,
+ testsuite/gas/i386/x86-64-branch-5.s: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2020-02-12 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/25438
+ * config/tc-i386.c (REGISTER_WARNINGS): Delete.
+ (check_byte_reg): Skip only source operand of CRC32. Drop Non-
+ 64-bit-only warning.
+ (check_word_reg): Consistently error on mismatching register
+ size and suffix.
+ * testsuite/gas/i386/general.s: Replace dword GPR with word one
+ for movw. Replace suffix / GPR for orb.
+ * testsuite/gas/i386/inval.s: Add tests for movw with dword and
+ byte GPRs as well as ones for inb/outb with a word accumulator.
+ * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
+ testsuite/gas/i386/inval.l: Adjust expectations.
+
2020-02-12 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (operand_type_register_match): Also fall