+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (vec_imm4): Delete.
+ (VEX_check_operands): Replace Vec_Imm4 check by CpuXOP with five
+ operands one. Clear Imm<N> by different means.
+ (build_modrm_byte): Adjust comment. Remove dead code. Add and
+ adjust assertions.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (output_insn): Adjust recognition of xFENCE
+ insns. Move PadLock special case of prefix emission to 3-byte
+ long base opcode handling.
+ (i386_index_check): Check for CpuPadLock instead of ImmExt.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Handle AND / OR with
+ both operands being the same register.
+ * doc/c-i386.texi: Update -O2 documentation.
+ * testsuite/gas/i386/optimize-2.s,
+ testsuite/gas/i386/x86-64-optimize-3.s: Add cases of AND / OR
+ with both operands being the same register.
+ * testsuite/gas/i386/optimize-2.d,
+ testsuite/gas/i386/x86-64-optimize-3.d: Adjust expectations.
+ * testsuite/gas/i386/optimize-2b.d,
+ testsuite/gas/i386/x86-64-optimize-3b.d: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (commutative): New.
+ (build_vex_prefix): Handle commutative case.
+ (optimize_encoding): Set commutative flag when appropriate.
+ * doc/c-i386.texi: Update -O2 documentation.
+ * testsuite/gas/i386/ilp32/x86-64-sse2avx.d: Re-use parent dir
+ output.
+ * testsuite/gas/i386/x86-64-sse2avx.s: Add tests with high
+ numbered source operands.
+ * testsuite/gas/i386/x86-64-optimize-2.d,
+ testsuite/gas/i386/x86-64-optimize-2b.d,
+ testsuite/gas/i386/x86-64-optimize-3.d,
+ testsuite/gas/i386/x86-64-optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-6.d,
+ testsuite/gas/i386/x86-64-sse2avx.d: Adjust expectations.
+ * testsuite/gas/i386/x86-64-avx-swap-2.d,
+ testsuite/gas/i386/x86-64-avx-swap-2.s: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (is_evex_encoding): Don't check for SAE.
+ (check_VecOperands): Simplify static rounding / SAE checking.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Make j unsigned. Handle
+ vpand{d,q}, vpandn{d,q}, vpor{d,q}, and vpxor{d,q}. Also check/
+ clear broadcast. Eliminate a loop.
+ * doc/c-i386.texi: Update -O1 documentation.
+ * testsuite/gas/i386/optimize-1.s,
+ testsuite/gas/i386/optimize-2.s,
+ testsuite/gas/i386/optimize-3.s,
+ testsuite/gas/i386/optimize-5.s,
+ testsuite/gas/i386/x86-64-optimize-2.s,
+ testsuite/gas/i386/x86-64-optimize-3.s,
+ testsuite/gas/i386/x86-64-optimize-4.s,
+ testsuite/gas/i386/x86-64-optimize-6.s: Add vpand{d,q},
+ vpandn{d,q}, vpor{d,q}, and vpxor{d,q} cases.
+ testsuite/gas/i386/optimize-1.d,
+ testsuite/gas/i386/optimize-1a.d,
+ testsuite/gas/i386/optimize-2.d,
+ testsuite/gas/i386/optimize-3.d,
+ testsuite/gas/i386/optimize-4.d,
+ testsuite/gas/i386/optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-2.d,
+ testsuite/gas/i386/x86-64-optimize-2a.d,
+ testsuite/gas/i386/x86-64-optimize-2b.d,
+ testsuite/gas/i386/x86-64-optimize-3.d,
+ testsuite/gas/i386/x86-64-optimize-4.d,
+ testsuite/gas/i386/x86-64-optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-6.d: Adjust expectations.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx512f_vpclmulqdq.s,
+ testsuite/gas/i386/avx512vl_vpclmulqdq.s,
+ testsuite/gas/i386/vpclmulqdq.s,
+ testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s,
+ testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Add pseudo ops.
+ * testsuite/gas/i386/x86-64-vpclmulqdq.s: Likewise. Don't use
+ high 16 [xy]mm registers.
+ * testsuite/gas/i386/avx512f_vpclmulqdq.d,
+ testsuite/gas/i386/avx512f_vpclmulqdq-intel.d,
+ testsuite/gas/i386/avx512vl_vpclmulqdq.d,
+ testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d,
+ testsuite/gas/i386/vpclmulqdq.d,
+ testsuite/gas/i386/vpclmulqdq-intel.d,
+ testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d,
+ testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d,
+ testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d,
+ testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d,
+ testsuite/gas/i386/x86-64-vpclmulqdq.d,
+ testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Adjust
+ expectations.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (output_disp, output_imm): Use encoding_length.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (encoding_length): New.
+ (output_insn): Use it.
+ * testsuite/gas/i386/oversized16.l,
+ testsuite/gas/i386/oversized16.s,
+ testsuite/gas/i386/oversized64.l,
+ testsuite/gas/i386/oversized64.s: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2019-06-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/24719
+ * testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
+ with invalid vector length.
+ * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+ * testsuite/gas/i386/disassem.d: Updated.
+ * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-27 Barnaby Wilk s<barnaby.wilks@arm.com>
+
+ * config/tc-arm.c (do_smc): Add range check for immediate operand.
+ (do_t_smc): Add range check for immediate operand. Remove
+ obsolete immediate encoding.
+ (md_apply_fix): Fix range check. Remove obsolete immediate encoding.
+ * testsuite/gas/arm/arch6zk.d: Fix test.
+ * testsuite/gas/arm/arch6zk.s: Fix test.
+ * testsuite/gas/arm/smc-bad.d: New test.
+ * testsuite/gas/arm/smc-bad.l: New test.
+ * testsuite/gas/arm/smc-bad.s: New test.
+ * testsuite/gas/arm/thumb32.d: Fix test.
+ * testsuite/gas/arm/thumb32.s: Fix test.
+
+2019-06-27 Jan Beulich <jbeulich@suse.com>
+
+ config/tc-i386.c (md_assemble): Check for protected mode
+ incapable processor before encoding VEX and alike insns.
+ * testsuite/gas/i386/inval-16.s: For 80186 architecture.
+ * testsuite/gas/i386/inval-16.l: Adjust expectations.
+ * testsuite/gas/i386/avx-16bit.d,
+ testsuite/gas/i386/avx-16bit.s,
+ testsuite/gas/i386/avx512f-16bit.d,
+ testsuite/gas/i386/avx512f-16bit.s,
+ testsuite/gas/i386/bmi-16bit.d,
+ testsuite/gas/i386/bmi-16bit.s,
+ testsuite/gas/i386/bmi2-16bit.d,
+ testsuite/gas/i386/bmi2-16bit.s,
+ testsuite/gas/i386/lwp-16bit.d,
+ testsuite/gas/i386/lwp-16bit.s: New
+ testsuite/gas/i386/i386.exp: Run new tests.
+
+2019-06-26 Jim Wilson <jimw@sifive.com>
+
+ * testsuite/gas/xstormy16/allinsn.sh: Change first line to
+ #!/bin/bash and make it executable.
+ * testsuite/gas/xstormy16/gcc.sh: Likewise.
+
+2019-06-26 Lili Cui <lili.cui@intel.com>
+
+ * doc/c-i386.texi: Document x/y/z instruction sufffixes in AT&T
+ syntax and xmmword/ymmword/zmmword/fword/tbyte/oword ptr in
+ Intel syntax.
+
+2019-06-25 Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * config/tc-mips.c (macro) <M_LI>: Re-order MTHC1 with
+ respect to MTC1 and use $0 for either part where possible.
+ * testsuite/gas/mips/li-d.s: Add test cases for non-zero
+ words in double precision constants.
+ * testsuite/gas/mips/li-d.d: Update reference output.
+ * testsuite/gas/mips/micromips@isa-override-1.d: Likewise.
+ * testsuite/gas/mips/mips32r2@isa-override-1.d: Likewise.
+ * testsuite/gas/mips/mips64r2@isa-override-1.d: Likewise.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (acc32, acc64): Delete.
+ (pi): Make first parameter pinter-to-const.
+ (type_names): Remove Acc. Add acc8, acc16, acc32, and acc64.
+ (pt): Use operand_type_equal().
+ (match_template): Replace use of acc32.
+ (process_suffix): Replace use of acc64.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * doc/c-i386.texi: Mark -mavxscalar= and -mvexwig as dangrous to
+ use.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * tc-i386.c (process_suffix): Use is_any_vex_encoding().
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/sse2-16bit.d,
+ testsuite/gas/i386/sse2-16bit.s: New.
+ testsuite/gas/i386/i386.exp: Run new test.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Also handle ANDQ with
+ immediatie fitting in 7 bits.
+ * testsuite/gas/i386/x86-64-optimize-1.s: Add ANDQ cases with
+ 7- and 8-bit immediates.
+ * testsuite/gas/i386/x86-64-optimize-1.d: Adjust expectations.
+
+2019-06-25 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/xmmword.s: Add cvtps2pi and cvttps2pi
+ tests.
+ * testsuite/gas/i386/xmmword.l: Adjust expectations.
+
+2019-06-25 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_handle_align): Add parentheses.
+
+2019-06-25 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.h (ppc_nop_select): Declare.
+ (NOP_OPCODE): Define.
+ * config/tc-ppc.c (ppc_elf_end, ppc_xcoff_end): Zero ppc_cpu.
+ (ppc_nop_encoding_for_rs_align_code): New enum.
+ (ppc_nop_select): New function.
+ (ppc_handle_align): Don't use ppc_cpu here. Get nop type from frag.
+ * testsuite/gas/ppc/groupnop.d,
+ * testsuite/gas/ppc/groupnop.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2019-06-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/24700
+ * testsuite/gas/i386/disassem.s: Add test for vbroadcasti32x8
+ with invalid vector length.
+ * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+ * testsuite/gas/i386/disassem.d: Updated.
+ * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/24691
+ * testsuite/gas/i386/disassem.s: Add test for vshuff32x4 with
+ invalid vector length.
+ * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+ * testsuite/gas/i386/disassem.d: Updated.
+ * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-14 Alan Modra <amodra@gmail.com>
+
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * doc/Makefile.in: Regenerate.
+
+2019-06-12 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/power9.d: Delete ldmx tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2019-06-06 Lili Cui <lili.cui@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .enqcmd.
+ (cpu_noarch): Add noenqcmd.
+ * doc/c-i386.texi: Document noenqcmd.
+
+2019-06-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/24633
+ * testsuite/gas/i386/disassem.s: Add tests for invalid vector
+ lengths for EVEX vextractfXX and vinsertfXX.
+ * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+ * testsuite/gas/i386/disassem.d: Updated.
+ * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/24626
+ * testsuite/gas/i386/disassem.s: Add tests for reserved VEX.vvvv
+ and EVEX.vvvv.
+ * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+ * testsuite/gas/i386/disassem.d: Updated.
+ * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-04 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+ Lili Cui <lili.cui@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .avx512_vp2intersect.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document avx512_vp2intersect.
+ * testsuite/gas/i386/i386.exp: Run vp2intersect tests.
+ * testsuite/gas/i386/vp2intersect-intel.d: New test.
+ * testsuite/gas/i386/vp2intersect.d: Likewise.
+ * testsuite/gas/i386/vp2intersect.s: Likewise.
+ * testsuite/gas/i386/vp2intersect-inval-bcast.l: Likewise.
+ * testsuite/gas/i386/vp2intersect-inval-bcast.s: Likewise.
+ * testsuite/gas/i386/x86-64-vp2intersect-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-vp2intersect.d: Likewise.
+ * testsuite/gas/i386/x86-64-vp2intersect.s: Likewise.
+ * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.l: Likewise.
+ * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s: Likewise.
+
+2019-06-04 Xuepeng Guo <xuepeng.guo@intel.com>
+ Lili Cui <lili.cui@intel.com>
+
+ * doc/c-i386.texi: Document enqcmd.
+ * testsuite/gas/i386/enqcmd-intel.d: New file.
+ * testsuite/gas/i386/enqcmd-inval.l: Likewise.
+ * testsuite/gas/i386/enqcmd-inval.s: Likewise.
+ * testsuite/gas/i386/enqcmd.d: Likewise.
+ * testsuite/gas/i386/enqcmd.s: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd-inval.l: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd-inval.s: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
+ * testsuite/gas/i386/i386.exp: Run enqcmd-intel, enqcmd-inval,
+ enqcmd, x86-64-enqcmd-intel, x86-64-enqcmd-inval,
+ and x86-64-enqcmd.
+
+2019-05-30 Jim Wilson <jimw@sifive.com>
+
+ * config/tc-riscv.c (riscv_ip) <'u'>: Move O_constant check inside if
+ statement. Delete O_symbol and O_constant check after if statement.
+ * testsuite/gas/riscv/auipc-parsing.s: Test lui with missing %hi.
+ * testsuite/gas/riscv/auipc-parsing.l: Update.
+
+2019-05-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/24625
+ * testsuite/gas/i386/inval-avx512f.s: Add tests for AVX512_BF16
+ instructions with invalid broadcast.
+ * testsuite/gas/i386/x86-64-inval-avx512f.s: Likewise.
+ * testsuite/gas/i386/inval-avx512f.l: Updated.
+ * testsuite/gas/i386/x86-64-inval-avx512f.l: Likewise.
+
+2019-05-27 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (is_ppc64_target): New function.
+ (md_show_usage): Split up usage message. Don't show -a64 when
+ unsupported.
+ testsuite/gas/ppc/ppc.exp (supports_ppc64): New.
+ (prefix-reloc): Only run for ppc64.
+
+2019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/tc-aarch64.c (aarch64_elf_copy_symbol_attributes): Define.
+ * config/tc-aarch64.h (aarch64_elf_copy_symbol_attributes): Declare.
+ (OBJ_COPY_SYMBOL_ATTRIBUTES): Define.
+ * testsuite/gas/aarch64/symbol-variant_pcs-3.d: New test.
+ * testsuite/gas/aarch64/symbol-variant_pcs-3.s: New test.
+
+2019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/tc-aarch64.c (s_variant_pcs): New function.
+ * doc/c-aarch64.texi: Document .variant_pcs.
+ * testsuite/gas/aarch64/symbol-variant_pcs-1.d: New test.
+ * testsuite/gas/aarch64/symbol-variant_pcs-1.s: New test.
+ * testsuite/gas/aarch64/symbol-variant_pcs-2.d: New test.
+ * testsuite/gas/aarch64/symbol-variant_pcs-2.s: New test.
+
+2019-05-24 Alan Modra <amodra@gmail.com>
+
+ * po/POTFILES.in: Regenerate.
+
+2019-05-24 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_elf_suffix): Support @pcrel, @got@pcrel,
+ @plt@pcrel, @higher34, @highera34, @highest34, and @highesta34.
+ (fixup_size): Handle new powerxx relocs.
+ (md_assemble): Warn for @pcrel on non-prefix insns.
+ Accept @l, @h and @ha on prefix insns, and infer reloc without
+ any @ suffix. Translate powerxx relocs to suit DQ and DS field
+ instructions. Include operand tests as well as opcode test to
+ translate BFD_RELOC_HI16_S to BFD_RELOC_PPC_16DX_HA.
+ (ppc_fix_adjustable): Return false for pcrel GOT and PLT relocs.
+ (md_apply_fix): Handle new powerxx relocs.
+ * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Accept
+ BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34,
+ BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34,
+ BFD_RELOC_PPC64_D34, and BFD_RELOC_PPC64_D28.
+ * testsuite/gas/ppc/prefix-reloc.d,
+ * testsuite/gas/ppc/prefix-reloc.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2019-05-24 Peter Bergner <bergner@linux.ibm.com>
+ Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_insert_operand): Only sign extend fields that
+ are 32-bits or smaller.
+ * messages.c (as_internal_value_out_of_range): Do not truncate
+ variables and use BFD_VMA_FMT to print them.
+ * testsuite/gas/ppc/prefix-pcrel.s,
+ * testsuite/gas/ppc/prefix-pcrel.d: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2019-05-24 Peter Bergner <bergner@linux.ibm.com>
+ Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_setup_opcodes): Handle prefix_opcodes.
+ (struct insn_label_list): New.
+ (insn_labels, free_insn_labels): New variables.
+ (ppc_record_label, ppc_clear_labels, ppc_start_line_hook): New funcs.
+ (ppc_frob_label, ppc_new_dot_label): Move functions earlier in file
+ and call ppc_record_label.
+ (md_assemble): Handle 64-bit prefix instructions. Align labels
+ that are on the same line as a prefix instruction.
+ * config/tc-ppc.h (tc_frob_label, ppc_frob_label): Move to
+ later in the file.
+ (md_start_line_hook): Define.
+ (ppc_start_line_hook): Declare.
+ * testsuite/gas/ppc/prefix-align.d,
+ * testsuite/gas/ppc/prefix-align.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run new test.
+
+2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * configure.ac: Handle bpf-*-* targets.
+ * configure.tgt (generic_target): Likewise.
+ * configure: Regenerate.
+ * Makefile.am (TARGET_CPU_CFILES): Add tc-bpf.c.
+ (TARGET_CPU_HFILES): Add tc-bpf.h.
+ * Makefile.in: Regenerated.
+ * config/tc-bpf.c: New file.
+ * config/tc-bpf.h: Likewise.
+ * doc/Makefile.am (CPU_DOCS): Add c-bpf.texi.
+ * doc/Makefile.in: Regenerated.
+ * doc/all.texi: set BPF.
+ * doc/as.texi: Add eBPF contents.
+ * doc/c-bpf.texi: New file.
+ * testsuite/gas/bpf/alu.d: New file.
+ * testsuite/gas/bpf/mem-be.d: Likewise.
+ * testsuite/gas/bpf/mem.s: Likewise.
+ * testsuite/gas/bpf/mem.d: Likewise.
+ * testsuite/gas/bpf/lddw-be.d: Likewise.
+ * testsuite/gas/bpf/lddw.s: Likewise.
+ * testsuite/gas/bpf/lddw.d: Likewise.
+ * testsuite/gas/bpf/jump-be.d: Likewise.
+ * testsuite/gas/bpf/jump.s: Likewise.
+ * testsuite/gas/bpf/jump.d: Likewise.
+ * testsuite/gas/bpf/exit-be.d: Likewise.
+ * testsuite/gas/bpf/exit.s: Likewise.
+ * testsuite/gas/bpf/exit.d: Likewise.
+ * testsuite/gas/bpf/call-be.d: Likewise.
+ * testsuite/gas/bpf/call.s: Likewise.
+ * testsuite/gas/bpf/call.d: Likewise.
+ * testsuite/gas/bpf/bpf.exp: Likewise.
+ * testsuite/gas/bpf/atomic-be.d: Likewise.
+ * testsuite/gas/bpf/atomic.s: Likewise.
+ * testsuite/gas/bpf/atomic.d: Likewise.
+ * testsuite/gas/bpf/alu-be.d: Likewise.
+ * testsuite/gas/bpf/alu32-be.d: Likewise.
+ * testsuite/gas/bpf/alu32.s: Likewise.
+ * testsuite/gas/bpf/alu32.d: Likewise.
+ * testsuite/gas/bpf/alu.s: Likewise.
+ * testsuite/gas/all/gas.exp: Introduce a nop_type for eBPF.
+ * testsuite/gas/all/org-1.s: Support nop_type 6.
+ * testsuite/gas/all/org-1.l: Updated to reflect changes in
+ org-1.s.
+
+2019-05-22 John Darrington <john@darrington.wattle.id.au>
+
+ * config/tc-s12z.c (s12z_strtol): New function. (md_show_usage): Update.
+ (md_parse_option): new case OPTION_DOLLAR_HEX. (s12z_init_after_args):
+ (<global>): Use s12z_strtol instead of strtol.
+ * doc/c-s12z.texi (S12Z Options): Document new option -mdollar-hex.
+ * testsuite/gas/s12z/dollar-hex.d: New file.
+ * testsuite/gas/s12z/dollar-hex.s: New file.
+ * testsuite/gas/s12z/s12z.exp: Add them.
+
+2019-05-21 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-arm.c (parse_operands): Update case OP_RVC to
+ parse p0 and P0.
+ (do_vmrs): Add checks for valid operands with respect to
+ cpu and fpu options.
+ (do_vmsr): Likewise.
+ (reg_names): New reg_names for FPSCR_nzcvqc, VPR, FPCXT_NS
+ and FPCXT_S.
+ * testsuite/gas/arm/armv8_1-m-spec-reg.d: New.
+ * testsuite/gas/arm/armv8_1-m-spec-reg.s: New.
+ * testsuite/gas/arm/armv8_1-m-spec-reg-bad1.d: New.
+ * testsuite/gas/arm/armv8_1-m-spec-reg-bad2.d: New.
+ * testsuite/gas/arm/armv8_1-m-spec-reg-bad3.d: New.
+ * testsuite/gas/arm/armv8_1-m-spec-reg-bad1.l: New.
+ * testsuite/gas/arm/armv8_1-m-spec-reg-bad2.l: New.
+ * testsuite/gas/arm/armv8_1-m-spec-reg-bad3.l: New.
+ * testsuite/gas/arm/vfp1xD.d: Updated to allow new valid values.
+ * testsuite/gas/arm/vfp1xD_t2.d: Likewise.
+
+2019-05-21 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-arm.c (TOGGLE_BIT): New.
+ (T16_32_TAB): New entries for cinc, cinv, cneg, csinc,
+ csinv, csneg, cset, csetm and csel.
+ (operand_parse_code): New OP_RR_ZR.
+ (parse_operand): Handle case for OP_RR_ZR.
+ (do_t_cond): New.
+ (insns): New instructions for cinc, cinv, cneg, csinc,
+ csinv, csneg, cset, csetm, csel.
+ * testsuite/gas/arm/armv8_1-m-cond-bad.d: New test.
+ * testsuite/gas/arm/armv8_1-m-cond-bad.l: New test.
+ * testsuite/gas/arm/armv8_1-m-cond-bad.s: New test.
+ * testsuite/gas/arm/armv8_1-m-cond.d: New test.
+ * testsuite/gas/arm/armv8_1-m-cond.s: New test.
+
+2019-05-21 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-arm.c (operand_parse_code): New entries for
+ OP_RRnpcsp_I32 (register or integer operands).
+ (do_mve_scalar_shift): New.
+ (insns): New instructions for asrl, lsll, lsrl, sqrshrl, sqrshr, sqshl
+ sqshll, srshr, srshrl, uqrshll, uqrshl, uqshll, uqshl, urshrl and urshr.
+ * testsuite/gas/arm/mve-shift.d: New.
+ * testsuite/gas/arm/mve-shift.s: New.
+ * testsuite/gas/arm/mve-shift-bad.d: New.
+ * testsuite/gas/arm/mve-shift-bad.s: New.
+ * testsuite/gas/arm/mve-shift-bad.l: New.
+
2019-05-21 Faraz Shahbazker <fshahbazker@wavecomp.com>
* testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
projects / deliverable / binutils-gdb.git / blobdiff