+2018-09-13 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (parse_insn): Extend comment ahead of pseudo-
+ suffix handling.
+
+2018-09-13 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/x86-64-mpx.s: And BNDMK case with RIP-
+ relative memory operand.
+ * testsuite/gas/i386/x86-64-mpx.d: Adjust expectations.
+
+2018-09-13 Nick Clifton <nickc@redhat.com>
+
+ * dwarf2dbg.c (generic_dwarf2_emit_offset): Use memset to
+ initialise expression structure.
+ (set_or_check_view): Likewise.
+ (out_set_addr): Likewise.
+ (emit_fixed_inc_line_addr): Likewise.
+ (relax_inc_line_addr): Likewise.
+ (out_debug_line): Likewise.
+ (out_debug_ranges): Likewise.
+ (out_debug_aranges): Likewise.
+ (out_debug_info): Likewise.
+
+2018-09-06 Alan Modra <amodra@gmail.com>
+
+ PR 23570
+ * config/tc-avr.c: Revert 2018-09-03 change.
+
+2018-09-04 Daniel Cederman <cederman@gaisler.com>
+
+ * config/tc-sparc.c (md_assemble): Allow non-fpop2 instructions
+ before floating point branches for Sparc V8 and earlier.
+ * testsuite/gas/sparc/sparc.exp: Execute the new test.
+ * testsuite/gas/sparc/v8branch.d: New test.
+ * testsuite/gas/sparc/v8branch.s: New test.
+
+2018-09-03 Nick Clifton <nickc@redhat.com>
+
+ PR gas/23570
+ * config/tc-avr.c (md_pseudo_table): Add entry for "secction".
+ (avr_set_section): New function. Ensures that the .noinit section
+ gets the NOBITS ELF section type.
+
+2018-08-31 Kito Cheng <kito@andestech.com>
+
+ * testsuite/gas/riscv/c-fld-fsd-fail.d: New.
+ * testsuite/gas/riscv/c-fld-fsd-fail.l: Likewise.
+ * testsuite/gas/riscv/c-fld-fsd-fail.s: Likewise.
+
+2018-08-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/elf/section14.d: Change skip to xfail.
+ * testsuite/lib/gas-defs.exp (run_dump_test): Add xfail support.
+
+2018-08-31 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Allow ADDR16
+ HIGH, HIGHA, HIGHER, HIGHERA, HIGHEST, and HIGHESTA relocs.
+ Group 16-bit relocs.
+ * config/tc-ppc.c (md_apply_fix): Translate those ADDR16 relocs
+ to REL16 when pcrel. Sort relocs.
+
+2018-08-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/elf/elf.exp: Pass -mx86-used-note=no to
+ assembler for section2 test on ELF/x86 targets.
+
+2018-08-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/cfi/cfi-label.d: Pass -mx86-used-note=no to
+ assembler.
+
+2018-08-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/bss.d: Pass -mx86-used-note=no to assembler.
+ * testsuite/gas/i386/ilp32/quad.d: Likewise.
+ * testsuite/gas/i386/ilp32/reloc64.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-size-1.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-size-3.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-size-5.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-unwind.d: Likewise.
+ * testsuite/gas/i386/property-1.d: Likewise.
+ * testsuite/gas/i386/relax.d: Likewise.
+ * testsuite/gas/i386/reloc64.d: Likewise.
+ * testsuite/gas/i386/size-1.d: Likewise.
+ * testsuite/gas/i386/size-3.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-size-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-size-3.d: Likewise.
+ * testsuite/gas/i386/x86-64-size-5.d: Likewise.
+ * testsuite/gas/i386/x86-64-unwind.d: Likewise.
+ * testsuite/gas/i386/divide.d: Append "#pass".
+
+2018-08-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention -mx86-used-note=[no|yes].
+ * configure.ac: Add --enable-x86-used-note. Define
+ DEFAULT_X86_USED_NOTE.
+ * config.in: Regenerated.
+ * configure: Likewise.
+ * config/tc-i386.c (x86_isa_1_used): New.
+ (x86_feature_2_used): Likewise.
+ (x86_used_note): Likewise.
+ (_i386_insn): Add has_regmmx, has_regxmm, has_regymm and
+ has_regzmm.
+ (build_modrm_byte): Set i.has_regmmx, i.has_regzmm.
+ i.has_regymm and i.has_regxmm.
+ (x86_cleanup): New function.
+ (output_insn): Update x86_isa_1_used and x86_feature_2_used.
+ (OPTION_X86_USED_NOTE): New.
+ (md_longopts): Add -mx86-used-note=.
+ (md_parse_option): Handle OPTION_X86_USED_NOTE.
+ (md_show_usage): Display -mx86-used-note=.
+ * config/tc-i386.h (x86_cleanup): New prototype.
+ (md_cleanup): New.
+ * doc/c-i386.texi: Document -mx86-used-note=.
+
+2018-08-30 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/sparc/leon.d: Disassemble v8 code also in sparc64
+ targets.
+
+2018-08-30 Kito Cheng <kito@andestech.com>
+
+ * config/tc-riscv.c (riscv_subset_supports): New argument:
+ xlen_required.
+ (riscv_multi_subset_supports): New function, able to check more
+ than one extension.
+ (riscv_ip): Use riscv_multi_subset_supports instead of
+ riscv_subset_supports.
+ (riscv_set_arch): Update call-site for riscv_subset_supports.
+ (riscv_after_parse_args): Likewise.
+
+2018-08-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/elf/section14.d: Skip h8300 targets.
+
+2018-08-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/elf/elf.exp: Run section14.
+ * testsuite/gas/elf/section14.d: New file.
+ * testsuite/gas/elf/section14.s: Likewise.
+
+2018-08-29 Daniel Cederman <cederman@gaisler.com>
+
+ * testsuite/gas/sparc/leon.d: New test.
+ * testsuite/gas/sparc/leon.s: New test.
+ * testsuite/gas/sparc/sparc.exp: Execute the pwrpsr test.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS264E.
+ (mips_cpu_info_table): Add gs264e descriptors.
+ * doc/as.texi (march table): Add gs264e.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E.
+ (mips_cpu_info_table): Add gs464e descriptors.
+ * doc/as.texi (march table): Add gs464e.
+
2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Rename
projects / deliverable / binutils-gdb.git / blobdiff