+2014-11-25 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (search_trampolines): Move post-loop
+ condition check outside the search loop.
+
+2014-11-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2014-11-21 Terry Guo <terry.guo@arm.com>
+
+ * config/tc-arm.c (md_assemble): Do not consider relaxation.
+ (md_convert_frag): Test and set target arch attribute accordingly.
+ (aeabi_set_attribute_string): Turn it into a global function.
+ * config/tc-arm.h (md_post_relax_hook): Enable it for ARM target.
+ (aeabi_set_public_attributes): Declare it.
+
+2014-11-21 Terry Guo <terry.guo@arm.com>
+
+ * config/tc-arm.c (fpu_vfp_ext_armv8xd): New.
+ (arm_cpus): Support cortex-m7.
+ (arm_fpus): Support fpv5-sp-d16 and fpv5-d16.
+ (do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S
+ register only target like FPv5-SP-D16.
+ (do_neon_cvttb_1): Likewise.
+ (do_vfp_nsyn_fpv8): Likewise.
+ (do_vrint_1): Likewise.
+ (aeabi_set_public_attributes): Set proper FP arch for FPv5.
+ * doc/c-arm.texi: Document new cpu and fpu names for cortex-m7.
+
+2014-11-20 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/tc-arm.c (rotate_left): Avoid undefined behaviour when
+ N = 0.
+
+2014-11-20 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/tc-aarch64.c (warn_unpredictable_ldst): Check that transfer
+ registers are in the GP register set. Adjust warnings. Use correct
+ field member for address register.
+ * testsuite/gas/aarch64/diagnostic.l: Update.
+
+2014-11-19 Ryan Mansfield <rmansfield@qnx.com>
+
+ * config/tc-aarch64.c (md_assemble): Call warn_unpredictable_ldst.
+ (warn_unpredictable_ldst): New.
+
+2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
+
+ * config/tc-i386-intel.c (i386_operator): Remove last argument
+ from lex_got call.
+ * config/tc-i386.c (reloc): Remove bnd_prefix from parameters'
+ list. Return always BFD_RELOC_32_PCREL.
+ * (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND.
+ * (output_jump): Update call to reloc accordingly.
+ * (output_interseg_jump): Likewise.
+ * (output_disp): Likewise.
+ * (output_imm): Likewise.
+ * (x86_cons_fix_new): Likewise.
+ * (lex_got): Remove bnd_prefix from parameters' list in macro and
+ declarations. Don't use BFD_RELOC_X86_64_PLT32_BND.
+ * (x86_cons): Update call to lex_got accordingly.
+ * (i386_immediate): Likewise.
+ * (i386_displacement): Likewise.
+ * (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor
+ BFD_RELOC_X86_64_PC32_BND.
+ * (tc_gen_reloc): Likewise.
+
+2014-11-18 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-aarch64.c (s_aarch64_arch_extension): New.
+ (md_pseudo_table): Add arch_extension.
+ (aarch64_parse_features): New parameter "ext_only". Handle it.
+ (aarch64_parse_cpu, aarch64_parse_arch, s_aarch64_cpu,
+ s_aarch64_arch): Pass FALSE as new third argument of
+ aarch64_parse_features().
+
+2014-11-17 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add "xgene2".
+ * doc/c-aarch64.texi: Document it.
+
+2014-11-17 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add "xgene1".
+ * doc/c-aarch64.texi: Rename xgene-1 to xgene1.
+
+2014-11-17 Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .avx512vbmi.
+ * doc/c-i386.texi: Document it.
+
+2014-11-17 Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .avx512ifma.
+ * doc/c-i386.texi: Document it.
+
+2014-11-17 Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .pcommit.
+ * doc/c-i386.texi: Document it.
+
+2014-11-17 Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .clwb.
+ * doc/c-i386.texi: Document it.
+
+2014-11-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Re-arrange avx512* and xsave*
+ items.
+
+ * doc/c-i386.texi: Re-arrange avx512* and xsave*. Add
+ clflushopt and se1. Remove duplicated entries.
+
+2014-11-13 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add CRC feature for
+ cortex-A53 and cortex-A57.
+
+2014-11-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/17598
+ * config/tc-i386.c (reloc): Support BFD_RELOC_X86_64_GOTPLT64.
+
+2014-11-13 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/17512
+ * config/obj-coff.c (coff_obj_symbol_new_hook): Set the is_sym
+ field.
+
+2014-11-13 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Remove example-1 and example-2.
+
+2014-11-12 Alan Modra <amodra@gmail.com>
+
+ * config/tc-z80.c (parse_exp_not_indexed, parse_exp): Warning fixes.
+
+2014-11-12 Alan Modra <amodra@gmail.com>
+
+ PR ld/17482
+ * config/tc-i386.c (output_insn): Don't test x86_elf_abi when
+ not ELF.
+
+2014-11-11 Nick Clifton <nickc@redhat.com>
+
+ * po/uk.po: Updated Ukranian translation.
+
2014-11-07 H.J. Lu <hongjiu.lu@intel.com>
PR ld/17482
projects / deliverable / binutils-gdb.git / blobdiff