x86/Intel: extend MOVDIRI testing

[deliverable/binutils-gdb.git] / gas / ChangeLog

diff --git a/gas/ChangeLog b/gas/ChangeLog
index b3affbbaa170fd73c5cb1d8823b244a5998f25f5..b7d305f60c5b1aaf049d12f0cf73e155938f6e09 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,68 @@
+2019-12-04  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/movdir.s: Add Intel syntax case with
+       operand size specifier.
+       * testsuite/gas/i386/x86-64-movdir.s: Add Intel syntax cases
+       with operand size specifier and wit 32-bit operands.
+       * testsuite/gas/i386/movdir-intel.d,
+       testsuite/gas/i386/movdir.d,
+       testsuite/gas/i386/x86-64-movdir-intel.d,
+       testsuite/gas/i386/x86-64-movdir.d: Adjust expectations.
+
+2019-12-04  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): Arrange for insns with a
+       single non-GPR register operand to not have its suffix guessed
+       from GPR operands. Extend DefaultSize handling to cover PUSH/POP
+       of segment registers.
+       * testsuite/gas/i386/general.s: Add PUSH/POP sreg to .code16gcc
+       set of insns.
+       * testsuite/gas/i386/general.l: Adjust expectations.
+
+2019-12-04  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): Exclude SYSRET alongside
+       FLDENV et al.
+       * testsuite/gas/i386/general.s: Expand .code16gcc set of insns.
+       * testsuite/gas/i386/general.l: Adjust expectations.
+
+2019-11-22  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * as.c (flag_dwarf_cie_version): Change initial value to -1, and
+       update comment.
+       * config/tc-riscv.c (riscv_after_parse_args): Set
+       flag_dwarf_cie_version if it has not already been set.
+       * dwarf2dbg.c (dwarf2_init): Initialise flag_dwarf_cie_version if
+       needed.
+       * testsuite/gas/riscv/default-cie-version.d: New file.
+       * testsuite/gas/riscv/default-cie-version.s: New file.
+
+2019-11-22  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * dw2gencfi.c (output_cie): Error on return column overflow.
+       * testsuite/gas/riscv/cie-rtn-col-1.d: New file.
+       * testsuite/gas/riscv/cie-rtn-col-3.d: New file.
+       * testsuite/gas/riscv/cie-rtn-col.s: New file.
+
+2019-11-22  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * config/tc-riscv.c (tc_riscv_regname_to_dw2regnum): Lookup CSR
+       names too.
+       * testsuite/gas/riscv/csr-dw-regnums.d: New file.
+       * testsuite/gas/riscv/csr-dw-regnums.s: New file.
+
+2019-11-22  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * config/tc-riscv.c (struct regname): Delete.
+       (hash_reg_names): Handle value as 'void *'.
+
+2019-11-25  Andrew Pinski  <apinski@marvell.com>
+
+       * config/tc-aarch64.c (md_begin): Use correct
+       hash table for uppercase version of hint.
+       * testsuite/gas/aarch64/system-2.s: Extend psb case to uppercase.
+       * testsuite/gas/aarch64/system-2.d: Update.
+
 2019-11-25  Christian Eggers  <ceggers@gmx.de>
 
        * as.h: Define SEC_OCTETS as SEC_ELF_OCTETS if OBJ_ELF.