+2020-05-27 Stephen Casner <casner@acm.org>
+
+ PR gas/26001
+ * config/tc-pdp11.c (parse_reg): Distinguish register names from
+ symbols that begin with a register name.
+ * testsuite/gas/pdp11/pdp11.exp: Add test of such symbols.
+ * testsuite/gas/pdp11/pr26001.s: Likewise.
+ * testsuite/gas/pdp11/pr26001.d: Likewise.
+
+2020-05-27 Simon Cook <simon.cook@embecosm.com>
+
+ * config/tc-riscv.c (riscv_init_csr_hash): NULL initilize next
+ pointer when creating struct riscv_csr_extra.
+
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/align-branch-9.d: Updated for PECOFF.
+ * testsuite/gas/i386/inval-avx512f.s: Add .p2align for PECOFF.
+ * testsuite/gas/i386/inval-avx512f.l: Updated.
+
+2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * testsuite/gas/s390/zarch-z13.d: Add regexp checks for vector
+ load/store instruction variants with alignment hints.
+ * testsuite/gas/s390/zarch-z13.s: Emit new vector load/store
+ instruction variants with alignment hints.
+
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26044
+ * config/tc-xgate.c (md_apply_fix): Check BFD_RELOC_XGATE_PCREL_X
+ instead of R_XGATE_PCREL_X.
+ (xgate_parse_operand): Replace R_XGATE_PCREL_X with
+ BFD_RELOC_XGATE_PCREL_X.
+
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26044
+ * config/tc-visium.c (md_convert_frag): Replace fragP->fr_literal
+ with &fragP->fr_literal[0].
+
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26044
+ * config/tc-vax.c (md_estimate_size_before_relax): Replace
+ fragP->fr_literal with &fragP->fr_literal[0].
+ (md_convert_frag): Likewise.
+
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26044
+ * config/tc-v850.c (md_convert_frag): Replace fragP->fr_literal
+ with &fragP->fr_literal[0].
+
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26044
+ * config/tc-crx.c (getreg_image): Change argument type to int.
+ (md_convert_frag): Replace fragP->fr_literal with
+ &fragP->fr_literal[0].
+
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26044
+ * onfig/tc-score.c (s3_do_macro_bcmp): Replace overlapping
+ sprintf with memmove.
+
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-mcore.c (md_convert_frag): Replace fragP->fr_literal
+ with &fragP->fr_literal[0].
+
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26041
+ * config/tc-cr16.c (md_assemble): Use memmove to concatenate
+ 2 overlapping strings.
+
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-cr16.c (md_convert_frag): Replace fragP->fr_literal
+ with &fragP->fr_literal[0].
+
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-csky.c (md_convert_frag): Replace fragp->fr_literal
+ with &fragp->fr_literal[0].
+ * config/tc-microblaze.c (md_apply_fix): Likewise.
+ * config/tc-sh.c (md_convert_frag): Likewise.
+
+2020-05-24 Jim Wilson <jimw@sifive.com>
+
+ PR 26025
+ * config/tc-riscv.c (riscv_pre_output_hook): Change s type from const
+ asection to segT. New locals seg and subseg. Call subseg_set before
+ fix_new_exp. Call subseg_set after loop to restore original values.
+
+2020-05-21 Alan Modra <amodra@gmail.com>
+
+ * atof-generic.c: Replace "if (x) free (x)" with "free (x)"
+ throughout.
+ * config/obj-elf.c: Likewise.
+ * config/tc-aarch64.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-m68k.c: Likewise.
+ * config/tc-nios2.c: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * ecoff.c: Likewise.
+ * read.c: Likewise.
+ * stabs.c: Likewise.
+ * symbols.c: Likewise.
+ * testsuite/gas/all/test-gen.c: Likewise.
+
+2020-05-20 Nelson Chu <nelson.chu@sifive.com>
+
+ * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated.
+ * config/tc-riscv.c (default_arch_with_ext, default_isa_spec):
+ Static variables which are used to set the ISA extensions. You can
+ use -march (or ELF build attributes) and -misa-spec to set them,
+ respectively.
+ (ext_version_hash): The hash table used to handle the extensions
+ with versions.
+ (init_ext_version_hash): Initialize the ext_version_hash according
+ to riscv_ext_version_table.
+ (riscv_get_default_ext_version): The callback function of
+ riscv_parse_subset_t. According to the choosed ISA spec,
+ get the default version for the specific extension.
+ (riscv_set_arch): Set the callback function.
+ (enum options, struct option md_longopts): Add new option -misa-spec.
+ (md_parse_option): Do not call riscv_set_arch for -march. We will
+ call it later in riscv_after_parse_args. Call riscv_get_isa_spec_class
+ to set default_isa_spec class.
+ (riscv_after_parse_args): Call init_ext_version_hash to initialize the
+ ext_version_hash, and then call riscv_set_arch to set the architecture
+ with versions according to default_arch_with_ext.
+ * testsuite/gas/riscv/attribute-02.d: Set 0p0 as default version for
+ x extensions.
+ * testsuite/gas/riscv/attribute-03.d: Likewise.
+ * testsuite/gas/riscv/attribute-09.d: New testcase. For i-ext, we
+ already set it's version to 2p1 by march, so no need to use the default
+ 2p2 version. For m-ext, we do not set the version by -march and ELF arch
+ attribute, so set the default 2p0 to it. For zicsr, it is not defined in
+ ISA spec 2p2, so set 0p0 to it.
+ * testsuite/gas/riscv/attribute-10.d: New testcase. The version of
+ zicsr is 2p0 according to ISA spec 20191213.
+ * config/tc-riscv.c (DEFAULT_RISCV_ARCH_WITH_EXT)
+ (DEFAULT_RISCV_ISA_SPEC): Default configure option settings.
+ You can set them by configure options --with-arch and
+ --with-isa-spec, respectively.
+ (riscv_set_default_isa_spec): New function used to set the
+ default ISA spec.
+ (md_parse_option): Call riscv_set_default_isa_spec rather than
+ call riscv_get_isa_spec_class directly.
+ (riscv_after_parse_args): If the -isa-spec is not set, then we
+ set the default ISA spec according to DEFAULT_RISCV_ISA_SPEC by
+ calling riscv_set_default_isa_spec.
+ * testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2.2, since
+ the --with-isa-spec may be set to different ISA spec.
+ * testsuite/gas/riscv/attribute-02.d: Likewise.
+ * testsuite/gas/riscv/attribute-03.d: Likewise.
+ * testsuite/gas/riscv/attribute-04.d: Likewise.
+ * testsuite/gas/riscv/attribute-05.d: Likewise.
+ * testsuite/gas/riscv/attribute-06.d: Likewise.
+ * testsuite/gas/riscv/attribute-07.d: Likewise.
+ * configure.ac: Add configure options, --with-arch and
+ --with-isa-spec.
+ * configure: Regenerated.
+ * config.in: Regenerated.
+ * config/tc-riscv.c (default_priv_spec): Static variable which is
+ used to check if the CSR is valid for the chosen privilege spec. You
+ can use -mpriv-spec to set it.
+ (enum reg_class): We now get the CSR address from csr_extra_hash rather
+ than reg_names_hash. Therefore, move RCLASS_CSR behind RCLASS_MAX.
+ (riscv_init_csr_hashes): Only need to initialize one hash table
+ csr_extra_hash.
+ (riscv_csr_class_check): Change the return type to void. Don't check
+ the ISA dependency if -mcsr-check isn't set.
+ (riscv_csr_version_check): New function. Check and find the CSR address
+ from csr_extra_hash, according to default_priv_spec. Report warning
+ for the invalid CSR if -mcsr-check is set.
+ (reg_csr_lookup_internal): Updated.
+ (reg_lookup_internal): Likewise.
+ (md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed.
+ (enum options, struct option md_longopts): Add new GAS option -mpriv-spec.
+ (md_parse_option): Call riscv_set_default_priv_version to set
+ default_priv_spec.
+ (riscv_after_parse_args): If -mpriv-spec isn't set, then set the default
+ privilege spec to the newest one.
+ (enum riscv_csr_class, struct riscv_csr_extra): Move them to
+ include/opcode/riscv.h.
+ * testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want
+ to check the ISA dependency for CSR, so fix the spec version by adding
+ -mpriv-spec=1.11.
+ * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. There are some
+ version warnings for the test case.
+ * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
+ Check whether the CSR is valid when privilege version 1.9 is choosed.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
+ Check whether the CSR is valid when privilege version 1.9.1 is choosed.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
+ Check whether the CSR is valid when privilege version 1.10 is choosed.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
+ Check whether the CSR is valid when privilege version 1.11 is choosed.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
+ * config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option
+ setting. You can set it by configure option --with-priv-spec.
+ (riscv_set_default_priv_spec): New function used to set the default
+ privilege spec.
+ (md_parse_option): Call riscv_set_default_priv_spec rather than
+ call riscv_get_priv_spec_class directly.
+ (riscv_after_parse_args): If -mpriv-spec isn't set, then we set the
+ default privilege spec according to DEFAULT_RISCV_PRIV_SPEC by
+ calling riscv_set_default_priv_spec.
+ * testsuite/gas/riscv/csr-dw-regnums.d: Add -mpriv-spec=1.11, since
+ the --with-priv-spec may be set to different privilege spec.
+ * testsuite/gas/riscv/priv-reg.d: Likewise.
+ * configure.ac: Add configure option --with-priv-spec.
+ * configure: Regenerated.
+ * config.in: Regenerated.
+ * config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to
+ explicit_attr. Set it to TRUE if any ELF attribute is found.
+ (riscv_set_default_priv_spec): Try to set the default_priv_spec if
+ the priv attributes are set.
+ (md_assemble): Set the default_priv_spec according to the priv
+ attributes when we start to assemble instruction.
+ (riscv_write_out_attrs): Rename riscv_write_out_arch_attr to
+ riscv_write_out_attrs. Update the arch and priv attributes. If we
+ don't set the corresponding ELF attributes, then try to output the
+ default ones.
+ (riscv_set_public_attributes): If any ELF attribute or -march-attr
+ options is set (explicit_attr is TRUE), then call riscv_write_out_attrs
+ to update the arch and priv attributes.
+ (s_riscv_attribute): Make sure all arch and priv attributes are set
+ before any instruction.
+ * testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any
+ ELF attribute or -march-attr is set. If the priv attributes are not
+ set, then try to update them by the default setting (-mpriv-spec or
+ --with-priv-spec).
+ * testsuite/gas/riscv/attribute-02.d: Likewise.
+ * testsuite/gas/riscv/attribute-03.d: Likewise.
+ * testsuite/gas/riscv/attribute-04.d: Likewise.
+ * testsuite/gas/riscv/attribute-06.d: Likewise.
+ * testsuite/gas/riscv/attribute-07.d: Likewise.
+ * testsuite/gas/riscv/attribute-08.d: Likewise.
+ * testsuite/gas/riscv/attribute-09.d: Likewise.
+ * testsuite/gas/riscv/attribute-10.d: Likewise.
+ * testsuite/gas/riscv/attribute-unknown.d: Likewise.
+ * testsuite/gas/riscv/attribute-05.d: Likewise. Also, the priv spec
+ set by priv attributes must be supported.
+ * testsuite/gas/riscv/attribute-05.s: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise. Updated
+ priv attributes according to the -mpriv-spec option.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
+ * testsuite/gas/riscv/priv-reg.d: Removed.
+ * testsuite/gas/riscv/priv-reg-version-1p9.d: New test case. Dump the
+ CSR according to the priv spec 1.9.
+ * testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case. Dump the
+ CSR according to the priv spec 1.9.1.
+ * testsuite/gas/riscv/priv-reg-version-1p10.d: New test case. Dump the
+ CSR according to the priv spec 1.10.
+ * testsuite/gas/riscv/priv-reg-version-1p11.d: New test case. Dump the
+ CSR according to the priv spec 1.11.
+ * config/tc-riscv.c (md_show_usage): Add descriptions about
+ the new GAS options.
+ * doc/c-riscv.texi: Likewise.
+
+2020-05-19 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/power9.s <dcbf, dcbfl, dcbflp>: Add tests.
+ * testsuite/gas/ppc/power9.d: Likewise.
+ * testsuite/gas/ppc/power10.s <dcbf, dcbfps, dcbstps, hwsync, lwsync,
+ pause_short, phwsync, plwsync, ptesync, stcisync, stncisync, stsync,
+ sync, wait, waitrsv>: Add tests.
+ * testsuite/gas/ppc/power10.d: Likewise.
+
+2020-05-19 Alexander Fedotov <alfedotov@gmail.com>
+
+ PR 25992
+ * config/tc-arm.c : Add arm_ext_v8r feature.
+ (it_fsm_post_encode): Check arm_ext_v8r feature.
+ (get_aeabi_cpu_arch_from_fset): Check arm_ext_v8r feature.
+
+2020-05-19 Alan Modra <amodra@gmail.com>
+
+ * write.c (write_contents): Use bfd_get_filename rather than
+ accessing bfd->filename directly. Use bfd_section_name rather
+ than accessing section->name directly.
+
+2020-05-19 Alan Modra <amodra@gmail.com>
+
+ * symbols.c (local_symbol_make): Init all of lsy_flags.
+
+2020-05-18 Alan Modra <amodra@gmail.com>
+
+ * symbols.c (resolve_symbol_value): Invoke LOCAL_SYMBOL_CHECK
+ before looking at add_symbol->sy_flags.
+
+2020-05-18 Hongtao Liu <hongtao.liu@intel.com>
+
+ * config/tc-i386.c: Not handle lret/iret.
+ * testsuite/gas/i386/lfence-ret-a.d: Adjust testcase.
+ * testsuite/gas/i386/lfence-ret-b.d: Ditto.
+ * testsuite/gas/i386/lfence-ret-c.d: Ditto.
+ * testsuite/gas/i386/lfence-ret-d.d: Ditto.
+ * testsuite/gas/i386/lfence-ret.s: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-a.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-b.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-c.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-d.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-e.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret.s: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret.e: Deleted.
+
+2020-05-15 Alan Modra <amodra@gmail.com>
+ Alex Coplan <alex.coplan@arm.com>
+
+ * symbols.c (struct local_symbol): Update comment.
+ (resolve_symbol_value): For resolved symbols equated to other
+ symbols, verify that the referenced symbol is not a local_symbol
+ before accessing sy_value. Don't leave symbol loops during
+ finalize_syms resolution.
+ * testsuite/gas/all/assign-bad-recursive.d: New test.
+ * testsuite/gas/all/assign-bad-recursive.l: Error output for test.
+ * testsuite/gas/all/assign-bad-recursive.s: Assembly for test.
+ * testsuite/gas/all/gas.exp: Run it.
+
+2020-05-14 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/scalarquad.d,
+ * testsuite/gas/ppc/scalarquad.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/rightmost.d,
+ * testsuite/gas/ppc/rightmost.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/xvtlsbb.d,
+ * testsuite/gas/ppc/xvtlsbb.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/stringop.d,
+ * testsuite/gas/ppc/stringop.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/set_bool.d,
+ * testsuite/gas/ppc/set_bool.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/bitmanip.d,
+ * testsuite/gas/ppc/bitmanip.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/genpcv.d,
+ * testsuite/gas/ppc/genpcv.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/maskmanip.d,
+ * testsuite/gas/ppc/maskmanip.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+ Peter Bergner <bergner@linux.ibm.com>
+
+ * config/tc-ppc.c (pre_defined_registers): Add accumulators.
+ (md_assemble): Check acc specified in correct operand.
+ * testsuite/gas/ppc/outerprod.d,
+ * testsuite/gas/ppc/outerprod.s,
+ * testsuite/gas/ppc/vsx4.d,
+ * testsuite/gas/ppc/vsx4.s: New tests.
+ * testsuite/gas/ppc/ppc.exp: Run them.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/simd_perm.d,
+ * testsuite/gas/ppc/simd_perm.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/int128.d,
+ * testsuite/gas/ppc/int128.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/vsx_32byte.d,
+ * testsuite/gas/ppc/vsx_32byte.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/vec_mul.s,
+ * testsuite/gas/ppc/vec_mul.d: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/byte_rev.d,
+ * testsuite/gas/ppc/byte_rev.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/power10.d: Add paste. tests.
+ * testsuite/gas/ppc/power10.s: Likewise.
+
+2020-05-11 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/power10.s: New test.
+ * testsuite/gas/ppc/power10.d: Likewise.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
+ renaming.
+ * testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
+ place of -mfuture/-Mfuture.
+ * testsuite/gas/ppc/prefix-pcrel.d: Likewise.
+ * testsuite/gas/ppc/prefix-reloc.d: Likewise.
+
+2020-05-06 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2020-05-06 Nick Clifton <nickc@redhat.com>
+
+ PR 25927
+ * doc/as.texi (Preprocessing): Replace cross reference to not
+ existant document with a URL to the equivalent page in the GCC
+ manual.
+
+2020-05-05 Nick Clifton <nickc@redhat.com>
+
+ * dwarf2dbg.c (out_dir_and_file_list): Add comments describing the
+ construction of a DWARF-5 directory name table.
+ * testsuite/gas/elf/pr25917.d: Update expected output.
+
+2020-05-05 Gunther Nikl <gnikl@justmail.de>
+
+ * config/tc-rx.c (elf_flags): Initialize for non-linux targets.
+ (md_parse_option): Remove initialization of elf_flags.
+
+2020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR gas/25863
+ * config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
+ * testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
+ * testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
+
+2020-05-04 Nick Clifton <nickc@redhat.com>
+
+ PR 25917
+ * dwarf2dbg.c (out_dir_and_file_list): Check for the directory
+ table's existence before looking at its entries.
+ Also do not emit a default directory entry if there are no
+ directories in use.
+
+ * testsuite/gas/elf/pr25917.s: New test source file.
+ * testsuite/gas/elf/pr25917.d: New test driver.
+ * testsuite/gas/elf/elf.exp (run_elf_list_test): Run the new test.
+
+2020-04-30 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-aarch64.c (fix_insn): Implement for
+ AARCH64_OPND_UNDEFINED.
+ (parse_operands): Implement for AARCH64_OPND_UNDEFINED.
+ * testsuite/gas/aarch64/udf.s: New.
+ * testsuite/gas/aarch64/udf.d: New.
+ * testsuite/gas/aarch64/udf-invalid.s: New.
+ * testsuite/gas/aarch64/udf-invalid.l: New.
+ * testsuite/gas/aarch64/udf-invalid.d: New.
+
+2020-04-30 Yoshinori Sato <ysato@users.sourceforge.jp>
+
+ * config/tc-rx.c (elf_flags): Reset default value.
+ (md_parse_option): For rx-elf Initialize elf_flags with RX_ABI.
+
+2020-04-29 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0
+ if it's not defined.
+ (microarch_earliest): New static variable.
+ (xg_translate_idioms): Translate "simcall" to "simcall 0" when
+ simcall opcode has mandatory parameter.
+ (xg_init_global_config): Initialize microarch_earliest.
+
+2020-04-29 Nick Clifton <nickc@redhat.com>
+
+ PR 22699
+ * config/tc-sh.c (build_Mytes): Change operand type IMM0_8 to
+ IMM0_8S and add support for IMM0_8U.
+ * testsuite/gas/sh/sh4a.s: Add test of a logical insn using an
+ unsigned 8-bit immediate.
+ * testsuite/gas/sh/sh4a.d: Extended expected disassembly.
+ * testsuite/gas/sh/sh4al-dsp.d: Update expected disassembly.
+
+2020-04-27 Tamar Christina <tamar.christina@arm.com>
+
+ * NEWS: Add news entry for big-obj.
+ * config/tc-i386.c (i386_target_format): Support new format.
+ * doc/c-i386.texi: Add i386 support.
+ * testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific.
+ * testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well.
+
+2020-04-27 Nick Clifton <nickc@redhat.com>
+
+ PR 25878
+ * dwarf2dbg.c (struct file_entry): Add auto_assigned field.
+ (assign_file_to_slot): New function. Fills in an entry in the
+ files table.
+ (allocate_filenum): Use new function.
+ (allocate_filename_to_slot): Use new function. If the specified
+ slot entry is already in use, but was chosen automatically then
+ reassign the automatic entry.
+
+2020-04-26 Hongtao Liu <hongtao.liu@intel.com
+
+ * config/tc-i386.c (lfence_before_ret_shl): New member.
+ (load_insn_p): implict load for POP/POPA/POPF/XLATB, no load
+ for Anysize insns.
+ (insert_after_load): Issue warning for REP CMPS/SCAS.
+ (insert_before_before): Handle iret, Handle
+ -mlfence-before-ret=shl, Adjust operand size of or/not/shl to ret's,
+ (md_parse_option): Change -mlfence-before-ret=[none|not|or] to
+ -mlfence-before-ret=[none/not/or/shl/yes].
+ Enable -mlfence-before-ret=shl when
+ -mlfence-beofre-indirect-branch=all and no explict -mlfence-before-ret option.
+ (md_show_usage): Ditto.
+ * doc/c-i386.texi: Ditto.
+ * testsuite/gas/i386/i386.exp: Add new testcases.
+ * testsuite/gas/i386/lfence-load-b.d: New.
+ * testsuite/gas/i386/lfence-load-b.e: New.
+ * testsuite/gas/i386/lfence-load.d: Modified.
+ * testsuite/gas/i386/lfence-load.e: New.
+ * testsuite/gas/i386/lfence-load.s: Modified.
+ * testsuite/gas/i386/lfence-ret-a.d: Modified.
+ * testsuite/gas/i386/lfence-ret-b.d: Modified.
+ * testsuite/gas/i386/lfence-ret-c.d: New.
+ * testsuite/gas/i386/lfence-ret-d.d: New.
+ * testsuite/gas/i386/lfence-ret.s: Modified.
+ * testsuite/gas/i386/x86-64-lfence-load-b.d: New.
+ * testsuite/gas/i386/x86-64-lfence-load.d: Modified.
+ * testsuite/gas/i386/x86-64-lfence-load.s: Modified.
+ * testsuite/gas/i386/x86-64-lfence-ret-a.d: Modified.
+ * testsuite/gas/i386/x86-64-lfence-ret-b.d: Modified.
+ * testsuite/gas/i386/x86-64-lfence-ret-c.d: New.
+ * testsuite/gas/i386/x86-64-lfence-ret-d.d: New
+ * testsuite/gas/i386/x86-64-lfence-ret-e.d: New.
+ * testsuite/gas/i386/x86-64-lfence-ret.e: New.
+ * testsuite/gas/i386/x86-64-lfence-ret.s: New.
+
+2020-04-22 Max Filippov <jcmvbkbc@gmail.com>
+
+ PR ld/25861
+ * config/tc-xtensa.c (md_apply_fix): Replace
+ BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
+ BFD_RELOC_XTENSA_PDIFF{8,16,32} and
+ BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
+ * testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
+ with BFD_RELOC_XTENSA_PDIFF16 in the expected output.
+
+2020-04-22 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (elf_frob_symbol): Unconditionally remove
+ symbol for ".symver .. remove".
+ * doc/as.texi (.symver): Update.
+ * testsuite/gas/symver/symver11.s: Make foo weak.
+ * testsuite/gas/symver/symver11.d: Expect an error.
+ * testsuite/gas/symver/symver7.d: Allow other random symbols.
+
+2020-04-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/symver/symver11.s: Add ".balign 8".
+
+2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
+
+ PR 25848
+ * testsuite/gas/m68k/operands.s: Add tests for cmpi.
+ * testsuite/gas/m68k/operands.d: Update.
+ * testsuite/gas/m68k/op68000.d: Update for new error messages.
+
+2020-04-21 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/24753
+ * testsuite/gas/arm/pr24753.d: New test.
+ * testsuite/gas/arm/pr24753.s: New test.
+
+2020-04-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/23840
+ PR gas/25295
+ * NEWS: Mention .symver extension.
+ * config/obj-elf.c (obj_elf_find_and_add_versioned_name): New
+ function.
+ (obj_elf_symver): Call obj_elf_find_and_add_versioned_name to
+ add a version name. Add local, hidden and remove visibility
+ support.
+ (elf_frob_symbol): Handle the list of version names. Update the
+ original symbol to local, hidden or remove it from the symbol
+ table.
+ (elf_frob_file_before_adjust): Handle the list of version names.
+ * config/obj-elf.h (elf_visibility): New.
+ (elf_versioned_name_list): Likewise.
+ (elf_obj_sy): Change local to bitfield. Add rename, bad_version
+ and visibility. Change versioned_name pointer to struct
+ elf_versioned_name_list.
+ * doc/as.texi: Update .symver directive.
+ * testsuite/gas/symver/symver.exp: Run all *.d tests. Add more
+ error checking tests.
+ * testsuite/gas/symver/symver6.d: New file.
+ * testsuite/gas/symver/symver7.d: Likewise.
+ * testsuite/gas/symver/symver7.s: Likewise.
+ * testsuite/gas/symver/symver8.d: Likewise.
+ * testsuite/gas/symver/symver8.s: Likewise.
+ * testsuite/gas/symver/symver9.s: Likewise.
+ * testsuite/gas/symver/symver9a.d: Likewise.
+ * testsuite/gas/symver/symver9b.d: Likewise.
+ * testsuite/gas/symver/symver10.s: Likewise.
+ * testsuite/gas/symver/symver10a.d: Likewise.
+ * testsuite/gas/symver/symver10b.d: Likewise.
+ * testsuite/gas/symver/symver11.d: Likewise.
+ * testsuite/gas/symver/symver11.s: Likewise.
+ * testsuite/gas/symver/symver12.d: Likewise.
+ * testsuite/gas/symver/symver12.s: Likewise.
+ * testsuite/gas/symver/symver13.d: Likewise.
+ * testsuite/gas/symver/symver13.s: Likewise.
+ * testsuite/gas/symver/symver14.d: Likewise.
+ * testsuite/gas/symver/symver14.l: Likewise.
+ * testsuite/gas/symver/symver15.d: Likewise.
+ * testsuite/gas/symver/symver15.l: Likewise.
+ * testsuite/gas/symver/symver6.l: Removed.
+ * testsuite/gas/symver/symver6.s: Updated.
+
+2020-04-20 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (parse_barrier_psb): Update error messages
+ to include TSB.
+ * testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
+ * testsuite/gas/aarch64/system-2.s: Add new tsb tests.
+ * testsuite/gas/aarch64/system.d: Update.
+
+2020-04-20 Sudakshina Das <sudi.das@arm.com>
+
+ * testsuite/gas/aarch64/bti.d: Update -march option.
+ * testsuite/gas/aarch64/illegal-bti.d: Remove.
+ * testsuite/gas/aarch64/illegal-bti.l: Remove.
+ * testsuite/gas/aarch64/illegal-ras-1.l: Remove esb.
+ * testsuite/gas/aarch64/illegal-ras-1.s: Remove esb.
+
+2020-04-17 Alan Modra <amodra@gmail.com>
+
+ * config/tc-bfin.h (TC_EQUAL_IN_INSN): Allow assignment to dot.
+
+2020-04-16 Gagan Singh Sidhu <broly@mac.com>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 25803
+ * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
+ targets.
+ * testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
+ for the type-2 test.
+ * testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
+ targets running this test.
+
+2020-02-16 David Faust <david.faust@oracle.com>
+
+ * testsuite/gas/bpf/bpf.exp: Run jump32 tests.
+ * testsuite/gas/bpf/jump32.s: New file.
+ * testsuite/gas/bpf/jump32.d: Likewise.
+
+2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
+ documentation.
+
+2020-04-08 Gunther Nikl <gnikl@justmail.de>
+
+ * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
+ (md_pcrel_from): Remove prototytpe.
+ * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
+ define.
+ (md_pcrel_from_section): Remove duplicate prototype.
+ * tc.h (md_pcrel_from_section): Add prototype.
+ * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
+ * config/tc-arc.h (md_pcrel_from_section): Likewise.
+ * config/tc-arm.h (md_pcrel_from_section): Likewise.
+ * config/tc-avr.h (md_pcrel_from_section): Likewise.
+ * config/tc-bfin.h (md_pcrel_from_section): Likewise.
+ * config/tc-bpf.h (md_pcrel_from_section): Likewise.
+ * config/tc-csky.h (md_pcrel_from_section): Likewise.
+ * config/tc-d10v.h (md_pcrel_from_section): Likewise.
+ * config/tc-d30v.h (md_pcrel_from_section): Likewise.
+ * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
+ * config/tc-fr30.h (md_pcrel_from_section): Likewise.
+ * config/tc-frv.h (md_pcrel_from_section): Likewise.
+ * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
+ * config/tc-lm32.h (md_pcrel_from_section): Likewise.
+ * config/tc-m32c.h (md_pcrel_from_section): Likewise.
+ * config/tc-m32r.h (md_pcrel_from_section): Likewise.
+ * config/tc-mcore.h (md_pcrel_from_section): Likewise.
+ * config/tc-mep.h (md_pcrel_from_section): Likewise.
+ * config/tc-metag.h (md_pcrel_from_section): Likewise.
+ * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
+ * config/tc-mmix.h (md_pcrel_from_section): Likewise.
+ * config/tc-moxie.h (md_pcrel_from_section): Likewise.
+ * config/tc-msp430.h (md_pcrel_from_section): Likewise.
+ * config/tc-mt.h (md_pcrel_from_section): Likewise.
+ * config/tc-or1k.h (md_pcrel_from_section): Likewise.
+ * config/tc-ppc.h (md_pcrel_from_section): Likewise.
+ * config/tc-rl78.h (md_pcrel_from_section): Likewise.
+ * config/tc-rx.h (md_pcrel_from_section): Likewise.
+ * config/tc-s390.h (md_pcrel_from_section): Likewise.
+ * config/tc-sh.h (md_pcrel_from_section): Likewise.
+ * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
+ * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
+ * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
+ md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
+ md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
+ md_apply_fix3): Delete prototypes.
+
+2020-04-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
+ instructions.
+
+2020-04-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/c-z80.texi: Fix @xref warnings.
+
+2020-04-07 Lili Cui <lili.cui@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document TSXLDTRK.
+ * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
+ * testsuite/gas/i386/tsxldtrk.d: Likewise.
+ * testsuite/gas/i386/tsxldtrk.s: Likewise.
+ * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
+
+2020-04-02 Lili Cui <lili.cui@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .serialize.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document serialize.
+ * testsuite/gas/i386/i386.exp: Run serialize tests
+ * testsuite/gas/i386/serialize.d: Likewise.
+ * testsuite/gas/i386/x86-64-serialize.d: Likewise.
+ * testsuite/gas/i386/serialize.s: Likewise.
+
+2020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
+ * testsuite/gas/elf/section12b.d: Likewise.
+ * testsuite/gas/elf/section16a.d: Likewise.
+ * testsuite/gas/elf/section16b.d: Likewise.
+
+2020-04-02 Gunther Nikl <gnikl@justmail.de>
+
+ * config/tc-m68k.c (m68k_ip): Fix range check for index register
+ with a suppressed address register.
+
+2020-04-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25756
+ * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
+ * testsuite/gas/i386/localpic.s: Add a test for relocation
+ against local absolute symbol.
+ * testsuite/gas/i386/x86-64-localpic.s: Likewise.
+ * testsuite/gas/i386/localpic.d: Updated.
+ * testsuite/gas/i386/x86-64-localpic.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
+
+2020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ PR gas/25732
+ * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
+ * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
+ * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
+ testsuite/gas/i386/x86-64-jump.d.
+ * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
+ Incorporate changes to
+ gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
+ * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
+ changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
+ * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
+ * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
+
+2020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
+
+ PR 25611
+ PR 25614
+ * dwarf2dbg.c: Do not include "bignum.h".
+
+2020-03-30 Nelson Chu <nelson.chu@sifive.com>
+
+ * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
+ * testsuite/gas/riscv/alias-csr.s: Likewise.
+ * testsuite/gas/riscv/no-aliases-csr.d: Move this
+ to priv-reg-pseudo-noalias.
+ * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
+ * testsuite/gas/riscv/bad-csr.l: Likewise.
+ * testsuite/gas/riscv/bad-csr.s: Likewise.
+ * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
+ * testsuite/gas/riscv/satp.s: Likewise.
+ * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
+ csr instruction, including alias-csr testcase.
+ * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
+ * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
+ pseudo instruction with objdump -Mno-aliases.
+ * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
+ * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
+ * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
+ * testsuite/gas/riscv/priv-reg.s: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
+ * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
+ * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
+
+2020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
+
+ * config/obj-coff.c (obj_coff_section): Set the bss flag on
+ sections with the "b" attribute.
+
+2020-03-22 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/s12z/truncated.d: Update expected output.
+
+2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25690
+ * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
+ * doc/c-z80.texi: Update documentation.
+
+2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25641
+ PR 25668
+ PR 25633
+ Fix disassembling ED+A4/AC/B4/BC opcodes.
+ Fix assembling lines containing colonless label and instruction
+ with first operand inside parentheses.
+ Fix registration of unsupported by target CPU registers.
+ * config/tc-z80.c: See above.
+ * config/tc-z80.h: See above.
+ * testsuite/gas/z80/colonless.d: Update test.
+ * testsuite/gas/z80/colonless.s: Likewise.
+ * testsuite/gas/z80/ez80_adl_all.d: Likewise.
+ * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/ez80_z80_all.d: Likewise.
+ * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/unsup_regs.s: Likewise.
+ * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/z80.exp: Likewise.
+ * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
+
+2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR 25660
+ * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
+ (parse_operands): Handle new operand codes.
+ (do_neon_dyadic_long): Make shape check accept the scalar variants.
+ (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
+ * testsuite/gas/arm/mve-vaddsub-it.s: New test.
+ * testsuite/gas/arm/mve-vaddsub-it.d: New test.
+ * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
+ * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
+ * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
+ * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
+
+2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention x86 assembler options for CVE-2020-0551.
+
+2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/i386.exp: Run new tests.
+ * testsuite/gas/i386/lfence-byte.d: New file.
+ * testsuite/gas/i386/lfence-byte.e: Likewise.
+ * testsuite/gas/i386/lfence-byte.s: Likewise.
+ * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
+ * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
+ * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
+ * testsuite/gas/i386/lfence-indbr.e: Likewise.
+ * testsuite/gas/i386/lfence-indbr.s: Likewise.
+ * testsuite/gas/i386/lfence-load.d: Likewise.
+ * testsuite/gas/i386/lfence-load.s: Likewise.
+ * testsuite/gas/i386/lfence-ret-a.d: Likewise.
+ * testsuite/gas/i386/lfence-ret-b.d: Likewise.
+ * testsuite/gas/i386/lfence-ret.s: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
+
+2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (lfence_after_load): New.
+ (lfence_before_indirect_branch_kind): New.
+ (lfence_before_indirect_branch): New.
+ (lfence_before_ret_kind): New.
+ (lfence_before_ret): New.
+ (last_insn): New.
+ (load_insn_p): New.
+ (insert_lfence_after): New.
+ (insert_lfence_before): New.
+ (md_assemble): Call insert_lfence_before and insert_lfence_after.
+ Set last_insn.
+ (OPTION_MLFENCE_AFTER_LOAD): New.
+ (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
+ (OPTION_MLFENCE_BEFORE_RET): New.
+ (md_longopts): Add -mlfence-after-load=,
+ -mlfence-before-indirect-branch= and -mlfence-before-ret=.
+ (md_parse_option): Handle -mlfence-after-load=,
+ -mlfence-before-indirect-branch= and -mlfence-before-ret=.
+ (md_show_usage): Display -mlfence-after-load=,
+ -mlfence-before-indirect-branch= and -mlfence-before-ret=.
+ (i386_cons_align): New.
+ * config/tc-i386.h (i386_cons_align): New.
+ (md_cons_align): New.
+ * doc/c-i386.texi: Document -mlfence-after-load=,
+ -mlfence-before-indirect-branch= and -mlfence-before-ret=.
+
+2020-03-11 Nick Clifton <nickc@redhat.com>
+
+ PR 25611
+ PR 25614
+ * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
+ (DWARF2_FILE_SIZE_NAME): Default to -1.
+ (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
+ whichever is higher.
+ (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
+ (NUM_MD5_BYTES): Define.
+ (struct file entry): Add md5 field.
+ (get_filenum): Delete and replace with...
+ (get_basename): New function.
+ (get_directory_table_entry): New function.
+ (allocate_filenum): New function.
+ (allocate_filename_to_slot): New function.
+ (dwarf2_where): Use new functions.
+ (dwarf2_directive_filename): Add support for extended .file
+ pseudo-op.
+ (dwarf2_directive_loc): Allow the use of file number zero with
+ DWARF 5 or higher.
+ (out_file_list): Rename to...
+ (out_dir_and_file_list): Add DWARF 5 support.
+ (out_debug_line): Emit extra values into the section header for
+ DWARF 5.
+ (out_debug_str): Allow for file 0 to be used with DWARF 5.
+ * doc/as.texi (.file): Update the description of this pseudo-op.
+ * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
+ * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
+ * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
+ * NEWS: Mention the new feature.
+
+2020-03-10 Alan Modra <amodra@gmail.com>
+
+ * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
+ to avoid signed overflow.
+ * config/tc-mcore.c (md_assemble): Likewise.
+ * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
+ * config/tc-nds32.c (SET_ADDEND): Likewise.
+ * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
+ * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
+ testsuite/gas/i386/avx-intel.d: Adjust expectations.
+
+2020-03-07 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
+ first column.
+
2020-03-06 Nick Clifton <nickc@redhat.com>
PR 25614
projects / deliverable / binutils-gdb.git / blobdiff