+Tue Dec 2 17:05:13 1997 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-v850.c: Brought up to date with the branch.
+
+Mon Dec 1 20:24:18 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * config/tc-sh.c (SWITCH_TABLE_CONS): Handle (fix)->fx_size == 1.
+ (SWITCH_TABLE): Handle BFD_RELOC_8.
+ (md_apply_fix): #ifndef BFD_ASSEMBLER code: Handle fixP->fx_size == 1.
+ (coff_reloc_map): Add BFD_RELOC_8_PCREL entry.
+ (sh_coff_reloc_mangle): SWITCH_TABLE case: Handle BFD_RELOC_8.
+
+Sat Nov 22 16:19:22 1997 Richard Henderson <rth@cygnus.com>
+
+ * tc-alpha.c (range_signed_16, range_signed_32): Work around an
+ apparent bug in gcc's long long support crossing from x86.
+
+Sat Nov 22 14:26:09 1997 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-arm.c: Brought up to date with latest changes on arm
+ branch.
+
+Sat Nov 22 15:50:09 1997 Klaus Kaempf <kkaempf@progis.de>
+
+ * config-gas.com: Get version info from configure.in.
+
+ * makefile.vms: include depend.obj in OBJS.
+
+ * config/tc-alpha.c (s_alpha_section): Remove ".lcomm" handling.
+
+ * config/tc-alpha.c (alpha_basereg_clobbered): Remove variable and
+ all corresponding code.
+
+Thu Nov 20 15:06:08 1997 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/tc-arm.h (TARGET_FORMAT for generic a.out targets): Allow
+ run-time endian selection.
+
+start-sanitize-sh4
+Wed Nov 19 17:44:42 1997 Richard Henderson <rth@cygnus.com>
+
+ * tc-sh.c (parse_reg): Properly quote for fv4.
+
+end-sanitize-sh4
+Wed Nov 19 23:46:18 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * symbols.c (resolve_symbol_value): Add missing breaks in case on
+ symbol value operator.
+
+start-sanitize-vr5400
+Wed Nov 19 02:24:07 1997 Ken Raeburn <raeburn@cygnus.com>
+
+ * config/tc-mips.c (gpr_interlocks, cop_interlocks): VR5400 has
+ these.
+
+end-sanitize-vr5400
+Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * config/tc-d10v.c (parallel_ok, find_opcode):
+ Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
+
+Sun Nov 16 10:05:07 1997 Fred Fish <fnf@cygnus.com>
+
+ * config/obj-coff.c (fixup_segment): Cast second arg of
+ md_apply_fix3 call to type "valueT *".
+
+Thu Nov 13 13:53:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure.in (emulations): Make FreeBSD an aout / i386bsd
+ variant.
+ * configure: Re-generate.
+
+Thu Nov 13 11:07:14 1997 Gavin Koch <gavin@cygnus.com>
+
+ * config/tc-mips.c (macro_build): Use the membership field
+ for INSN_MACRO's.
+ (mips_ip): Same.
+
+Thu Nov 13 02:04:55 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * config/tc-d10v.c (find_opcode): For OPCODE_FAKE, add check for
+ first argument if it's supposed to be a register.
+
+start-sanitize-tx49
+Wed Nov 12 10:06:27 1997 Gavin Koch <gavin@cygnus.com>
+
+ * config/tc-mips.c (mips_4900): Added.
+ (hilo_interlocks): Added mips_4900.
+ (md_begin): Set default for mips_4900.
+ (macro_build,mips_ip): Test for INSN_4900 if mips_4900.
+ (md_longopts): Add "m4900" and "no-m4900".
+ (md_parse_option): Handle above options.
+
+end-sanitize-tx49
+Tue Nov 11 19:25:05 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * app.c (do_scrub_chars): If d10v, re-insert a space before
+ a '#' when in state 10.
+
+Tue Nov 11 13:33:15 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-h8300.c: Include "subsegs.h".
+ (tc_reloc_mangle): Handle references to symbols which are not
+ being output, so that references to `.' work.
+
+Mon Nov 10 13:43:33 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-m68k.c (m68k_ip): Call add_fix when needed for '_'
+ case.
+
+ * macro.c (sub_actual): If we don't find a parameter for an &,
+ just substitute &.
+
+Fri Nov 7 21:29:32 1997 Ken Raeburn <raeburn@cygnus.com>
+start-sanitize-vr5400
+
+ * config/tc-mips.c (mips_ip): Added cases for "e", "%", and "P"
+ operand types.
+ (hilo_interlocks): VR5400 has interlocks.
+ (md_begin): Expect mips64vr5400, not mips64r5400.
+end-sanitize-vr5400
+
+ * config/tc-mips.c (mips_ip): In default case, call as_bad
+ instead of fprintf, to get "assembler messages:" message output
+ before instead of after.
+
+Fri Nov 7 10:36:22 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * frags.h: Handle multiple inclusion.
+
+Wed Nov 5 10:51:49 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ Based on a patch from Ian.Dall@dsto.defence.gov.au.
+ * as.h (struct frag, frag support): Moved from here.
+ * frags.h: To here.
+ (struct frag, member tc_frag_data): New member if TC_FRAG_TYPE
+ is defined.
+ (struct frag, member fr_cgen): Renamed from fr_targ.cgen.
+ * cgen.c (cgen_asm_finish_insn): Update.
+ * config/tc-m32r.c (md_estimate_size_before_relax): Update.
+ * config/tc-m32r.h (TC_FRAG_INIT): Renamed from md_init_frag.
+ (md_convert_frag): Ditto.
+ * config/tc-ns32k.h (TC_FRAG_TYPE): Define.
+ (frag_opcode_frag,frag_opcode_offset,frag_bsr): Update.
+ (TC_FRAG_INIT): Update.
+
+Tue Nov 4 16:35:57 1997 Ian Dall <Ian.Dall@dsto.defence.gov.au>
+
+ * write.c (print_fixup): Use TC_FIX_DATA_PRINT (if defined) to
+ print out MD fields of fix.
+ * frags.c (frag_var, frag_variant): Use TC_FRAG_INIT macro (if
+ defined) to initialize MD fields in frag.
+ * as.h (struct frag, ns32k support): Rename ns32k to fr_ns32k.
+ Delete pcrel_adjust. Add fr_opcode_fragP, fr_opcode_offset.
+ * config/tc-ns32k.h: Add comments. Remove obsolete
+ BFD_FAST_SECTION_FILL definition, change prototypes for
+ fix_new_ns32k and fix_new_ns32k_exp to add new arguments
+ opcode_frag and opcode_offset and remove pcrel_adjust.
+ (TC_FIX_TYPE): add opcode_fragP and opcode_offset fields.
+ (TC_FIX_DATA_PRINT): new macro to print out TC_FIX_TYPE.
+ (TC_FRAG_INIT): new macro to initialize machine dependent field in
+ frags.
+ (frag_opcode_frag, frag_opcode_offset, frag_bsr): macros to access
+ MD fields in frag structure.
+ (fix_im_disp, fix_bit_fixP, fix_opcode_frag, fix_opcode_offset,
+ fix_bsr): macros to access MD fields in fix structure.
+ * config/tc-ns32k.c: Avoid overlength lines. Align comments. Don't
+ use struct opcode_location as these fields are now in the frag
+ structure.
+ (convert_iif): Call frag_more as it is needed instead
+ of trying to allocate for the whole insn. Avoid call of frag_more
+ with negative argument.
+ (md_pcrel_adjust, md_fix_pcrel_adjust, md_apply_fix,
+ md_estimate_size_before_relax, md_pcrel_from,
+ tc_aout_fix_to_chars): use accessor macros to get md fields in fix
+ and frag structures.
+ (fix_new_ns32k, fix_new_ns32k_exp): add new arguments opcode_frag and
+ opcode_offset and remove pcrel_adjust.
+ (convert_iif, cons_fix_new_ns32k): call fix_new_ns32k,
+ fix_new_ns32k_exp with changed arguments.
+
+Mon Nov 3 13:30:17 1997 Gavin Koch <gavin@cygnus.com>
+
+ * tc-mips.c (md_begin): Reorganize setting of default values so
+ that mips_cpu depends on TARGET_CPU, and mips_opts.isa depends on
+ mips_cpu.
+ (md_parse_option): Remove all code that sets defaults; md_begin
+ handles all of this now.
+
+Sun Nov 2 14:46:09 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.am (STAGESTUFF): Change bin_PROGRAMS to
+ noinst_PROGRAMS.
+ (bootstrap, bootstrap2, bootstrap3): Likewise.
+ * Makefile.in: Rebuild.
+
+ * config/tc-ppc.c (ppc_fix_adjustable): Don't adjust relocs in the
+ TOC section to be against the csect.
+
+Fri Oct 31 18:19:55 1997 Ken Raeburn <raeburn@cygnus.com>
+
+start-sanitize-vr5400
+ * config/tc-mips.c (mips_5400): New variable.
+ (md_begin, md_parse_option): Handle 5400 options/names.
+ (macro_build, mips_ip): Check for 5400-specific instructions.
+ (md_longopts, OPTION_M5400, OPTION_NO_M5400): More command-line
+ support for 5400.
+
+end-sanitize-vr5400
+ * config/tc-mips.c (validate_mips_insn): New function, checks
+ match versus mask bits, and also verifies that all bits to be
+ output are actually specified somewhere.
+ (md_begin): Call it for 32-bit instructions, instead of doing
+ match/mask check here. In case of failure, print a message, but
+ check the rest of the opcode table before exiting.
+
Thu Oct 30 13:46:20 1997 Nick Clifton <nickc@cygnus.com>
* config/tc-arm.c (md_apply_fix3): Fix thumb ADR pseudo op. Patch
projects / deliverable / binutils-gdb.git / blobdiff