+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/tc-arm.c (do_neon_abs_neg): Make it accept MVE variant.
+ (insns): Change vabs and vneg entries to accept MVE variants.
+ * testsuite/gas/arm/mve-vabsneg-bad-1.d: New test.
+ * testsuite/gas/arm/mve-vabsneg-bad-1.l: New test.
+ * testsuite/gas/arm/mve-vabsneg-bad-1.s: New test.
+ * testsuite/gas/arm/mve-vabsneg-bad-2.d: New test.
+ * testsuite/gas/arm/mve-vabsneg-bad-2.l: New test.
+ * testsuite/gas/arm/mve-vabsneg-bad-2.s: New test.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/tc-arm.c (enum it_instruction_type): Rename to...
+ (enum pred_instruction_type): ... this. Include VPT types.
+ (it_insn_type): Rename to ...
+ (pred_insn_type): .. this.
+ (arm_it): Change comment.
+ (enum arm_reg_type): Add new value.
+ (reg_expected_msgs): New entry.
+ (asm_opcode): Add mayBeVecPred member.
+ (BAD_SYNTAX, BAD_NOT_VPT, BAD_OUT_VPT, BAD_VPT_COND, MVE_NOT_IT,
+ MVE_NOT_VPT, MVE_BAD_PC, MVE_BAD_SP): New diagnostic MACROS.
+ (arm_vcond_hsh): New table for vector condition codes.
+ (now_it): Rename to ...
+ (now_pred): ... this.
+ (now_it_compatible): Rename to ...
+ (now_pred_compatible): ... this.
+ (in_it_block): Rename to ...
+ (in_pred_block): ... this.
+ (handle_it_state): Rename to ...
+ (handle_pred_state): ... this. And change it to accept VPT blocks.
+ (set_it_insn_type): Rename to ...
+ (set_pred_insn_type): ... this.
+ (set_it_insn_type_nonvoid): Rename to ...
+ (set_pred_insn_type_nonvoid): ... this.
+ (set_it_insn_type_last): Rename to ...
+ (set_pred_insn_type_last): ... this.
+ (record_feature_use): Moved.
+ (mark_feature_used): Likewise.
+ (parse_typed_reg_or_scalar): Add new case for REG_TYPE_MQ.
+ (emit_insn): Use renamed functions and variables.
+ (enum operand_parse_code): Add new operands.
+ (parse_operands): Handle new operands.
+ (do_scalar_fp16_v82_encode): Change predication detection.
+ (do_it): Use renamed functions and variables.
+ (do_t_add_sub): Likewise.
+ (do_t_arit3): Likewise.
+ (do_t_arit3c): Likewise.
+ (do_t_blx): Likewise.
+ (do_t_branch): Likewise.
+ (do_t_bkpt_hlt1): Likewise.
+ (do_t_branch23): Likewise.
+ (do_t_bx): Likewise.
+ (do_t_bxj): Likewise.
+ (do_t_cond): Likewise.
+ (do_t_csdb): Likewise.
+ (do_t_cps): Likewise.
+ (do_t_cpsi): Likewise.
+ (do_t_cbz): Likewise.
+ (do_t_it): Likewise.
+ (do_mve_vpt): New function to handle VPT blocks.
+ (encode_thumb2_multi): Use renamed functions and variables.
+ (do_t_ldst): Use renamed functions and variables.
+ (do_t_mov_cmp): Likewise.
+ (do_t_mvn_tst): Likewise.
+ (do_t_mul): Likewise.
+ (do_t_nop): Likewise.
+ (do_t_neg): Likewise.
+ (do_t_rsb): Likewise.
+ (do_t_setend): Likewise.
+ (do_t_shift): Likewise.
+ (do_t_smc): Likewise.
+ (do_t_tb): Likewise.
+ (do_t_udf): Likewise.
+ (do_t_loloop): Likewise.
+ (do_neon_cvt_1): Likewise.
+ (do_vfp_nsyn_cvt_fpv8): Likewise.
+ (do_vsel): Likewise.
+ (do_vmaxnm): Likewise.
+ (do_vrint_1): Likewise.
+ (do_crypto_2op_1): Likewise.
+ (do_crypto_3op_1): Likewise.
+ (do_crc32_1): Likewise.
+ (it_fsm_pre_encode): Likewise.
+ (it_fsm_post_encode): Likewise.
+ (force_automatic_it_block_close): Likewise.
+ (check_it_blocks_finished): Likewise.
+ (check_pred_blocks_finished): Likewise.
+ (arm_cleanup): Likewise.
+ (now_it_add_mask): Rename to ...
+ (now_pred_add_mask): ... this. And use new variables and functions.
+ (NEON_ENC_TAB): Add entries for vabdl, vaddl and vsubl.
+ (N_I_MVE, N_F_MVE, N_SU_MVE): New MACROs.
+ (neon_check_type): Generalize error message.
+ (mve_encode_qqr): New MVE generic encoding function.
+ (neon_dyadic_misc): Change to accept MVE variants.
+ (do_neon_dyadic_if_su): Likewise.
+ (do_neon_addsub_if_i): Likewise.
+ (do_neon_dyadic_long): Likewise.
+ (vfp_or_neon_is_neon): Add extra checks.
+ (check_simd_pred_availability): Helper function to check SIMD
+ instruction availability with respect to predication.
+ (enum opcode_tag): New suffix value.
+ (opcode_lookup): Change to handle VPT blocks.
+ (new_automatic_it_block): Rename to ...
+ (close_automatic_it_block): ...this.
+ (TxCE, TxC3, TxC3w, TUE, TUEc, TUF, CE, C3, ToC, ToU,
+ toC, toU, CL, cCE, cCL, C3E, xCM_, UE, UF, NUF, nUF,
+ NCE_tag, NCE, NCEF, nCE_tag, nCE, nCEF): Add default value for new
+ field.
+ (mCEF, mnCEF, mnCE, MNUF, mnUF, mToC, MNCE, MNCEF): New MACROs.
+ (insns): Redefine vadd, vsub, cabd, vabdl, vaddl, vsubl to accept MVE
+ variants. Add entries for vscclrm, and vpst.
+ (md_begin): Add arm_vcond_hsh initialization.
+ * config/tc-arm.h (enum it_state): Rename to...
+ (enum pred_state): ...this.
+ (struct current_it): Rename to...
+ (struct current_pred): ...this.
+ (enum pred_type): New enum.
+ (struct arm_segment_info_type): Use current_pred.
+ * testsuite/gas/arm/armv8_3-a-fp-bad.l: Update error message.
+ * testsuite/gas/arm/armv8_3-a-simd-bad.l: Update error message.
+ * testsuite/gas/arm/dotprod-illegal.l: Update error message.
+ * testsuite/gas/arm/mve-vaddsubabd-bad-1.d: New test.
+ * testsuite/gas/arm/mve-vaddsubabd-bad-1.l: New test.
+ * testsuite/gas/arm/mve-vaddsubabd-bad-1.s: New test.
+ * testsuite/gas/arm/mve-vaddsubabd-bad-2.d: New test.
+ * testsuite/gas/arm/mve-vaddsubabd-bad-2.l: New test.
+ * testsuite/gas/arm/mve-vaddsubabd-bad-2.s: New test.
+ * testsuite/gas/arm/mve-vpst-bad.d: New test.
+ * testsuite/gas/arm/mve-vpst-bad.l: New test.
+ * testsuite/gas/arm/mve-vpst-bad.s: New test.
+ * testsuite/gas/arm/neon-ldst-es-bad.l: Updated error message.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/tc-arm.c (mve_ext, mve_fp_ext): New features.
+ (armv8_1m_main_ext_table): Add new extensions.
+ (aeabi_set_public_attributes): Translate new features to new build attributes.
+ (arm_convert_symbolic_attribute): Add Tag_MVE_arch.
+ * doc/c-arm.texi: Document new extensions and new build attribute.
+
+2019-05-15 John Darrington <john@darrington.wattle.id.au>
+
+ * config/tc-s12z.c (register_prefix): New variable. (md_show_usage,
+ md_parse_option): parse the new option.
+ (lex_reg_name): Scan the prefix if one is set.
+ * doc/c-s12z.texi (S12Z-Opts): Document the new option.
+ * testsuite/gas/s12z/reg-prefix.d: New file.
+ * testsuite/gas/s12z/reg-prefix.s: New file.
+ * testsuite/gas/s12z/s12z.exp: Add them.
+
+2019-05-14 John Darrington <john@darrington.wattle.id.au>
+
+ * doc/as.texi (Machine Dependencies): Fix misaligned menu entry.
+
+2019-05-15 Alan Modra <amodra@gmail.com>
+
+ * config/tc-csky.c (md_convert_frag): Initialise trailing
+ padding for COND_JUMP_PIC.
+
+2019-05-15 Alan Modra <amodra@gmail.com>
+
+ * dwarf2dbg.c: Whitespace fixes.
+ (get_filenum): Don't strdup "file". Adjust error message.
+ (dwarf2_directive_filename): Use an unsigned type for "num".
+ Catch truncation of file number and overflow of get_filenum
+ XRESIZEVEC multiplication. Delete dead code.
+
+2019-05-15 Alan Modra <amodra@gmail.com>
+
+ PR 24538
+ * config/tc-tic54x.c (tic54x_start_line_hook): Do skip end of line
+ chars in setting endp.
+
+2019-05-14 Nick Clifton <nickc@redhat.com>
+
+ PR 24538
+ * config/tc-i386-intel.c (i386_intel_simplify_register): Reject
+ illegal register numbers.
+
+2019-05-10 Nick Clifton <nickc@redhat.com>
+
+ PR 24538
+ * macro.c (get_any_string): Increase size of buffer used to hold
+ decimal value of expression result.
+ * dw2gencfi.c (get_debugseg_name): Handle an empty name.
+ * dwarf2dbg.c (get_filenum): Catch integer wraparound when
+ extending allocate file array.
+ (dwarf2_directive_filename): Add extra checks of the computed file
+ number.
+ * config/tc-arm.c (arm_tc_equal_in_insn): Insert copy of name into
+ warning hash table.
+ (s_arm_eabi_attribute): Check for obj_elf_vendor_attribute
+ returning -1.
+ * config/tc-i386.c (i386_output_nops): Catch an attempt to
+ generate nops of negative lengths.
+ * as.h (MAX_LITTLENUMS): Move definition to here from...
+ * config/atof-ieee.c: ...here.
+ * config/tc-aarch64.c: ...here.
+ * config/tc-arc.c: ...here.
+ * config/tc-arm.c: ...here.
+ * config/tc-epiphany.c: ...here.
+ * config/tc-i386.c: ...here.
+ * config/tc-ia64.c: ...here. (And correct the value).
+ * config/tc-m32c.c: ...here.
+ * config/tc-m32r.c: ...here.
+ * config/tc-metag.c: ...here.
+ * config/tc-microblaze.c: ...here.
+ * config/tc-nds32.c: ...here.
+ * config/tc-or1k.c: ...here.
+ * config/tc-score.c: ...here.
+ * config/tc-score7.c: ...here.
+ * config/tc-tic4x.c: ...here.
+ * config/tc-tilegx.c: ...here.
+ * config/tc-tilepro.c: ...here.
+ * config/tc-visium.c: ...here.
+ * config/tc-sh.c (md_assemble): Add check for an instruction with
+ no opcodes.
+ * config/tc-mips.c (mips_lookup_insn): Add check for very short
+ instruction name.
+ * config/tc-tic54x.c: Use unsigned chars to access is_end_of_line
+ array.
+ (tic54x_start_line_hook): Check for an empty line.
+ (next_line_shows_parallel): Do not walk off the end of the string.
+ (tic54x_macro_start): Check for too much macro nesting.
+ (tic54x_start_label): Add label_start parameter. Use this
+ parameter to check the first character of the label.
+
+ * config/tc-tic54x.h (TC_START_LABEL_WITHOUT_COLON): Pass
+ line_start variable to tic54x_start_label.
+
+2019-05-10 Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * config/tc-mips.c (macro) <M_ADD_I, M_SUB_I, M_DADD_I, M_DSUB_I>:
+ Add expansions for MIPS r6.
+ * testsuite/gas/mips/add.s: Enable tests for R6.
+ * testsuite/gas/mips/daddi.s: Annotate to test DADD for R6.
+ * testsuite/gas/mips/mipsr6@add.d: Likewise.
+ * gas/testsuite/gas/mips/mipsr6@dadd.d: New test.
+ * gas/testsuite/gas/mips/mips.exp: Run the new test.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * testsuite/gas/aarch64/sve2.d: Remove file format restriction.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * testsuite/gas/aarch64/illegal-sve2-aes.d: New test.
+ * testsuite/gas/aarch64/illegal-sve2-bitperm.d: New test.
+ * testsuite/gas/aarch64/illegal-sve2-sha3.d: Test new instructions.
+ * testsuite/gas/aarch64/illegal-sve2-sm4.d: Test new instructions.
+ * testsuite/gas/aarch64/illegal-sve2-sve1ext.d: Test new instructions.
+ * testsuite/gas/aarch64/illegal-sve2-sve1ext.l: Test new instructions.
+ * testsuite/gas/aarch64/illegal-sve2.d: Test new instructions.
+ * testsuite/gas/aarch64/illegal-sve2.l: Test new instructions.
+ * testsuite/gas/aarch64/illegal-sve2.s: Test new instructions.
+ * testsuite/gas/aarch64/sve1-extended-sve2.s: New test.
+ * testsuite/gas/aarch64/sve2.d: Test new instructions.
+ * testsuite/gas/aarch64/sve2.s: Test new instructions.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-aarch64.c (parse_operands): Handle new SVE_SHLIMM_UNPRED_22
+ operand.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-aarch64.c (parse_operands): Handle new SVE_Zm4_11_INDEX
+ operand.
+
+2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-aarch64.c (parse_operands): Handle new SVE_SHRIMM_UNPRED_22
+ operand.
+
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c (REG_ZR): Macro specifying zero register.
2019-04-29 John Darrington <john@darrington.wattle.id.au>
- * testsuite/gas/s12z/truncated.d: New file.
+ * testsuite/gas/s12z/truncated.d: New file.
* testsuite/gas/s12z/truncated.s: New file.
* testsuite/gas/s12z/s12z.exp: Add new test.
* testsuite/gas/arm/archv8m_1m-cmse-main.s: Likewise.
2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR
for the LR operand and optional LR operand.
* testsuite/gas/arm/armv8_1-m-tloop-bad.l: New.
2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entriy for bfcsel.
(do_t_v8_1_branch): New switch case for bfcsel.
(tc_gen_reloc): Likewise.
2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entrie for bfl.
(do_t_v8_1_branch): New switch case for bfl.
* testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d: New
2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entries for bf.
(do_t_branch_future): New.
* testsuite/gas/mips/mips.exp: Run the new test.
2019-04-12 John Darrington <john@darrington.wattle.id.au>
-
+
config/tc-s12z.h: Remove definition of macro TC_M68K
2019-04-01 John Darrington <john@darrington.wattle.id.au>
-
+
config/tc-s12z.c: Use bfd_boolean where appropriate.
2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
2019-01-31 John Darrington <john@darrington.wattle.id.au>
- * config/tc-s12z.c (lex_imm): Add new argument exp_o.
+ * config/tc-s12z.c (lex_imm): Add new argument exp_o.
(emit_reloc): New function.
(md_apply_fix): [BFD_RELOC_S12Z_OPR] Recognise that it
can be either 2 bytes or 3 bytes long.
2019-01-09 John Darrington <john@darrington.wattle.id.au>
- * testsuite/gas/s12z/jsr.s: New case.
+ * testsuite/gas/s12z/jsr.s: New case.
* testsuite/gas/s12z/jsr.d: New case.
2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
projects / deliverable / binutils-gdb.git / blobdiff