+2014-09-16 Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/tc-i386.c (evexrcig): New.
+ (build_evex_prefix): Force rounding bits.
+ (OPTION_MEVEXRCIG): New.
+ (md_longopts): Add mevexrcig.
+ (md_parse_option): Handle OPTION_MEVEXRCIG.
+ (md_show_usage): Document mevexrcig.
+ * doc/c-i386.texi (mevexrcig): Document new option.
+
+2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com>
+
+ * config/tc-nds32.c (nds32_fsrs, nds32_fdrs, nds32_gprs): Remove.
+ (relax_table): Add new relaxation pattern.
+ (do_pseudo_la_internal, do_pseudo_ls_bhw): Expand for PIC suffix.
+ (do_pseudo_move, do_pseudo_neg, do_pseudo_pushpopm): Fix.
+ (get_range_type, nds32_elf_record_fixup_exp, nds32_get_align,
+ nds32_elf_build_relax_relation, md_assemble, invalid_prev_frag,
+ nds32_relax_frag, md_estimate_size_before_relax): Adjust relaxation.
+ (relocation_table): Remove.
+ (relax_ls_table): Load-store relaxation pattern.
+ (hint_map): Define-use chain pattern.
+ (nds32_find_reloc_table, nds32_match_hint_insn): Analysis
+ relaxation pattern.
+ (nds32_parse_name): Parse PIC suffix.
+ * config/tc-nds32.h: Declare.
+
+2014-09-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (OPTION_omit_lock_prefix): Renamed to ...
+ (OPTION_OMIT_LOCK_PREFIX): This.
+ (md_longopts): Updated.
+ (md_parse_option): Likewise.
+
+2014-09-15 Andrew Bennett <andrew.bennett@imgtec.com>
+ Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (mips_nan2008): New static global.
+ (mips_flag_nan2008): Removed.
+ (LL_SC_FMT): New define.
+ (COP12_FMT): Updated.
+ (ISA_IS_R6): New define.
+ (ISA_HAS_64BIT_REGS): Add mips64r6.
+ (ISA_HAS_DROR): Likewise.
+ (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6.
+ (ISA_HAS_ROR): Likewise.
+ (ISA_HAS_ODD_SINGLE_FPR): Likewise.
+ (ISA_HAS_MXHC1): Likewise.
+ (hilo_interlocks): Likewise.
+ (md_longopts): Likewise.
+ (ISA_HAS_LEGACY_NAN): New define.
+ (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6.
+ (mips_ase): Add field rem_rev.
+ (mips_ases): Updated to add which ISA an ASE was removed in.
+ (mips_isa_rev): Add support for mips32r6 and mips64r6.
+ (mips_check_isa_supports_ase): Add support to check if an ASE
+ has been removed in the specified MIPS ISA revision.
+ (validate_mips_insn): Skip '-' character.
+ (macro_build): Likewise.
+ (mips_check_options): Prevent R6 working with fp32, mips16,
+ micromips, or branch relaxation.
+ (file_mips_check_options): Set R6 floating point registers to
+ 64 bit. Also deal with the nan2008 option.
+ (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
+ BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
+ BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
+ BFD_RELOC_LO16_PCREL.
+ (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV
+ and OP_NON_ZERO_REG.
+ (match_check_prev_operand): New static function.
+ (match_same_rs_rt_operand): New static function.
+ (match_non_zero_reg_operand): New static function.
+ (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV
+ and OP_NON_ZERO_REG.
+ (insns_between): Added case to deal with forbidden slots.
+ (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2
+ and BFD_RELOC_MIPS_26_PCREL_S2.
+ (match_insn): Add support for operands -A, -B, +' and +". Also
+ skip '-' character.
+ (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo.
+ (md_parse_option): Add support for mips32r6 and mips64r6. Also
+ update the nan option handling.
+ (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
+ BFD_RELOC_MIPS_26_PCREL_S2.
+ (mips_force_relocation): Prevent forced relaxation for MIPS r6.
+ (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
+ BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
+ BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
+ BFD_RELOC_LO16_PCREL.
+ (s_mipsset): Add support for mips32r6 and mips64r6.
+ (s_nan): Update to support the new nan2008 framework.
+ (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
+ BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
+ BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
+ BFD_RELOC_LO16_PCREL.
+ (mips_elf_final_processing): Updated to use the mips_nan2008.
+ (mips_cpu_info_table): Add entries for mips32r6 and mips64r6.
+ (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref
+ macros for R6.
+ (mips_fix_adjustable): Make PC relative R6 relocations relative
+ to the symbol and not the section.
+ * configure.ac: Add support for mips32r6 and mips64r6.
+ * configure: Regenerate.
+ * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line
+ options.
+ * doc/as.texinfo: Likewise.
+
+2014-09-15 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * tc-mips.c (check_fpabi): Move softfloat and singlefloat
+ checks higher.
+
+2014-09-12 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (sparc_ip): Update the set of allowed hwcaps
+ when bumping the current architecture.
+ (md_begin): Adjust the highetst architecture level also when a
+ specific architecture is not requested.
+
+2014-09-12 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * configure.tgt: Add mips*-img-elf* target triple.
+
+2014-09-12 Alan Modra <amodra@gmail.com>
+
+ * config/tc-i386.c (match_template): Remove redundant "!!" testing
+ single-bit bitfields.
+ (build_modrm_byte): Don't compare single-bit bitfields to "1".
+
+2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-a17.
+
+2014-09-03 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-aarch64.c (parse_sys_reg): Remove the restriction on op0
+ field.
+
+2014-09-03 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-aarch64.c (parse_operands): Recognize PAIRREG.
+ (aarch64_features): Add entry for lse extension.
+
+2014-08-26 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-arm.c (aeabi_set_public_attributes): Update selected_cpu
+ based on the info we got during parsing.
+ (arm_handle_align): Make sure the p2align expanding logic under thumb
+ unchanged.
+
+2014-08-26 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (macro) <M_SAA_AB>: Remove duplicate code and
+ jump to...
+ <M_SAAD_AB>: ... here. Assert that !microMIPS.
+
+2014-08-26 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+
+ * config/tc-moxie.h (md_convert_frag): Silence warning.
+
+2014-08-22 Richard Henderson <rth@redhat.com>
+
+ * config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix
+ register number for vector register types.
+ * config/tc-aarch64.h (DWARF2_LINE_MIN_INSN_LENGTH): Set to 4.
+ (DWARF2_CIE_DATA_ALIGNMENT): Set to -8.
+
+2014-08-22 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
+ flag if both the processor and opcode flags match.
+
+2014-08-22 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-arm.c (add_to_lit_pool): Preinitialize `imm1'.
+
+2014-08-20 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * dw2gencfi.c (make_debug_seg): Replace leading spaces with tabs.
+ (dot_cfi_val_encoded_addr, output_cfi_insn): Likewise.
+ (output_cie, cfi_change_reg_numbers, cfi_finish): Likewise.
+
+2014-08-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (parse_ifimm_zero): New function.
+ (enum operand_parse_code): Add OP_RSVD_FI0 value.
+ (parse_operands): Handle OP_RSVD_FI0.
+ (asm_opcode_insns): Use RSVD_FI0 for second operand of vcmp, vcmpe.
+
+2014-08-20 Alan Modra <amodra@gmail.com>
+
+ * Makefile.am: Typo fix.
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2014-08-19 Andreas Tobler <andreast@fgznet.ch>
+
+ * Makefile.am: Add FreeBSD ARM support.
+ * Mafefile.in: Regenerate.
+ * configure.tgt: Add FreeBSD ARM support.
+ * config/te-armfbsdeabi.h: New file.
+ * config/te-armfbsdvfp.h: Likewise.
+
+2014-08-19 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+
+2014-08-18 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-rl78.c (md_apply_fix): Correct handling of small sized
+ RELOC_RL78_DIFF fixups.
+
+2014-08-18 Alan Modra <amodra@gmail.com>
+
+ * read.c (parse_mri_cons): Warning fix.
+
+2014-08-14 Alan Modra <amodra@gmail.com>
+
+ * configure.ac: Move ACX_LARGEFILE after LT_INIT.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+
+2014-08-06 Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/tc-i386.c (omit_lock_prefix): New.
+ (output_insn): Omit lock prefix if omit_lock_prefix is true.
+ (OPTION_omit_lock_prefix): New.
+ (md_longopts): Add momit-lock-prefix.
+ (md_parse_option): Handle momit-lock-prefix.
+ (md_show_usage): Add momit-lock-prefix=[no|yes].
+ * doc/c-i386.texi (momit-lock-prefix): Document.
+
+2014-08-01 Takashi Yoshii <yoshii.takashi@renesas.com>
+
+ PR 10378
+ * config/tc-sh.c (tc_gen_reloc): Fix initialization of addend in
+ SWITCH_TABLE case.
+
+2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c: Rename INSN_LOAD_COPROC_DELAY to INSN_LOAD_COPROC
+ and INSN_COPROC_MOVE_DELAY to INSN_COPROC_MOVE throughout.
+
+2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (mips_flags_frag): New static global.
+ (struct mips_set_options): Add oddspreg field.
+ (file_mips_opts, mips_opts): Initialize oddspreg.
+ (ISA_HAS_ODD_SINGLE_FPR): Add CPU argument and update for R5900 and
+ Loongson-3a.
+ (enum options, md_longopts, md_parse_option): Add -mfpxx, -modd-spreg
+ and -mno-odd-spreg options.
+ (md_begin): Create .MIPS.abiflags section.
+ (fpabi_incompatible_with, fpabi_requires): New static function.
+ (check_fpabi): Likewise.
+ (mips_check_options): Handle fp=xx and oddspreg restrictions.
+ (file_mips_check_options): Set oddspreg by default for fp=xx.
+ (mips_oddfpreg_ok): Re-write function.
+ (check_regno): Check odd numbered registers regardless of FPR size.
+ For fp != 32 use as_bad instead of as_warn.
+ (match_float_constant): Rewrite check regarding FP register width. Add
+ support for generating constants when MXHC1 is present. Handle fp=xx
+ to comply with the ABI.
+ (macro): Update M_LI_DD similarly to match_float_constant. Generate
+ MTHC1 when available. Check that correct code can be generated for
+ fp=xx and fp=64 ABIs.
+ (parse_code_option, s_mipsset): Add fp=xx, oddspreg and nooddspreg
+ options.
+ (mips_convert_ase_flags): New static function.
+ (mips_elf_final_processing): Use fpabi == Val_GNU_MIPS_ABI_FP_OLD_64
+ to determine when to add the EF_MIPS_FP64 flag. Populate the
+ .MIPS.abiflags section.
+ (md_mips_end): Update .gnu_attribute based on command line and .module
+ as applicable. Use check_fpabi to ensure .gnu.attribute and command
+ line/.module options are consistent.
+ * doc/as.texinfo: Add missing -mgp64/-mfp64 options and document new
+ -mfpxx, -modd-spreg and -mno-odd-spreg options.
+ * doc/c-mips.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg,
+ gnu_attribute values and FP ABIs.
+
+2014-07-27 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ Add RTEMS target support and simplify matching
+
+ * gas/configure.tgt (or1k*-*-rtems*): Ensure a match.
+ (or1k*-*-*): Use or1k* to match or1knd and or1kZ.
+
+2014-07-27 Anthony Green <green@moxielogic.com>
+
+ * configure.tgt (generic_target): Add moxie-*-moxiebox*
+ * config/tc-moxie.c: Remove moxie_target_format.
+ (md_begin): Set default target_big_endian.
+ * config/tc-moxie.h: Only set TARGET_BYTES_BIG_ENDIAN if unset.
+ (TARGET_FORMAT): Set based on target_big_endian.
+
+2014-07-26 Alan Modra <amodra@gmail.com>
+
+ * config/bfin-parse.y: Don't include obstack.h.
+ * config/obj-aout.c: Likewise.
+ * config/obj-coff.c: Likewise.
+ * config/obj-som.c: Likewise.
+ * config/tc-bfin.c: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-rl78.c: Likewise.
+ * config/tc-rx.c: Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * expr.c: Likewise.
+ * listing.c: Likewise.
+ * config/obj-elf.c (elf_file_symbol): Make name_length a size_t.
+ * config/tc-aarch64.c (symbol_locate): Likewise.
+ * config/tc-arm.c (symbol_locate): Likewise.
+ * config/tc-mmix.c (mmix_handle_mmixal): Make len_0 a size_t.
+ * config/tc-score.c (s3_build_score_ops_hsh): Make len a size_t.
+ (s3_build_dependency_insn_hsh): Likewise.
+ * config/tc-score7.c (s7_build_score_ops_hsh): Likewise.
+ (s7_build_dependency_insn_hsh): Likewise.
+ * frags.c (frag_grow): Make parameter a size_t, and use size_t locals.
+ (frag_new): Make parameter a size_t.
+ (frag_var_init): Make max_chars and var parameters size_t.
+ (frag_var, frag_variant): Likewise.
+ (frag_room): Return a size_t.
+ (frag_align_pattern): Make n_fill parameter a size_t.
+ * frags.h: Update function prototypes.
+ * symbols.c (save_symbol_name): Make name_length a size_t.
+
+2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
+ Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Sergey Lega <sergey.s.lega@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .avx512dq, CPU_AVX512DQ_FLAGS.
+ * doc/c-i386.texi: Document avx512dq/.avx512dq.
+
+2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
+ Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Sergey Lega <sergey.s.lega@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .avx512bw, CPU_AVX512BW_FLAGS.
+ * doc/c-i386.texi: Document avx512bw/.avx512bw.
+
+2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
+ Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Sergey Lega <sergey.s.lega@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .avx512vl, CPU_AVX512VL_FLAGS.
+ (build_vex_prefix): Don't abort on VEX.W.
+ (check_VecOperands): Support BROADCAST_1TO4 and BROADCAST_1TO2.
+ (check_VecOperations): Ditto.
+ * doc/c-i386.texi: Document avx512vl/.avx512vl.
+
+2014-07-21 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ Add or reactivate or1k-*-rtems*
+ * gas/configure.tgt (or1k-*-rtems*): Add.
+
+2014-07-17 Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/tc-i386.c (parse_register): Set need_vrex.
+
+2014-07-15 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-arm.c (add_to_lit_pool): Use "inst.operands[1].imm" for
+ sign extension. Casting the type of imm1 and imm2 to offsetT. Fix
+ one logic error when checking X_op.
+
+2014-07-14 Andreas Schwab <schwab@linux-m68k.org>
+
+ * config/tc-m68k.c (md_convert_frag_1): Don't complain with
+ --pcrel about TAB (DBCCLBR, LONG) conversion.
+
+2014-07-12 David Majnemer <david.majnemer@gmail.com>
+
+ * read.c (assign_symbol): Don't force "set" symbols local for PE.
+
+2014-07-08 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-arm.c (literal_pool): New field "alignment".
+ (find_or_make_literal_pool): Initialize "alignment" to 2.
+ (s_ltorg): Align the pool using value of "alignment"
+ (parse_big_immediate): New parameter "in_exp". Return
+ parsed expression if "in_exp" is not null.
+ (parse_address_main): Invoke "parse_big_immediate" for
+ constant parameter.
+ (add_to_lit_pool): Add one parameter 'nbytes'.
+ Split 8 byte entry into two 4 byte entry.
+ Add padding to align 8 byte entry to 8 byte boundary.
+ (encode_arm_cp_address): Generate literal pool entry if possible.
+ (move_or_literal_pool): Generate entry for vldr case.
+ (enum lit_type): New enum type.
+ (do_ldst): Use new enum type.
+ (do_ldstv4): Likewise.
+ (do_t_ldst): Likewise.
+ (neon_write_immbits): Support Thumb-2 mode.
+
+2014-07-07 Barney Stratford <barney_stratford@fastmail.fm>
+
+ * config/tc-avr.c (avr_operand): Permit referring to r26-r31 by
+ name as [xyz][hl]. Permit using a symbol whoes name begins with
+ ‘r’ to refer to a register.
+ Allow arbitrary expressions for the P and p operators.
+ (md_apply_fix): Check the BFD_RELOC_AVR_PORT5 and
+ BFD_RELOC_AVR_PORT6 relocations.
+
+2014-07-04 Alan Modra <amodra@gmail.com>
+
+ * doc/internals.texi: Update "configure.in" comments.
+ * acinclude.m4: Likewise.
+ * config/tc-sparc.c: Likewise.
+
+2014-07-04 Alan Modra <amodra@gmail.com>
+
+ * configure.ac: Rename from configure.in.
+ * Makefile.in: Regenerate.
+ * config.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+
+2014-07-04 Alan Modra <amodra@gmail.com>
+
+ * doc/Makefile.am (CONFIG_STATUS_DEPENDENCIES): Delete.
+ * doc/Makefile.in: Regenerate.
+
+2014-07-04 Alan Modra <amodra@gmail.com>
+
+ * configure.in: Include bfd/version.m4.
+ (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
+ (BFD_VERSION): Delete.
+ * configure.com: Get bfd version from bfd/version.m4.
+ * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
+ * configure: Regenerate.
+ * Makefile.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+
+2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
+ Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+ Pitchumani Sivanupandi <pitchumani.s@atmel.com>
+ Soundararajan <Sounderarajan.D@atmel.com>
+
+ * config/tc-avr.c (mcu_types): Add avrtiny arch.
+ Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
+ and attiny40.
+ (md_show_usage): Add avrtiny arch in usage message.
+ (avr_operand): validate and issue error for invalid register for
+ avrtiny.
+ add new reloc exp for 16 bit lds/sts instruction.
+ (md_apply_fix): check 16 bit lds/sts operand for out of range and
+ encode.
+ (md_assemble): check ISA for arch and issue diagnostic.
+ * NEWS: Mention new support.
+ * doc/c-avr.texi: Document support for avrtiny architecture.
+
+2014-06-27 Alan Modra <amodra@gmail.com>
+
+ * config/obj-macho.c (obj_mach_o_set_symbol_qualifier): Don't set
+ SYM_MACHO_FIELDS_NOT_VALIDATED after reporting an error.
+ (obj_mach_o_frob_label): Avoid cascading errors.
+ (obj_mach_o_frob_symbol): Don't set SYM_MACHO_FIELDS_NOT_VALIDATED.
+
+2014-06-18 DJ Delorie <dj@redhat.com>
+
+ * config/rx-parse.y (BSET, BCLR, BTST, BNOT, BMCMD): Make .B
+ suffix optional.
+
+2014-06-17 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * config/tc-mmix.c (loc_assert_s): New member frag.
+ (s_loc): Set it.
+ (mmix_md_end): If an error is reported for a LOC expression, patch
+ up the related frag.
+
+2014-06-17 Chris Metcalf <cmetcalf@tilera.com>
+
+ PR gas/16908
+ * macro.c (buffer_and_nest): Honour #line directives inside
+ macros.
+
+2014-06-17 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-arm.c (depr_it_insns): New check for inc/dec sp.
+
+2014-06-17 Hans-Peter Nilsson <hp@axis.com>
+
+ * config/tc-cris.c (cris_bad): New function.
+ (cris_process_instruction): Where applicable, use it instead of
+ as_bad.
+
+2014-06-16 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-aarch64.c (md_apply_fix): Ignore unused relocs.
+
+2014-06-16 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-aarch64.c (END_OF_INSN): New macro.
+ (parse_operands): Handle operand given and in wrong format when
+ operand is optional.
+
+2014-06-16 Alan Modra <amodra@gmail.com>
+
+ * write.h (subsegs_finish): Delete declaration.
+ * write.c (subsegs_finish): Make static.
+ (write_object_file): Call subsegs_finish from here. Don't print
+ warning and error count here..
+ * as.c (main): ..do so here instead. Remove dead code for "no
+ object file generated". Split out count strings to better support
+ internationalisation. Don't call subsegs_finish. Tidy setting of
+ "keep_it". Run write_object_file even after errors.
+ (keep_it): Make static.
+ * config/obj-elf.c (elf_frob_symbol): Remove assert.
+ (elf_frob_file_before_adjust): Likewise.
+
+2014-06-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-dlx.c (machine_ip): Move initialisation of the_insn
+ earlier.
+
+2014-06-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-i386.c (reloc): Don't avoid pcrel check for
+ BFD_RELOC_SIZE64. Return NO_RELOC on failing pcrel check.
+
+2014-06-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-tic6x.c (s_tic6x_ehtype): Clear after frag_more.
+ (tic6x_output_exidx_entry): Likewise.
+ (md_apply_fix): Simplify 1 byte md_number_to_chars.
+
+2014-06-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-tic54x.c (tic54x_mlib): Don't write garbage past
+ end of archive to temp file.
+ (tic54x_start_line_hook): Start scan for parallel on next line,
+ not one char into next line (which may overrun the buffer).
+
+2014-06-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-vax.c (md_apply_fix): Rewrite.
+ (tc_gen_reloc, vax_cons, vax_cons_fix_new): Style: Use NO_RELOC
+ define rather than the equivalent BFD_RELOC_NONE.
+
+2014-06-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-arm.c (s_arm_elf_cons): Initialise after frag_more.
+ (md_apply_fix): Delete now unnecessary zeroing for BFD_RELOC_ARM_GOT*
+ and BFD_RELOC_ARM_TLS* relocs. Simplify BFD_RELOC_8 case.
+
+2014-06-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-cris.c (md_create_long_jump): Follow "short" jump
+ with a nop rather than leaving uninitialised.
+
+2014-06-13 Chen Gang <gang.chen.5i5j@gmail.com>
+
+ * config/tc-score7.c: Replace sprintf with strcpy where
+ appropriate.
+ (s7_b32_relax_to_b16): Use symbol_get_frag() to access a symbol's
+ frag.
+ * config/tc-score.c (s3_relax_branch_inst16): Likewise.
+ (s3_relax_cmpbranch_inst32): Likewise.
+
+2014-06-07 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_insert_operand): Handle PPC_OPERAND_SIGNOPT
+ on unsigned fields. Comment on PPC_OPERAND_SIGNOPT signed fields
+ in 64-bit mode.
+
+2014-06-02 Martin Storsjo <martin@martin.st>
+
+ * doc/c-aarch64.texi: Fix the documentation on :pg_hi21:.
+
+2014-06-05 Joel Brobecker <brobecker@adacore.com>
+
+ * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
+ bfd's development.sh.
+ * Makefile.in, configure: Regenerate.
+
+2014-06-03 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c (OPTION_WARN_INTR_NOPS): Use y instead of z.
+ (OPTION_NO_WARN_INTR_NOPS): Use Y instead of Z.
+ * doc/c-msp430.texi: Update command line option description.
+
+2014-05-22 Alan Modra <amodra@gmail.com>
+
+ * listing.c (listing_warning, listing_error): Add space after colon.
+ * messages.c (as_warn_internal, as_bad_internal): Use the same
+ string as above.
+
+2014-05-20 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (file_mips_opts_checked): New static global.
+ (s_module): New static function.
+ (file_ase): Remove.
+ (mips_pseudo_table): Add .module handler.
+ (mips_set_ase): Add opts argument and use instead of mips_opts.
+ (md_assemble): Use file_mips_check_options.
+ (md_parse_option): Update to use file_mips_opts instead of mips_opts.
+ (mips_set_architecture): Delete function. Moved to...
+ (mips_after_parse_args): Here. All logic now applies to
+ file_mips_opts first and then copies the final state to mips_opts.
+ Move error checking and defaults inference to mips_check_options and
+ file_mips_check_options.
+ (mips_check_options): New static function. Common option checking for
+ command line, .module and .set. Use .module values in error messages
+ instead of refering to command line options.
+ (file_mips_check_options): New static function. A wrapper for
+ mips_check_options with file_mips_opts. Updates BFD arch based on
+ final options.
+ (s_mipsset): Split into s_mipsset and parse_code_option. Settings
+ supported by both .set and .module are moved to parse_code_option.
+ Warnings and errors are kept in s_mipsset because when
+ parse_code_option is used with s_module the warnings are deferred
+ until code is generated. Any setting supporting 'default' value is
+ kept in s_mipsset as it is not applicable to s_module. Inferred
+ settings are also kept in s_mipsset as s_module does not infer any
+ settings. Use mips_check_options.
+ (parse_code_option): New static function derived from s_mipsset.
+ (s_module): New static function that implements .module. Allows file
+ level settings to be changed until code is generated.
+ (s_cpload, s_cpsetup, s_cplocal): Use file_mips_check_options.
+ (s_cprestore, s_cpreturn, s_cpadd, mips_address_bytes): Likewise.
+ (mips_elf_final_processing): Update file_ase to file_mips_opts.ase.
+ (md_mips_end): Use file_mips_check_options.
+ * doc/c-mips.texi: Document .module.
+
+2014-05-20 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * messages.c (as_warn_internal): Remove extra whitespace from
+ warning messages.
+
+2014-05-20 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (FP64_ASES): Add ASE_MSA.
+ (mips_after_parse_args): Do not select ASE_MSA without -mfp64.
+
+2014-05-20 Mike Stump <mikestump@comcast.net>
+
+ * messages.c (as_warn_internal): Ensure we don't interleave output
+ within a single line when make -j is used.
+ (as_bad_internal): Likewise.
+
+2014-05-20 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/obj-elf.h (obj_elf_seen_attribute): Declare.
+ * config/obj-elf.c (recorded_attribute_info): New structure.
+ (recorded_attributes): New variable.
+ (record_attribute, obj_elf_seen_attribute): New functions.
+ (obj_elf_vendor_attribute): Record which attributes have been seen.
+
+2014-05-20 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c (CHECK_RELOC_MSP430): Add OP parameter.
+ Generate BFD_RELOC_MSP430_ABS_HI16 if vshift is 1.
+ (msp430_srcoperand): Store vshift value in operand.
+
+2014-05-19 Nick Clifton <nickc@redhat.com>
+
+ PR gas/16858
+ * config/tc-i386.c (md_apply_fix): Improve the detection of code
+ symbols for 32-bit PE targets.
+
+2014-05-18 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (md_obj_begin): Delete.
+ (md_obj_end): Fold into...
+ (md_mips_end): ...here. Move to end of file.
+
+2014-05-17 Nick Clifton <nickc@redhat.com>
+
+ PR gas/16946
+ * config/tc-v850.c (handle_ctoff): Generate an error if called
+ when using the RH850 ABI.
+
+2014-05-16 Kaushik Phata <Kaushik.Phatak@kpit.com>
+
+ * config/tc-rl78.c (enum options): Add OPTION_32BIT_DOUBLES
+ and OPTION_64BIT_DOUBLES.
+ (md_longopts): Add -m32bit-doubles and -m64bit-doubles.
+ (md_parse_option): Parse -m32bit-doubles and -m64bit-doubles.
+ (md_show_usage): Show all of the RL78 options.
+ (rl78_float_cons): New static functions.
+ (md_pseudo_table): Update handler for "double".
+ * doc/c-rl78.texi: Document new options.
+ * doc/as.texinfo: Likewise.
+
2014-05-13 Matthew Fortune <matthew.fortune@imgtec.com>
* config/tc-mips.c (mips_set_options): Rename gp32 to gp throughout.