+2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2012-09-07 Anthony Green <green@moxielogic.com>
+
+ * config/tc-moxie.c (md_pcrel_from): Branches are now relative
+ to the address following the branch instruction.
+
+2012-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (set_highgprs_p): New variable.
+ (s390_machinemode): New function.
+ (md_pseudo_table): Add new pseudo command machinemode.
+ (md_parse_option): Set set_highgprs_p to TRUE if -mzarch was
+ specified on command line.
+ (s390_elf_final_processing): Set the highgprs flag in the ELF
+ header depending on set_highgprs_p.
+
+ * doc/c-s390.texi: Document new pseudo machinemode.
+
+2012-09-05 James Lemke <jwlemke@codesourcery.com>
+
+ * doc/c-ppc.texi: Document -mvle.
+ * doc/as.texinfo: Likewise.
+
+2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
+
+ * config/tc-ia64.c (reg_symbol): Add a new register.
+ (indirect_reg): Ditto.
+ (pseudo_func): Add new symbolic constants.
+ (operand_match): Add new operand types recognition.
+ (operand_insn): Add new register recognition.
+ (md_begin): Add new register definition.
+ (specify_resource): Add new register recognition.
+
+2012-09-01 Hans-Peter Nilsson <hp@bitrange.com>
+
+ PR gas/14521
+ * config/tc-mmix.h (tc_frob_file_before_fix): Renumber sections
+ after call to mmix_frob_file.
+
+2012-08-31 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * doc/c-mips.texi (MIPS Opts): Correct a typo in the -mips5
+ option.
+
+2012-08-27 Walter Lee <walt@tilera.com>
+
+ * tc-tilegx.c (O_hw0_plt): Define operator.
+ (O_hw1_plt): Ditto.
+ (O_hw1_last_plt): Ditto.
+ (O_hw2_last_plt): Ditto.
+ (md_begin): Handle new operators.
+ (emit_tilegx_instruction): Ditto.
+ (md_apply_fix): Ditto.
+ * doc/c-tilegx.texi: Document new operators.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.
+ (do_sha1h): New function.
+ (do_sha1su1): Likewise.
+ (do_sha256su0): Likewise.
+ (insns): Add 2 operand SHA instructions.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry.
+ (do_crypto_3op_1): New function.
+ (do_sha1c): Likewise.
+ (do_sha1p): Likewise.
+ (do_sha1m): Likewise.
+ (do_sha1su0): Likewise.
+ (do_sha256h): Likewise.
+ (do_sha256h2): Likewise.
+ (do_sha256su1): Likewise.
+ (insns): Add SHA 3 operand instructions.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (neon_type_mask): Add P64 type.
+ (type_chk_of_el_type): Handle P64 type.
+ (el_type_of_type_chk): Likewise.
+ (do_neon_vmull): Handle VMULL.P64.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add aes entry.
+ (neon_type_mask): Add N_UNT.
+ (neon_check_type): Don't always decay typed to untyped sizes.
+ (do_crypto_2op_1): New function.
+ (do_aese): Likewise.
+ (do_aesd): Likewise.
+ (do_aesmc.8): Likewise.
+ (do_aesimc.8): Likewise.
+ (insns): Add AES instructions.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (el_type_type_check): Add handling for 16-bit
+ floating point types.
+ (do_neon_cvttb_2): New function.
+ (do_neon_cvttb_1): Likewise.
+ (do_neon_cvtb): Refactor to use do_neon_cvttb_1.
+ (do_neon_cvtt): Likewise.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add vrint entries.
+ (neon_cvt_mode): Add neon_cvt_mode_r.
+ (do_vrint_1): New function.
+ (do_vrint_x): Likewise.
+ (do_vrint_z): Likewise.
+ (do_vrint_r): Likewise.
+ (do_vrint_a): Likewise.
+ (do_vrint_n): Likewise.
+ (do_vrint_p): Likewise.
+ (do_vrint_m): Likewise.
+ (insns): Add VRINT instructions.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry.
+ (neon_cvt_mode): New enumeration.
+ (do_vfp_nsyn_cvt_fpv8): New function.
+ (do_neon_cvt_1): Add support for new conversions.
+ (do_neon_cvtr): Use neon_cvt_mode enumerator.
+ (do_neon_cvt): Likewise.
+ (do_neon_cvta): New function.
+ (do_neon_cvtn): Likewise.
+ (do_neon_cvtp): Likewise.
+ (do_neon_cvtm): Likewise.
+ (insns): Add new VCVT instructions.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm>
+
+ * config/tc-arm.c (CVT_FLAVOUR_VAR): New define.
+ (CVT_VAR): New helper define.
+ (neon_cvt_flavour): New enumeration, function renamed...
+ (get_neon_cvt_flavour): ...to this.
+ (do_vfp_nsyn_cvt): Update to use new neon_cvt_flavour.
+ (do_vfp_nsyn_cvtz): Likewise.
+ (do_neon_cvt_1): Likewise.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.
+ (vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator.
+ (vfp_or_neon_is_neon): Add check for SIMD for ARMv8.
+ (do_maxnm): New function.
+ (insns): Add vmaxnm, vminnm entries.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.
+ (NEON_ENC_FPV8_): New define.
+ (do_vfp_nsyn_fpv8): New function.
+ (do_vsel): Likewise.
+ (insns): Add VSEL instructions.
+
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (do_rm_rn): New function.
projects / deliverable / binutils-gdb.git / blobdiff