x86: fold certain AVX512 rotate and shift templates
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 7c9f2f20b589ce858ead58d96dd8795163343b41..d0c41124086fd5d689e69989a05328843f9dcba0 100644 (file)
@@ -1,3 +1,306 @@
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (build_modrm_byte): Make VexNDD handling cope
+       with 3rd (immediate) operand.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (XMMWORD_MNEM_SUFFIX, YMMWORD_MNEM_SUFFIX,
+       ZMMWORD_MNEM_SUFFIX): Delete.
+       (process_suffix): Drop their uses. Re-arrange final part of
+       logic into a switch() statement. Drop special casing of
+       cmpxchg8b.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (match_template): Also match register
+       operands 0 and 2 for 3-operand forms.
+       * testsuite/gas/i386/unspec64.l, testsuite/gas/i386/unspec64.s:
+       New.
+       * testsuite/gas/i386/i386.exp: Run new test.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): Do common part of register
+       checks first.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (parse_insn): Move success return up. Combine
+       failure returns.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (cpu_flags_match): Add GFNI check to AVX
+       logic. Add respective logic for AVX512F.
+       * testsuite/gas/i386/arch-avx-1.s: Add GFNI test.
+       testsuite/gas/i386/arch-avx-1.d,
+       testsuite/gas/i386/arch-avx-1-1.l,
+       testsuite/gas/i386/arch-avx-1-2.l,
+       testsuite/gas/i386/arch-avx-1-3.l,
+       testsuite/gas/i386/arch-avx-1-4.l,
+       testsuite/gas/i386/arch-avx-1-5.l,
+       testsuite/gas/i386/arch-avx-1-6.l: Adjust expectations.
+       * testsuite/gas/i386/arch-avx-1-7.l,
+       testsuite/gas/i386/arch-avx-1-7.s,
+       testsuite/gas/i386/arch-avx-1-8.l,
+       testsuite/gas/i386/arch-avx-1-8.s,
+       testsuite/gas/i386/avx512f-plain.l,
+       testsuite/gas/i386/avx512f-plain.s,
+       testsuite/gas/i386/avx512vl-plain.l,
+       testsuite/gas/i386/avx512vl-plain.s: New.
+       * testsuite/gas/i386/i386.exp: Run new tests.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (cpu_flags_match): Move AVX512VL check ahead.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (CPU_FLAGS_32BIT_MATCH): Delete.
+       (cpu_flags_match): Use CPU_FLAGS_ARCH_MATCH instead of
+       CPU_FLAGS_32BIT_MATCH.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (CPU_FLAGS_AES_MATCH, CPU_FLAGS_AVX_MATCH,
+       CPU_FLAGS_PCLMUL_MATCH): Delete.
+       (CPU_FLAGS_32BIT_MATCH): Drop uses of deleted CPU_FLAGS_*_MATCH.
+       (cpu_flags_match): Combine AVX checks into
+       single if().
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (cpu_flags_match): Drop "else" branches
+       setting CPU_FLAGS_ARCH_MATCH.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (md_assemble): Extend SSE check conditional.
+       * testsuite/gas/i386/ilp32/x86-64-sse-check-none.d,
+       testsuite/gas/i386/ilp32/x86-64-sse-check-warn.d,
+       testsuite/gas/i386/ilp32/x86-64-sse-check.d,
+       testsuite/gas/i386/sse-check-none.d,
+       testsuite/gas/i386/sse-check-warn.d,
+       testsuite/gas/i386/x86-64-sse-check.d,
+       testsuite/gas/i386/x86-64-sse-check-none.d,
+       testsuite/gas/i386/x86-64-sse-check-warn.d: Refer to sse-check.d.
+       * testsuite/gas/i386/sse-check.s: Add AES, GFNI, and PCLMUL
+       tests.
+       * testsuite/gas/i386/sse-check-none.s: Replace code by inclusion
+       of sse-check.s.
+       * testsuite/gas/i386/sse-check.d: Adjust expectations.
+       * testsuite/gas/i386/sse-check-error.l,
+       testsuite/gas/i386/x86-64-sse-check-error.l: Likewise.
+       * testsuite/gas/i386/sse-check-warn.e: Likewise.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (operand_size_match): Drop / replace uses of
+       .floatd.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/intel-intel.d: New.
+       * testsuite/gas/i386/i386.exp: Run new test.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_operands): Access operands only
+       after operand count assertion. Sanitize warning text. Fix
+       indentation.
+       * testsuite/gas/i386/avx512_4fmaps-warn.l,
+       gas/i386/x86-64-avx512_4fmaps-warn.l: Adjust expectations.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/x86-64-movd.s: Drop bogus vmovd memory forms.
+       * testsuite/gas/i386/x86-64-movd.d,
+       testsuite/gas/i386/x86-64-movd-intel.d: Adjust expectations.
+
+2018-03-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (operand_type_and_not): New.
+       (build_modrm_byte): Use it to prevent clearing unrelated bits.
+
+2018-03-08  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (ppc_handle_align): Correct last patch.  Really
+       don't emit a group terminating nop for power9.  Simplify cpu
+       tests.
+
+2018-03-08  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (ppc_handle_align): Don't emit a group
+       terminating nop for power9.
+
+2018-03-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/22874
+       * config/tc-i386.c (f32_5): Removed.
+       (f32_8): Likewise.
+       (f32_9): Likewise.
+       (f32_10): Likewise.
+       (f32_11): Likewise.
+       (f32_12): Likewise.
+       (f32_13): Likewise.
+       (f32_14): Likewise.
+       (f16_5): Likewise.
+       (f16_6): Likewise.
+       (f16_7): Likewise.
+       (f16_8): Likewise.
+       (jump_31): Likewise.
+       (alt64_11): Likewise.
+       (alt64_patt): Likewise.
+       (jump_disp8): New.
+       (jump32_disp32): Likewise.
+       (jump16_disp32): Likewise.
+       (alt_11): Likewise.
+       (f32_patt): Updated.
+       (f16_patt): Likewise.
+       (alt_patt): Add alt_11.
+       (i386_align_code): Merged with ...
+       (i386_generate_nops): This.  Rewritten.
+       (fits_in_imm7): Moved before i386_generate_nops.
+       (fits_in_imm31): Likewise.
+       * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Updated to
+       4095.
+       (i386_align_code): Removed.
+       (HANDLE_ALIGN): Rewritten with i386_generate_nops.
+       * doc/as.texinfo: Update limits of control byte for x86 .nops
+       directive.
+       * testsuite/gas/i386/i386.exp: Run nops-7 and x86-64-nops-7.
+       * gas/testsuite/gas/i386/noavx-3.l: Updated.
+       * gas/testsuite/gas/i386/nop-1.d: Likewise.
+       * gas/testsuite/gas/i386/nop-1.s: Likewise.
+       * gas/testsuite/gas/i386/nop-2.d: Likewise.
+       * gas/testsuite/gas/i386/nop-2.s: Likewise.
+       * gas/testsuite/gas/i386/nop-3.d: Likewise.
+       * gas/testsuite/gas/i386/nop-4.d: Likewise.
+       * gas/testsuite/gas/i386/nop-5.d: Likewise.
+       * gas/testsuite/gas/i386/nop-5.s: Likewise.
+       * gas/testsuite/gas/i386/nop-6.d: Likewise.
+       * gas/testsuite/gas/i386/nop-bad-1.l: Likewise.
+       * gas/testsuite/gas/i386/nops-1-core2.d: Likewise.
+       * gas/testsuite/gas/i386/nops-1-i386-i686.d: Likewise.
+       * gas/testsuite/gas/i386/nops-1-i386.d: Likewise.
+       * gas/testsuite/gas/i386/nops-1-i686.d: Likewise.
+       * gas/testsuite/gas/i386/nops-1-k8.d: Likewise.
+       * gas/testsuite/gas/i386/nops-1.d: Likewise.
+       * gas/testsuite/gas/i386/nops-2-core2.d: Likewise.
+       * gas/testsuite/gas/i386/nops-2-i386.d: Likewise.
+       * gas/testsuite/gas/i386/nops-2.d: Likewise.
+       * gas/testsuite/gas/i386/nops-3-i386.d: Likewise.
+       * gas/testsuite/gas/i386/nops-3-i686.d: Likewise.
+       * gas/testsuite/gas/i386/nops-3.d: Likewise.
+       * gas/testsuite/gas/i386/nops-4-i386.d: Likewise.
+       * gas/testsuite/gas/i386/nops-4-i686.d: Likewise.
+       * gas/testsuite/gas/i386/nops-4.d: Likewise.
+       * gas/testsuite/gas/i386/nops-4a-i686.d: Likewise.
+       * gas/testsuite/gas/i386/nops-5-i686.d: Likewise.
+       * gas/testsuite/gas/i386/nops-5.d: Likewise.
+       * gas/testsuite/gas/i386/nops-6.d: Likewise.
+       * gas/testsuite/gas/i386/nops16-1.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nop-1.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nop-2.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nop-5.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-1-core2.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-1-g64.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-1-k8.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-1-pentium.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-1.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-2.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-3.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-4-core2.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-4-k8.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-4.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-5-k8.d: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-5.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-1.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-2.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-3.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-4.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
+       * gas/testsuite/gas/i386/ilp32/x86-64-nops-5.d: Likewise.
+       * gas/testsuite/gas/i386/nops-7.d: New file.
+       * gas/testsuite/gas/i386/nops-7.s: Likewise.
+       * gas/testsuite/gas/i386/x86-64-nops-7.d: Likewise.
+
+2018-03-07  Alan Modra  <amodra@gmail.com>
+
+       * testsuite/gas/ppc/aix.exp: Run for rs6000 too.
+       * testsuite/gas/ppc/ppc.exp: Run more tests for non-ELF targets.
+       * testsuite/gas/ppc/machine.d: Don't run for PE targets.
+
+2018-03-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/tc-arm.c (md_begin): Add NULL pointer check before
+       dereferencing march_ext_opt.
+
+2018-03-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/tc-arm.c (cpu_variant, arm_arch_used, thumb_arch_used,
+       legacy_cpu, legacy_fpu, mcpu_cpu_opt, dyn_mcpu_ext_opt,
+       mcpu_fpu_opt, march_cpu_opt, dyn_march_ext_opt, march_fpu_opt,
+       mfpu_opt, object_arch, selected_cpu): Comment meaning of variables.
+       (dyn_mcpu_ext_opt): Also rename into ...
+       (mcpu_ext_opt): This.
+       (dyn_march_ext_opt): Also rename into ...
+       (march_ext_opt): This.
+       (object_arch): Also rename into ...
+       (selected_object_arch): This and make it a plain arm_feature_set
+       structure.
+       (selected_arch, selected_ext, selected_fpu): New static variables.
+       (mark_feature_used): Fix comments, feature is marked as used iff it is
+       currently allowed.
+       (do_bx): Adapt to change in name and type of object_arch.
+       (md_begin): Set selected_arch rather than mcpu_cpu_opt, selected_ext
+       rather than dyn_mcpu_ext_opt and selected_fpu rather than mfpu_opt.
+       Remove dead code to set default FPU if architecture version is greater
+       than 5.  Set all CPU bits of cpu_variant directly in autodection
+       leaving mcpu_cpu_opt, selected_arch and selected_cpu unset.
+       (arm_parse_extension): Take extension feature set pointer parameter by
+       value rather than by pointer.  Remove allocation code.  Adapt code
+       accordingly.
+       (arm_parse_cpu): Adapt to variable renaming and changes in
+       arm_parse_extension () signature.
+       (arm_parse_arch): Likewise.
+       (aeabi_set_public_attributes): Also set selected_arch and selected_ext
+       in addition to selected_cpu.  Set flags_arch and flags_ext from them
+       instead of selected_cpu.  Adapt to variables renaming and type change.
+       (arm_md_post_relax): Adapt to variable renaming.
+       (s_arm_cpu): Set selcted_cpu_cpu and selected_ext instead of
+       mcpu_cpu_opt and dyn_mcpu_ext_opt.  Set selected_cpu from them and
+       cpu_variant from selected_cpu and selected_fpu.
+       (s_arm_arch): Likewise.
+       (s_arm_object_arch): Adapt to variable renaming.
+       (s_arm_arch_extension): Use ARM_CPU_IS_ANY instead of checking feature
+       set against arm_any.  Check selected_arch rather than *mcpu_cpu_opt.
+       Set selected_ext rather than *dyn_mcpu_ext_opt and remove allocation
+       code.
+       (s_arm_fpu): Set selected_fpu instead of mfpu_opt.  Set all CPU feature
+       bits if in autodetection mode.
+
+2018-03-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (optimize_encoding): Optimize AVX256 and
+       AVX512 vpsub[bwdq] instructions.
+       * testsuite/gas/i386/optimize-1.s: Add tests for AVX256 and
+       AVX512 vpsub[bwdq] instructions.
+       * testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
+       * testsuite/gas/i386/optimize-1.d: Updated.
+       * testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
+
+2018-03-01  Alan Modra  <amodra@gmail.com>
+
+       * configure.ac (ALL_LINGUAS): Add uk.  Sort.
+       * configure: Regenerate.
+
 2018-02-27  H.J. Lu  <hongjiu.lu@intel.com>
 
        * NEWS: Rename .nop to .nops.
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