+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386-intel.c (i386_intel_operand): Also handle DWORD
+ with 64-bit mode branches.
+ * testsuite/gas/i386/x86-64-jump.s: Extend Intel syntax branch
+ operand coverage.
+ * testsuite/gas/i386/x86-64-jump.d: Adjust expectations.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (output_insn): Don't consider Cpu* settings
+ when setting GNU_PROPERTY_X86_FEATURE_2_MMX.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/movdir.s: Add Intel syntax case with
+ operand size specifier.
+ * testsuite/gas/i386/x86-64-movdir.s: Add Intel syntax cases
+ with operand size specifier and wit 32-bit operands.
+ * testsuite/gas/i386/movdir-intel.d,
+ testsuite/gas/i386/movdir.d,
+ testsuite/gas/i386/x86-64-movdir-intel.d,
+ testsuite/gas/i386/x86-64-movdir.d: Adjust expectations.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Arrange for insns with a
+ single non-GPR register operand to not have its suffix guessed
+ from GPR operands. Extend DefaultSize handling to cover PUSH/POP
+ of segment registers.
+ * testsuite/gas/i386/general.s: Add PUSH/POP sreg to .code16gcc
+ set of insns.
+ * testsuite/gas/i386/general.l: Adjust expectations.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Exclude SYSRET alongside
+ FLDENV et al.
+ * testsuite/gas/i386/general.s: Expand .code16gcc set of insns.
+ * testsuite/gas/i386/general.l: Adjust expectations.
+
+2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * as.c (flag_dwarf_cie_version): Change initial value to -1, and
+ update comment.
+ * config/tc-riscv.c (riscv_after_parse_args): Set
+ flag_dwarf_cie_version if it has not already been set.
+ * dwarf2dbg.c (dwarf2_init): Initialise flag_dwarf_cie_version if
+ needed.
+ * testsuite/gas/riscv/default-cie-version.d: New file.
+ * testsuite/gas/riscv/default-cie-version.s: New file.
+
+2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * dw2gencfi.c (output_cie): Error on return column overflow.
+ * testsuite/gas/riscv/cie-rtn-col-1.d: New file.
+ * testsuite/gas/riscv/cie-rtn-col-3.d: New file.
+ * testsuite/gas/riscv/cie-rtn-col.s: New file.
+
+2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-riscv.c (tc_riscv_regname_to_dw2regnum): Lookup CSR
+ names too.
+ * testsuite/gas/riscv/csr-dw-regnums.d: New file.
+ * testsuite/gas/riscv/csr-dw-regnums.s: New file.
+
+2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-riscv.c (struct regname): Delete.
+ (hash_reg_names): Handle value as 'void *'.
+
+2019-11-25 Andrew Pinski <apinski@marvell.com>
+
+ * config/tc-aarch64.c (md_begin): Use correct
+ hash table for uppercase version of hint.
+ * testsuite/gas/aarch64/system-2.s: Extend psb case to uppercase.
+ * testsuite/gas/aarch64/system-2.d: Update.
+
+2019-11-25 Christian Eggers <ceggers@gmx.de>
+
+ * as.h: Define SEC_OCTETS as SEC_ELF_OCTETS if OBJ_ELF.
+ * dwarf2dbg.c: (dwarf2_finish): Set section flag SEC_OCTETS for
+ .debug_line, .debug_info, .debug_abbrev, .debug_aranges, .debug_str
+ and .debug_ranges sections.
+ * write.c (maybe_generate_build_notes): Set section flag
+ SEC_OCTETS for .gnu.build.attributes section.
+ * frags.c (frag_now_fix): Don't divide by OCTETS_PER_BYTE if
+ SEC_OCTETS is set.
+ * symbols.c (resolve_symbol_value): Likewise.
+
+2019-11-25 Christian Eggers <ceggers@gmx.de>
+
+ * dwarf2dbg.c (out_set_addr): Revert 2019-03-13 change.
+ (out_debug_line, out_debug_aranges, out_debug_info): Likewise.
+ * symbols.h (symbol_set_value_now_octets, symbol_octets_p): Remove.
+ * symbols.c (struct symbol_flags): Remove member sy_octets.
+ (symbol_temp_new_now_octets): Don't set symbol_flags::sy_octets.
+ (resolve_symbol_value): Revert: Return octets instead of bytes if
+ sy_octets is set.
+ (symbol_set_value_now_octets): Remove.
+ (symbol_octets_p): Remove.
+
+2019-11-22 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * config/tc-arm.c (arm_ext_crc): New.
+ (crc_ext_armv8): Remove.
+ (insns): Rename crc_ext_armv8 to arm_ext_crc.
+ (arm_cpus): Replace CRC_EXT_ARMV8 with ARM_EXT2_CRC.
+ (armv8a_ext_table, armv8r_ext_table,
+ arm_option_extension_value_table): Redefine the crc
+ extension in terms of ARM_EXT2_CRC.
+ * gas/testsuite/gas/arm/crc-ext.s: New.
+ * gas/testsuite/gas/arm/crc-ext.d: New.
+
+2019-11-20 Alan Modra <amodra@gmail.com>
+
+ PR 24944
+ * atof-generic.c (atof_generic): Increase decimal guard digits.
+ * testsuite/gas/i386/fp.s: Add more tests.
+ * testsuite/gas/i386/fp.d: Update.
+
+2019-11-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * as.c (parse_args): Parse --gdwarf-cie-version option.
+ (flag_dwarf_cie_version): New variable.
+ * as.h (flag_dwarf_cie_version): Declare.
+ * dw2gencfi.c (output_cie): Switch from DW_CIE_VERSION to
+ flag_dwarf_cie_version.
+ * doc/as.texi (Overview): Document --gdwarf-cie-version.
+ * NEWS: Likewise.
+ * testsuite/gas/cfi/cfi.exp: Add new tests.
+ * testsuite/gas/cfi/cie-version-0.d: New file.
+ * testsuite/gas/cfi/cie-version-1.d: New file.
+ * testsuite/gas/cfi/cie-version-2.d: New file.
+ * testsuite/gas/cfi/cie-version-3.d: New file.
+ * testsuite/gas/cfi/cie-version-4.d: New file.
+ * testsuite/gas/cfi/cie-version.s: New file.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (operand_size_match, md_assemble,
+ parse_insn, match_template, process_suffix, output_jump,
+ output_insn, i386_displacement): Adjust jump* field use/
+ handling.
+ * config/tc-i386-intel.c (i386_intel_operand): Likewise.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (struct _i386_insn): Add jumpabsolute field.
+ (operand_type_match): Drop jumpabsolute use.
+ (type_names): Remove OPERAND_TYPE_JUMPABSOLUTE entry.
+ (process_suffix, i386_displacement): Adjust jumpabsolute uses.
+ (match_template, i386_att_operand): Adjust jumpabsolute
+ handling.
+ * config/tc-i386-intel.c (i386_intel_operand): Likewise.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (operand_size_match): Adjust anysize use.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/intel-cmps32.d,
+ testsuite/gas/i386/intel-cmps64.d: Correct regexp closing
+ parentheses placement.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/intel-cmps.s,
+ testsuite/gas/i386/intel-movs.s: Extend.
+ * testsuite/gas/i386/intel-cmps32.d,
+ testsuite/gas/i386/intel-cmps64.d,
+ testsuite/gas/i386/intel-movs32.d,
+ testsuite/gas/i386/intel-movs64.d: Adjust expectations.
+ * testsuite/gas/i386/intel-cmps16.d,
+ testsuite/gas/i386/intel-movs16.d: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2019-11-12 Nelson Chu <nelson.chu@sifive.com>
+
+ * testsuite/gas/riscv/insn.d: Add the f extension to -march option.
+
+2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * config/tc-arm.c (do_vfp_nsyn_push): Move in order to enable it for
+ both fpu_vfp_ext_v1xd and mve_ext and add call to the aliased vstm
+ instruction for mve_ext.
+ (do_vfp_nsyn_pop): Move in order to enable it for both
+ fpu_vfp_ext_v1xd and mve_ext and add call to the aliased vldm
+ instruction for mve_ext.
+ (do_neon_ldm_stm): Add fpu_vfp_ext_v1 and mve_ext checks.
+ (insns): Enable vldm, vldmia, vldmdb, vstm, vstmia, vstmdb, vpop,
+ vpush, and fldd, fstd, flds, fsts for arm_ext_v6t2 instead
+ of fpu_vfp_ext_v1xd.
+ * testsuite/gas/arm/v8_1m-mve.s: New.
+ * testsuite/gas/arm/v8_1m-mve.d: New.
+
+2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * gas/config/tc-arm.c (do_neon_mvn): Allow mve_ext cmode=0xd.
+ * testsuite/gas/arm/mve-vmov-vmvn-vorr-vbic.s: New test.
+ * testsuite/gas/arm/mve-vmov-vmvn-vorr-vbic.d: Likewise.
+
+2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * config/tc-arm.c (s_arm_fpu): Clear selected_cpu fpu bits.
+ (fpu_any): Remove OBJ_ELF guards.
+ * testsuite/gas/arm/fpu-rst.s: New.
+ * testsuite/gas/arm/fpu-rst.d: New.
+ * testsuite/gas/arm/fpu-rst.l: New.
+
+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (type_names): Remove OPERAND_TYPE_ESSEG
+ entry.
+ (md_assemble): Adjust isstring field use. Add assertion.
+ (check_string): Mostly re-write.
+ (i386_index_check): Adjust isstring field use and related code.
+
+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_immext): Remove SSE3, SVME, and
+ MWAITX special case logic.
+ (process_suffix): Replace immext field uses by instance ones.
+ * testsuite/gas/i386/arch-13.s,
+ testsuite/gas/i386/x86-64-arch-3.s: Add CLZERO with operand
+ cases.
+ * testsuite/gas/i386/svme.s: Add 16-bit operand cases.
+ * testsuite/gas/i386/x86-64-specific-reg.s: Drop FIXME comments.
+ * testsuite/gas/i386/arch-13.d,
+ testsuite/gas/i386/mwaitx-reg.l, testsuite/gas/i386/svme.d,
+ testsuite/gas/i386/x86-64-arch-3.d,
+ testsuite/gas/i386/x86-64-mwaitx-reg.l,
+ testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations.
+
+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (operand_type_set, operand_type_and,
+ operand_type_and_not, operand_type_or, operand_type_xor): Handle
+ "instance" field specially.
+ (operand_size_match, md_assemble, match_template, process_suffix,
+ check_byte_reg, check_long_reg, check_qword_reg, check_word_reg,
+ process_operands, build_modrm_byte): Use "instance" instead of
+ "acc" / "inoutportreg" / "shiftcount" fields.
+ (optimize_imm): Adjust comment.
+
+2019-11-11 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/aarch64/illegal-sve2.s: Add smaxp/sminp cases
+ with mismatched 1st and 3rd operands.
+ * testsuite/gas/aarch64/illegal-sve2.l: Adjust expectations.
+
+2019-11-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25167
+ * config/tc-i386.c (match_template): Don't check instruction
+ suffix set from operand.
+ * testsuite/gas/i386/code16.d: New file.
+ * testsuite/gas/i386/code16.s: Likewise.
+ * testsuite/gas/i386/i386.exp: Run code16.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding, build_modrm_byte,
+ check_VecOperations, parse_real_register): Use "class" instead
+ of "regmask" and "regbnd" fields.
+
2019-11-08 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (match_mem_size, operand_size_match,
projects / deliverable / binutils-gdb.git / blobdiff