+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386-intel.c (i386_intel_operand): Also handle DWORD
+ with 64-bit mode branches.
+ * testsuite/gas/i386/x86-64-jump.s: Extend Intel syntax branch
+ operand coverage.
+ * testsuite/gas/i386/x86-64-jump.d: Adjust expectations.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (output_insn): Don't consider Cpu* settings
+ when setting GNU_PROPERTY_X86_FEATURE_2_MMX.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/movdir.s: Add Intel syntax case with
+ operand size specifier.
+ * testsuite/gas/i386/x86-64-movdir.s: Add Intel syntax cases
+ with operand size specifier and wit 32-bit operands.
+ * testsuite/gas/i386/movdir-intel.d,
+ testsuite/gas/i386/movdir.d,
+ testsuite/gas/i386/x86-64-movdir-intel.d,
+ testsuite/gas/i386/x86-64-movdir.d: Adjust expectations.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Arrange for insns with a
+ single non-GPR register operand to not have its suffix guessed
+ from GPR operands. Extend DefaultSize handling to cover PUSH/POP
+ of segment registers.
+ * testsuite/gas/i386/general.s: Add PUSH/POP sreg to .code16gcc
+ set of insns.
+ * testsuite/gas/i386/general.l: Adjust expectations.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Exclude SYSRET alongside
+ FLDENV et al.
+ * testsuite/gas/i386/general.s: Expand .code16gcc set of insns.
+ * testsuite/gas/i386/general.l: Adjust expectations.
+
+2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * as.c (flag_dwarf_cie_version): Change initial value to -1, and
+ update comment.
+ * config/tc-riscv.c (riscv_after_parse_args): Set
+ flag_dwarf_cie_version if it has not already been set.
+ * dwarf2dbg.c (dwarf2_init): Initialise flag_dwarf_cie_version if
+ needed.
+ * testsuite/gas/riscv/default-cie-version.d: New file.
+ * testsuite/gas/riscv/default-cie-version.s: New file.
+
+2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * dw2gencfi.c (output_cie): Error on return column overflow.
+ * testsuite/gas/riscv/cie-rtn-col-1.d: New file.
+ * testsuite/gas/riscv/cie-rtn-col-3.d: New file.
+ * testsuite/gas/riscv/cie-rtn-col.s: New file.
+
+2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-riscv.c (tc_riscv_regname_to_dw2regnum): Lookup CSR
+ names too.
+ * testsuite/gas/riscv/csr-dw-regnums.d: New file.
+ * testsuite/gas/riscv/csr-dw-regnums.s: New file.
+
+2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-riscv.c (struct regname): Delete.
+ (hash_reg_names): Handle value as 'void *'.
+
+2019-11-25 Andrew Pinski <apinski@marvell.com>
+
+ * config/tc-aarch64.c (md_begin): Use correct
+ hash table for uppercase version of hint.
+ * testsuite/gas/aarch64/system-2.s: Extend psb case to uppercase.
+ * testsuite/gas/aarch64/system-2.d: Update.
+
+2019-11-25 Christian Eggers <ceggers@gmx.de>
+
+ * as.h: Define SEC_OCTETS as SEC_ELF_OCTETS if OBJ_ELF.
+ * dwarf2dbg.c: (dwarf2_finish): Set section flag SEC_OCTETS for
+ .debug_line, .debug_info, .debug_abbrev, .debug_aranges, .debug_str
+ and .debug_ranges sections.
+ * write.c (maybe_generate_build_notes): Set section flag
+ SEC_OCTETS for .gnu.build.attributes section.
+ * frags.c (frag_now_fix): Don't divide by OCTETS_PER_BYTE if
+ SEC_OCTETS is set.
+ * symbols.c (resolve_symbol_value): Likewise.
+
+2019-11-25 Christian Eggers <ceggers@gmx.de>
+
+ * dwarf2dbg.c (out_set_addr): Revert 2019-03-13 change.
+ (out_debug_line, out_debug_aranges, out_debug_info): Likewise.
+ * symbols.h (symbol_set_value_now_octets, symbol_octets_p): Remove.
+ * symbols.c (struct symbol_flags): Remove member sy_octets.
+ (symbol_temp_new_now_octets): Don't set symbol_flags::sy_octets.
+ (resolve_symbol_value): Revert: Return octets instead of bytes if
+ sy_octets is set.
+ (symbol_set_value_now_octets): Remove.
+ (symbol_octets_p): Remove.
+
+2019-11-22 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * config/tc-arm.c (arm_ext_crc): New.
+ (crc_ext_armv8): Remove.
+ (insns): Rename crc_ext_armv8 to arm_ext_crc.
+ (arm_cpus): Replace CRC_EXT_ARMV8 with ARM_EXT2_CRC.
+ (armv8a_ext_table, armv8r_ext_table,
+ arm_option_extension_value_table): Redefine the crc
+ extension in terms of ARM_EXT2_CRC.
+ * gas/testsuite/gas/arm/crc-ext.s: New.
+ * gas/testsuite/gas/arm/crc-ext.d: New.
+
+2019-11-20 Alan Modra <amodra@gmail.com>
+
+ PR 24944
+ * atof-generic.c (atof_generic): Increase decimal guard digits.
+ * testsuite/gas/i386/fp.s: Add more tests.
+ * testsuite/gas/i386/fp.d: Update.
+
2019-11-18 Andrew Burgess <andrew.burgess@embecosm.com>
* as.c (parse_args): Parse --gdwarf-cie-version option.
projects / deliverable / binutils-gdb.git / blobdiff