+2018-11-06 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/evex-wig.s: Add vmovd cases.
+ * testsuite/gas/i386/evex-wig.d,
+ testsuite/gas/i386/evex-wig1-intel.d: Adjust expectations.
+
+2018-11-06 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx-wig.s: Add kmovd cases.
+ * testsuite/gas/i386/avx-wig.d: Adjust expectations.
+
+2018-11-06 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx-wig.s,
+ testsuite/gas/i386/x86-64-avx-wig.s: Add vpextrb, vpextrw,
+ vpinsrb, and vpinsrw cases.
+ * testsuite/gas/i386/evex-wig.s: Add vpextrd and vpinsrd cases.
+ * testsuite/gas/i386/avx-wig.d, testsuite/gas/i386/evex-wig.d,
+ testsuite/gas/i386/evex-wig1-intel.d,
+ testsuite/gas/i386/x86-64-avx-wig.d: Adjust expectations.
+
+2018-11-06 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (build_vex_prefix, build_evex_prefix):
+ Consider execution mode when .vexw is not set.
+ * testsuite/gas/i386/avx-wig.s,
+ testsuite/gas/i386/x86-64-avx-wig.s: Add BMI, BMI2, TBM, LWP,
+ vcvtsi2s*, vcvt*2si, vmovd, vpcmpestr*, vpextrd, and vpinsrd
+ cases.
+ * testsuite/gas/i386/evex-wig.s: Add vcvt*si2s*, vcvt*2*si,
+ vextractps, vpextrb, vpextrw, vpinsrb, and vpinsrw cases.
+ * testsuite/gas/i386/x86-64-evex-wig.s: Add vpextrb, vpextrw,
+ vpinsrb, and vpinsrw cases.
+ * testsuite/gas/i386/avx-wig.d, testsuite/gas/i386/evex-wig.d,
+ testsuite/gas/i386/evex-wig1-intel.d,
+ testsuite/gas/i386/x86-64-evex-wig1.d,
+ testsuite/gas/i386/x86-64-evex-wig1-intel.d: Adjust expectations.
+ * testsuite/gas/i386/evex-wig2.d,
+ testsuite/gas/i386/evex-wig2.s: Delete.
+ * testsuite/gas/i386/i386.exp: Drop deleted test.
+
+2018-11-06 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/evex-lig-2.s,
+ testsuite/gas/i386/x86-64-evex-lig-2.s: Add extract and insert
+ cases.
+ * testsuite/gas/i386/evex-lig-2.d,
+ testsuite/gas/i386/x86-64-evex-lig-2.d: Adjust expectations.
+ * testsuite/gas/i386/vex-lig-2.s,
+ testsuite/gas/i386/vex-lig-2.d,
+ testsuite/gas/i386/x86-64-vex-lig-2.s,
+ testsuite/gas/i386/x86-64-vex-lig-2.d: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2018-11-06 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/pseudos.s,
+ testsuite/gas/i386/x86-64-pseudos.s: Add pextrw / vpextrw cases.
+ * testsuite/gas/i386/pseudos.d,
+ testsuite/gas/i386/x86-64-pseudos.d: Adjust expectations.
+
+2018-11-06 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx-wig.s,
+ testsuite/gas/i386/x86-64-avx-wig.s: Add vandp*, vandnp*, vorp*,
+ vcmpeq*, and vcvtss2sd cases.
+ * testsuite/gas/i386/avx2-wig.s,
+ testsuite/gas/i386/x86-64-avx2-wig.s: Drop redundant vmovntdqa
+ case.
+ * testsuite/gas/i386/avx-wig.d, testsuite/gas/i386/avx2-wig.d,
+ testsuite/gas/i386/x86-64-avx-wig.d,
+ testsuite/gas/i386/x86-64-avx2-wig.d: Adjust expectations.
+
+2018-11-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/23854
+ * config/tc-i386.c (output_disp): Disable GOT relaxation with
+ data prefix.
+ * testsuite/gas/i386/mixed-mode-reloc32.d: Updated.
+
+2018-11-01 Thomas Preud'homme <thomas.preudhomme@linaro.org>
+
+ * testsuite/config/default.exp: Define LD, LDFLAGS and
+ ld_elf_shared_opt.
+
+2018-10-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * testsuite/gas/arm/armv8-a+rdma-warning.d: Remove objdump execution.
+
+2018-10-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * testsuite/gas/arm/udf.d: Update expected output.
+
+2018-10-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * testsuite/gas/arm/armv1.d: Assemble for Armv1 and disassemble for
+ Armv2.
+
+2018-10-29 Alan Modra <amodra@gmail.com>
+
+ * Makefile.am (HFILES): Delete struc-symbol.h.
+ * doc/internals.texi: Delete struc-symbol.h reference and out
+ of date local symbol description.
+ * struc-symbol.h: Delete. Move contents to..
+ * symbols.c: ..here.
+ (symbol_on_chain, symbol_symbolS): New functions.
+ * symbols.h (symbol_on_chain, symbol_symbolS): Declare.
+ * cgen.c: Don't #include struc-symbol.h.
+ (gas_cgen_parse_operand): Don't test for local_symbol using
+ bsym, instead call symbol_symbolS. Use symbol_get_bfdsym.
+ (weak_operand_overflow_check, make_right_shifted_expr): Use
+ symbol accessors.
+ * config/obj-coff.c: Don't #include struc-symbol.h.
+ (GET_FILENAME_STRING): Delete.
+ * config/obj-elf.c: Don't #include struc-symbol.h.
+ (elf_file_symbol): Use symbol accessors.
+ (elf_adjust_symtab): Call symbol_on_chain.
+ * config/obj-evax.c: Don't #include struc-symbol.h.
+ * config/tc-nds32.c: Likewise.
+ * config/tc-rl78.c: Likewise.
+ * config/tc-rx.c: Likewise.
+ * config/tc-alpha.c: Likewise.
+ (add_to_link_pool, s_alpha_comm): Use symbol accessors.
+ * config/tc-arc.c: Don't #include struc-symbol.h.
+ (arc_check_relocs): Use symbol accessors, testing gas symbol
+ section rather than bfd symbol section.
+ * config/tc-avr.c: Don't #include struc-symbol.h.
+ (avr_patch_gccisr_frag): Use symbol accessors.
+ * config/tc-bfin.c: Don't #include struc-symbol.h.
+ (bfin_loop_beginend): Use symbol accessors.
+ * config/tc-csky.c: Don't #include struc-symbol.h.
+ (v2_work_movih, v2_work_ori): Use symbol accessors. Check for
+ absolute symbol as well as O_constant.
+ * config/tc-riscv.c: Don't #include struc-symbol.h.
+ (riscv_pre_output_hook): Use symbol accessors.
+ * config/tc-s390.c: Don't #include struc-symbol.h.
+ (s390_literals): Use symbol accessors.
+ * config/tc-score.c (s3_build_la_pic, s3_build_lwst_pic): Use
+ symbol accessors.
+ (s3_relax_branch_inst16, s3_relax_cmpbranch_inst32): Don't
+ test symbol bsym.
+ * config/tc-score7.c: Don't #include struc-symbol.h.
+ (s7_build_la_pic, s7_build_lwst_pic): Use symbol accessors.
+ (s7_b32_relax_to_b16): Don't test symbol bsym.
+ * config/tc-sh.c: Don't #include struc-symbol.h.
+ (insert_loop_bounds): Use symbol accessors.
+ (sh_frob_section): Remove bogus symbol canonicalization.
+ * config/tc-tic54x.c: Don't #include struc-symbol.h.
+ (tic54x_bss): Use symbol accessors.
+ * config/tc-tilegx.c: Don't #include struc-symbol.h.
+ (emit_tilegx_instruction, tilegx_parse_name): Use symbol accessors.
+ * config/tc-tilepro.c: Don't #include struc-symbol.h.
+ (emit_tilepro_instruction, tilepro_parse_name): Use accessors.
+ * config/tc-xtensa.c: Don't #include struc-symbol.h.
+ (xg_assemble_vliw_tokens): Use symbol accessors.
+ (xg_order_trampoline_chain): Likewise.
+ * ehopt.c: Don't #include struc-symbol.h.
+ (check_eh_frame): Correct local symbol test. Use symbol accessors.
+ * write.c: Don't #include struc-symbol.h.
+ (create_note_reloc, maybe_generate_build_notes): Use symbol accessors.
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2018-10-28 Alan Modra <amodra@gmail.com>
+
+ PR 23837
+ * config/tc-hppa.c: Don't include struc-symbol.h.
+ (pa_build_unwind_subspace): Call symbol_get_frag rather than
+ referencing sy_frag.
+
+2018-10-23 John Darrington <john@darrington.wattle.id.au>
+
+ * config/tc-s12z.c (md_apply_fix): Handle BFD_RELOC_16 for fixups
+ without a symbol.
+
+2018-10-22 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/all/simple-forward.d,
+ * testsuite/gas/all/simple-forward.s: New test.
+ * testsuite/gas/all/gas.exp: Run it.
+ * testsuite/gas/all/eqv-dot.d: xfail tic30 and tic54x.
+
+2018-10-22 Alan Modra <amodra@gmail.com>
+
+ * config/tc-alpha.c (md_apply_fix): Handle BFD_RELOC_8 for fixups
+ without a symbol.
+ * testsuite/gas/all/gas.exp: Don't xfail forward test here..
+ * testsuite/gas/all/forward.d: ..do so here, removing alpha.
+
+2018-10-22 Alan Modra <amodra@gmail.com>
+
+ PR 23040
+ * symbols.c (get_real_sym): New function.
+ (symbol_same_p): Use get_real_sym.
+ (symbol_clone_if_forward_ref): Save real original add_symbol and
+ op_symbol for comparison against that returned from lookup or
+ recursive calls.
+ * dwarf2dbg.c (set_or_check_view): Use expr_section for
+ expression symbols, not absolute_section.
+ (dwarf2_directive_loc): Check symbol_equated_p and tidy cloning
+ of view symbols.
+ * read.c (s_leb128): Don't use deferred_expression.
+
+2018-10-20 Alan Modra <amodra@gmail.com>
+
+ PR 23800
+ * expr.c (expr): Don't simplify expressions involving forward_ref
+ symbols when mode is expr_defer.
+ * config/tc-spu.c (spu_cons): Parse expression using normal
+ expression evaluation if @ppu is not detected.
+ * testsuite/gas/all/eqv-dot.d,
+ * testsuite/gas/all/eqv-dot.s: New test.
+ * testsuite/gas/all/gas.exp: Run it.
+
+2018-10-19 Tamar Christina <tamar.christina@arm.com>
+
+ * testsuite/gas/arm/undefined-insn-arm.d: Widen pe skip.
+ * testsuite/gas/arm/undefined-insn-thumb.d: Likewise.
+
+2018-10-19 Tamar Christina <tamar.christina@arm.com>
+
+ * testsuite/gas/arm/undefined-insn-arm.d: New test.
+ * testsuite/gas/arm/undefined-insn-thumb.d: New test.
+ * testsuite/gas/arm/undefined-insn.s: New test.
+
+2018-10-19 Fredrik Noring <noring@nocrew.org>
+
+ * testsuite/gas/mips/r5900.s: Extend the R5900 short loop fix
+ test with border cases.
+ * testsuite/gas/mips/r5900.d: Add extra expected disassembly.
+ * config/tc-mips.c (can_swap_branch_p): Clarify the R5900 short
+ loop hardware bug conditions. Correct note on the R5900
+ instruction count short loop fix.
+
+2018-10-16 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * testsuite/gas/aarch64/illegal-dotproduct.d: New test.
+ * testsuite/gas/aarch64/illegal-dotproduct.l: New test.
+ * testsuite/gas/aarch64/illegal-dotproduct.s: New test.
+
+
+2018-10-15 Alan Modra <amodra@gmail.com>
+
+ PR 23534
+ * as.c (main): Exit with fatal error if bfd_init returns an
+ unexpected value.
+
+2018-10-11 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/xmmword.s: Add MOVQ / VMOVQ cases.
+ * testsuite/gas/i386/xmmword.l: Adjust expectations.
+
+2018-10-10 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (parse_insn, process_suffix): Replace
+ opcode_modifier.size<N> uses.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): Add new "ssbs".
+ * doc/c-aarch64.texi: Document the same.
+ * testsuite/gas/aarch64/ssbs-illegal1.d: New test.
+ * testsuite/gas/aarch64/ssbs-illegal1.l: New test.
+ * testsuite/gas/aarch64/ssbs-illegal2.d: New test.
+ * testsuite/gas/aarch64/ssbs-illegal2.l: New test.
+ * testsuite/gas/aarch64/ssbs.s: New test.
+ * testsuite/gas/aarch64/ssbs1.d: Test with +ssbs
+ * testsuite/gas/aarch64/ssbs2.d: Test with armv8.5-a.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * testsuite/gas/aarch64/sysreg-4.s: Test registers
+ scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
+ * testsuite/gas/aarch64/sysreg-4.d: Likewise.
+ * testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (parse_bti_operand): New.
+ (process_omitted_operand): Add case for AARCH64_OPND_BTI_TARGET.
+ (parse_operands): Likewise.
+ * testsuite/gas/aarch64/system.d: Update for BTI.
+ * testsuite/gas/aarch64/bti.s: New.
+ * testsuite/gas/aarch64/bti.d: New.
+ * testsuite/gas/aarch64/illegal-bti.d: New.
+ * testsuite/gas/aarch64/illegal-bti.l: New.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): New "rng" option.
+ * doc/c-aarch64.texi: Document the same.
+ * testsuite/gas/aarch64/sysreg-4.s: Test both instructions.
+ * testsuite/gas/aarch64/sysreg-4.d: Likewise.
+ * testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * testsuite/gas/aarch64/sysreg-4.s: Test instruction.
+ * testsuite/gas/aarch64/sysreg-4.d: Likewise.
+ * testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (aarch64_sys_regs_sr_hsh): New.
+ (parse_operands): Add entry for AARCH64_OPND_SYSREG_SR.
+ (md_begin): Allocate and initialize aarch64_sys_regs_sr_hsh
+ with aarch64_sys_regs_sr.
+ (aarch64_features): Add new "predres" option for older
+ architectures.
+ * doc/c-aarch64.texi: Document the same.
+ * testsuite/gas/aarch64/sysreg-4.s: New.
+ * testsuite/gas/aarch64/sysreg-4.d: New.
+ * testsuite/gas/aarch64/illegal-sysreg-4.d: New.
+ * testsuite/gas/aarch64/illegal-sysreg-4.l: New.
+ * testsuite/gas/aarch64/predres.s: New.
+ * testsuite/gas/aarch64/predres.d: New.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): Add new "sb" option
+ for older architectures.
+ * doc/c-aarch64.texi: Document the same.
+ * testsuite/gas/aarch64/sb.s: New.
+ * testsuite/gas/aarch64/sb.d: New.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * testsuite/gas/aarch64/armv8_5-a-dp.s: New.
+ * testsuite/gas/aarch64/armv8_5-a-dp.d: New.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (aarch64_archs): New entry for armv8.5-a.
+ * doc/c-aarch64.texi: Add documentation for the same.
+
+2018-10-05 H.J. Lu <hongjiu.lu@intel.com>
+
+
+ * testsuite/gas/i386/se1.s: Add enclv.
+ * testsuite/gas/i386/x86-64-se1.s: Likewise.
+ * testsuite/gas/i386/se1.d: Updated.
+ * testsuite/gas/i386/x86-64-se1.d: Likewise.
+
+2018-10-05 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-arm.c (arm_ext_predres): New.
+ (insns): Add new cfprctx, dvprctx and cpprctx instructions.
+ (arm_extensions): Add "predres".
+ * doc/c-arm.texi: Document the above.
+ * testsuite/gas/arm/predres-bad.d: New test.
+ * testsuite/gas/arm/predres-bad.l: New test.
+ * testsuite/gas/arm/predres.s: New test.
+ * testsuite/gas/arm/predres1.d: New test.
+ * testsuite/gas/arm/predres2.d: New test.
+
+2018-10-05 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-arm.c (arm_ext_sb): New.
+ (insns): Add new sb instruction.
+ (arm_extensions): Add "sb".
+ * doc/c-arm.texi: Document the above.
+ * testsuite/gas/arm/sb-bad.d: New test.
+ * testsuite/gas/arm/sb-bad.l: New test.
+ * testsuite/gas/arm/sb-thumb1.d: New test.
+ * testsuite/gas/arm/sb-thumb2.d: New test.
+ * testsuite/gas/arm/sb.s: New test.
+ * testsuite/gas/arm/sb1.d: New test.
+ * testsuite/gas/arm/sb2.d: New test.
+
+2018-10-05 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-arm.c (arm_archs): New entry for armv8.5-a.
+ (cpu_arch_ver): Likewise.
+ * doc/c-arm.texi: Add documentation for the same.
+ * testsuite/gas/arm/attr-march-armv8_5-a.d: New.
+
+2018-10-05 Stafford Horne <shorne@gmail.com>
+
+ * doc/Makefile.am (CPU_DOCS): Add entry for OpenRISC.
+ * doc/Makefile.in: Regenerated.
+ * doc/all.texi: Set OPENRISC.
+ * doc/as.texi: Document OpenRISC.
+ * doc/c-or1k.texi: New file.
+
+2018-10-05 Stafford Horne <shorne@gmail.com>
+
+ * testsuite/gas/or1k/allinsn.s: Add instruction tests for
+ l.muld, l.muldu, l.macu, l.msb, l.msbu.
+ * testsuite/gas/or1k/allinsn.d: Add test results for new
+ instructions.
+
+2018-10-05 Richard Henderson <rth@twiddle.net>
+
+ * config/tc-or1k.c (or1k_apply_fix): Add BFD_RELOC_OR1K_TLS_GD_PG21,
+ BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_PG21,
+ BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_PG21,
+ BFD_RELOC_OR1K_TLS_IE_LO13.
+ * testsuite/gas/or1k/allinsn.s: Add test for l.adrp.
+ * testsuite/gas/or1k/allinsn.d: Add test results for new
+ instructions.
+ * testsuite/gas/or1k/reloc-1.s: Add tests to generate
+ R_OR1K_PLTA26, R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
+ R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13,
+ R_OR1K_TLD_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_LO13, R_OR1K_SLO13
+ relocations.
+ * testsuite/gas/or1k/reloc-1.d: Add relocation results for
+ tests.
+ * testsuite/gas/or1k/reloc-2.s: Add negative tests for store to
+ gotpo().
+ * testsuite/gas/or1k/reloc-2.l: Add expected error test results.
+
+2018-10-05 Richard Henderson <rth@twiddle.net>
+
+ * testsuite/gas/or1k/allinsn.d (l_ha): Add result for ha() relocation.
+ * testsuite/gas/or1k/allinsn.s (l_ha): Add test for ha() relocations.
+ * testsuite/gas/or1k/allinsn.exp: Renamed to or1k.exp.
+ * testsuite/gas/or1k/or1k.exp: Add reloc-2 list test.
+ * testsuite/gas/or1k/reloc-1.d: New file.
+ * testsuite/gas/or1k/reloc-1.s: New file.
+ * testsuite/gas/or1k/reloc-2.l: New file.
+ * testsuite/gas/or1k/reloc-2.s: New file.
+
+2018-10-03 Tamar Christina <tamar.christina@arm.com>
+
+ * testsuite/gas/aarch64/sve-movprfx_1.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_1.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_10.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_10.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_10.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_11.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_11.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_12.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_12.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_13.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_13.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_13.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_14.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_14.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_14.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_15.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_15.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_15.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_16.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_16.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_17.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_17.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_17.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_18.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_18.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_18.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_19.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_19.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_2.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_2.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_2.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_20.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_20.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_20.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_21.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_21.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_22.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_22.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_22.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_23.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_23.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_23.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_24.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_24.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_24.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_25.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_25.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_25.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_26.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_26.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_26.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_3.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_3.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_3.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_4.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_4.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_4.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_5.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_5.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_6.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_6.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_6.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_7.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_7.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_7.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_8.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_8.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_8.s: New test.
+ * testsuite/gas/aarch64/sve-movprfx_9.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx_9.l: New test.
+ * testsuite/gas/aarch64/sve-movprfx_9.s: New test.
+
+2018-10-03 Tamar Christina <tamar.christina@arm.com>
+
+ * testsuite/gas/aarch64/sve-movprfx.d: New test.
+ * testsuite/gas/aarch64/sve-movprfx.s: New test.
+ * testsuite/gas/aarch64/sve.d: Refactor.
+ * testsuite/gas/aarch64/sve.s: Refactor.
+ * testsuite/gas/aarch64/sysreg-diagnostic.d: Update.
+
+2018-10-03 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-aarch64.c (force_automatic_sequence_close,
+ aarch64_frob_section): New.
+ * config/tc-aarch64.h (tc_frob_section, aarch64_frob_section): New.
+
+2018-10-03 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-aarch64.c (output_operand_error_report): Order warnings.
+
+2018-10-03 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-aarch64.c (now_instr_sequence):
+ (*insn_sequence, now_instr_sequence): New.
+ (output_operand_error_record, do_encode): Add insn_sequence.
+ (md_assemble): Update insn_sequence.
+ (try_to_encode_as_unscaled_ldst, fix_mov_imm_insn, fix_insn):
+ Pass insn_sequence.
+ * config/tc-aarch64.h (struct aarch64_segment_info_type):
+ Add insn_sequence.
+
+2018-10-02 Palmer Dabbelt <palmer@sifive.com>
+
+ * testsuite/gas/riscv/fence-tso.d: New file.
+ * testsuite/gas/riscv/fence-tso.s: Likewise.
+
+2018-09-26 Sandra Loosemore <sandra@codesourcery.com>
+
+ * testsuite/gas/all/gas.exp: Skip "Output file must be distinct
+ from input" test on Windows host.
+
+2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/23691
+ * Makefile.am (bfin-parse.c): Depend on $(srcdir)/../bfd/reloc.c.
+ (rl78-parse.c): Likewise.
+ (rx-parse.c): Likewise.
+ * Makefile.in: Regenerated.
+
+2018-09-21 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/avr/large-debug-line-table.d: Update.
+
+2018-09-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/23695
+ * testsuite/gas/elf/dwarf2-11.d: Update expected outputs of
+ "readelf -wL".
+ * testsuite/gas/elf/dwarf2-12.d: Likewise.
+ * testsuite/gas/elf/dwarf2-13.d: Likewise.
+ * testsuite/gas/elf/dwarf2-14.d: Likewise.
+ * testsuite/gas/elf/dwarf2-15.d: Likewise.
+ * testsuite/gas/elf/dwarf2-16.d: Likewise.
+ * testsuite/gas/elf/dwarf2-17.d: Likewise.
+ * testsuite/gas/elf/dwarf2-18.d: Likewise.
+ * testsuite/gas/elf/dwarf2-5.d: Likewise.
+ * testsuite/gas/elf/dwarf2-6.d: Likewise.
+ * testsuite/gas/elf/dwarf2-7.d: Likewise.
+
+2018-09-20 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/tc-s12z.c (lex_opr): Use an auxiliary unsigned variable
+ in encoding a constant operand.
+
+2018-09-20 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/tc-ppc.c (ppc_dwsect): Use `valueT' rather than
+ `offsetT' as the type of `flag'.
+
+2018-09-20 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/tc-arc.c (md_number_to_chars_midend): Append `ull' to
+ large constants.
+
+2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
+
+ * config/tc-nds32.c: Remove the unused target features.
+ (nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp,
+ nds32_set_elf_flags_by_insn, nds32_insert_relax_entry,
+ nds32_apply_fix): Likewise.
+ (nds32_no_ex9_begin): Removed.
+ * config/tc-nds32.c (add_mapping_symbol_for_align,
+ make_mapping_symbol, add_mapping_symbol): New functions.
+ * config/tc-nds32.h (enum mstate): New.
+ (nds32_segment_info_type): Likewise.
+ * configure.ac (--enable-dsp-ext, --enable-zol-ext): New options.
+ * config.in: Regenerated.
+ * configure: Regenerated.
+ * config/tc-nds32.c (nds32_dx_regs):
+ Set the value according to the configuration.
+ (nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext):
+ Likewise.
+ (nds32_dsp_ext): New variable. Set the value according to the
+ configuration.
+ (nds32_zol_ext): Likewise.
+ (asm_desc, nds32_pseudo_opcode_table): Make them static.
+ (nds32_set_elf_flags_by_insn): Updated.
+ (nds32_check_insn_available): Updated.
+ (nds32_str_tolower): New function.
+ * config/tc-nds32.c (relax_table): Updated.
+ (md_begin): Updated.
+ (md_assemble): Use XNEW macro to allocate space for `insn.info',
+ and then remember to free it.
+ (md_section_align): Cast (-1) to ValueT.
+ (nds32_get_align): Cast (~0U) to addressT.
+ (nds32_relax_branch_instructions): Updated.
+ (md_convert_frag): Add new local variable `final_r_type'.
+ (invalid_prev_frag): Add new bfd_boolean parameter `relax'.
+ All callers changed.
+ * config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field.
+ (struct nds32_hint_map): Add `option_list' field.
+ (struct suffix_name, suffix_table): Remove the unused `pic' field.
+ (do_pseudo_b, do_pseudo_bal): Remove the suffix checking.
+ (do_pseudo_la_internal, do_pseudo_pushpopm): Indent.
+ (relax_hint_bias, relax_hint_id_current): New static variables.
+ (reset_bias, relax_hint_begin): New variables.
+ (nds_itoa): New function.
+ (CLEAN_REG, GET_OPCODE): New macros.
+ (struct relax_hint_id): New.
+ (nds32_relax_hint): For .relax_hint directive, we can use `begin'
+ and `end' to mark the relax pattern without giving exactly id number.
+ (nds32_elf_append_relax_relocs): Handle the case that the .relax_hint
+ directives are attached to pseudo instruction.
+ (nds32_elf_save_pseudo_pattern): Change the second parameter from
+ instruction's opcode to byte code.
+ (nds32_elf_build_relax_relation): Add new bfd_boolean parameter
+ `pseudo_hint'.
+ (nds32_lookup_pseudo_opcode): Fix the overflow issue.
+ (enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT.
+ (nds32_elf_record_fixup_exp, relax_ls_table, hint_map,
+ nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name):
+ Updated.
+ * config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6.
+ (enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and
+ NDS32_RELAX_HINT_LS into NDS32_RELAX_HINT_LALS. Add
+ NDS32_RELAX_HINT_LA_PLT, NDS32_RELAX_HINT_LA_GOT and
+ NDS32_RELAX_HINT_LA_GOTOFF.
+ * config/tc-nds32.h (relax_ls_table): Add floating load/store
+ to gp relax pattern.
+ (hint_map, nds32_find_reloc_table): Likewise.
+ * configure.ac: Define NDS32_LINUX_TOOLCHAIN.
+ * configure: Regenerated.
+ * config.in: Regenerated.
+ * config/tc-nds32.h (enum nds32_ramp): Updated.
+ (enum nds32_relax_hint_type): Likewise.
+ * config/tc-nds32.c: Include "errno.h" and "limits.h".
+ (relax_ls_table): Add TLS relax patterns.
+ (nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on
+ each instructions of TLS patterns.
+ (nds32_elf_record_fixup_exp): Updated.
+ (nds32_apply_fix): Likewise.
+ (suffix_table): Add TLSDESC suffix.
+
+2018-09-18 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-aarch64.c (output_operand_error_report): Apply filtering to
+ current instead of head message.
+
+2018-09-17 Kito Cheng <kito@andestech.com>
+
+ * testsuite/gas/riscv/bge.d: New.
+ * testsuite/gas/riscv/bge.s: Likewise.
+
2018-09-17 H.J. Lu <hongjiu.lu@intel.com>
PR gas/23670
projects / deliverable / binutils-gdb.git / blobdiff