+Fri Jan 3 17:10:33 1997 Richard Henderson <rth@tamu.edu>
+
+ * config/obj-elf.c (elf_file_symbol): When using ECOFF debugging,
+ pass on the new file hook.
+
+ * config/tc-alpha.c (alpha_fix_adjustable): Not quite the same as
+ !alpha_force_relocation, as local LITERALs can be adjusted to be
+ relative to the section.
+
+Fri Jan 3 12:09:24 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-coff.c (yank_symbols): If tc_frob_coff_symbol is
+ defined, call it.
+ * config/tc-m68k.c (tc_frob_symbol): Check whether text label is
+ aligned to odd boundary.
+ (tc_frob_coff_symbol): Define.
+
+ * doc/as.texinfo (Set): Change parenthesized @xref to @pxref.
+
+ * macro.c (macro_expand_body): In MRI mode, just copy a single &.
+
+ * config/tc-m68k.c (m68k_ip): Call frag_grow before adding a
+ PCINDEX frag. From Ronald F. Guilmette <rfg@monkeys.com>.
+
+ * config/tc-m68k.c (m68k_ip): Accept 'B' as a size for an
+ immediate value.
+ (md_assemble): If the size is 'B', set fx_signed.
+ (md_apply_fix_2): Use fx_signed when checking for overflow.
+
+ * write.h (struct fix): Add fx_signed field.
+ * write.c (fix_new_internal): Initialize fx_no_overflow and
+ fx_signed fields.
+ (fixup_segment): Use fx_signed when checking for overflow.
+ * config/obj-coff.c (fixup_segment): Check fx_no_overflow and
+ fx_signed when checking for overflow.
+
+Thu Jan 2 13:37:29 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * NOTES, NOTES.config: Removed. These are rarely, if ever,
+ updated, and all the useful information is in doc/internals.texi.
+
+ Based on patch from Ronald F. Guilmette <rfg@monkeys.com>:
+ * read.c (read_a_source_file): Check for conditional operators
+ before doing an MRI pending alignment.
+ * config/tc-m68k.h (m68k_conditional_pseudoop): Declare.
+ (tc_conditional_pseudop): Define.
+ * config/tc-m68k.c (m68k_conditional_pseudop): New function.
+ * doc/internals.texi (CPU backend): Describe
+ tc_conditional_pseudoop.
+
+ Based on patch from Ronald F. Guilmette <rfg@monkeys.com>:
+ * config/tc-m68k.c (m68k_rel32_from_cmdline): New static
+ variable.
+ (md_begin): Check m68k_rel32_from_cmdline before setting
+ m68k_rel32.
+ (m68k_mri_mode_change): Likewise.
+ (md_longopts): Add --disp-size-default-16 and
+ --disp-size-default-32.
+ (md_parse_option): Handle new options.
+ (md_show_usage): Mention new options.
+ * doc/c-m68k.texi (M68K-Opts): Document new options.
+
+ Based on patch from Ronald F. Guilmette <rfg@monkeys.com>:
+ * config/tc-m68k.c (m68k_index_width_default): New static
+ variable.
+ (m68k_ip): Use m68k_index_width_default to set the size of a base
+ register whose size was not given.
+ (md_longopts): Add --base-size-default-16 and
+ --base-size-default-32.
+ (md_parse_option): Handle new options.
+ (md_show_usage): Mention new options.
+ * doc/c-m68k.texi (M68K-Opts): Document new options.
+
+ * doc/c-mips.texi: Mention ISA level 4, and the -mips16 option.
+
+ * configure.in: Recognize mips-*-linux* target.
+ * configure: Rebuild.
+
+ * config/tc-mips.c (load_register): Rewrite 64 bit handling to
+ work if valueT is only 32 bits.
+
+ * config/tc-mips.c: Throughout, check target_big_endian rather
+ than byte_order.
+ (byte_order): Remove.
+ (mips_init_after_args): Remove.
+ * config/tc-mips.h (LITTLE_ENDIAN, BIG_ENDIAN): Don't define.
+ (mips_init_after_args): Don't declare.
+ (tc_init_after_args): Don't define.
+
+ * config/tc-mips.h (tc_frob_after_relocs): Define if
+ OBJ_MAYBE_ELF.
+ (mips_elf_final_processing): Likewise.
+ (ELF_TC_SPECIAL_SECTIONS): Likewise.
+
+start-sanitize-v850
+Tue Dec 31 15:12:35 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config/tc-v850.c (md_assemble): If this is sst.{h,w} or
+ sld.{h,w} and the operand is relocatable, adjust the adend by
+ shifting it right one bit.
+
+end-sanitize-v850
+Tue Dec 31 12:56:41 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * read.c (read_a_source_file): Check mri_pending_align after
+ checking for a macro. From Ronald F. Guilmette
+ <rfg@monkeys.com>.
+
+ * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
+
+ * config/tc-sparc.c (md_apply_fix3): Rename from md_apply_fix, and
+ add segment argument. If OBJ_ELF, treat a relocation against a
+ symbol in a linkonce section like a relocation against an external
+ symbol.
+ * config/tc-sparc.h (MD_APPLY_FIX3): Define.
+
+Mon Dec 30 11:35:40 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (mips16_macro): Add case for M_ABS.
+
+Fri Dec 27 22:51:51 1996 Fred Fish <fnf@cygnus.com>
+
+ * NOTES.config (Implementation): as.h #define's "GAS" not "gas",
+ includes config.h instead of host.h, tc.h instead of tp.h, and
+ targ-env.h instead of target-environment.h.
+ Also, obj-format.h includes targ-cpu.h instead of
+ target-processor.h.
+start-sanitize-tic80
+ * configure.in (case ${generic_target}): Add tic80-*-coff entry.
+ * configure: Rebuild with autoconf.
+ * config/obj-coff.h (coff/tic80.h): Include if TC_TIC80 defined.
+ (TARGET_FORMAT): Define to "coff-tic80".
+ * config/tc-tic80.c: New file for TIc80 support.
+ * config/tc-tic80.h: New file for TIc80 support.
+end-sanitize-tic80
+
+Fri Dec 27 11:42:29 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * doc/as.texinfo (M): Mention explicitly that -M changes macro
+ handling.
+
+Thu Dec 19 12:06:08 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * write.c (adjust_reloc_syms): If the fixup symbol has been
+ equated to an undefined symbol, convert the fixup to being against
+ the target symbol. Remove obsolete code handling a special case
+ for i386 PIC.
+
+Wed Dec 18 22:54:39 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-make.sed: Use NewFolderRecursive for installation.
+
+start-sanitize-d10v
+Wed Dec 18 16:00:42 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (do_assemble): Correct previous bug fix.
+
+Wed Dec 18 15:27:40 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (md_assemble): Fix bug which caused
+ second instruction in a line to be case sensitize. PR11312
+
+end-sanitize-d10v
+Wed Dec 18 10:08:46 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10200.c (mn10200_insert_operand): Don't
+ range check operands with MN10200_OPERAND_NOCHECK set.
+ (check_operand): Likewise.
+
+Tue Dec 17 10:59:32 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c: Undo part of last Friday's alignment changes.
+ (md_begin): Always align the text section to a four byte
+ boundary.
+ (append_insn): Remove call to record_align.
+
+ * config/tc-mips.c (insn_label): Remove.
+ (struct insn_label_list): Define.
+ (insn_labels, free_insn_labels): New static variables.
+ (mips_clear_insn_labels): New static function.
+ (append_insn): Mark all mips16 text labels, and make them odd.
+ Handle all labels after emitting a nop, not just one. Call
+ mips_clear_insn_labels rather than just clearing insn_label.
+ (mips_emit_delays): Add insns parameter, and use it to decide
+ whether to mark mips16 labels. Handle all labels, not just one.
+ Force mips16 labels to be odd. Change all callers.
+ (mips16_immed): Don't check for an odd branch target.
+ (md_apply_fix): Don't check mips16 mode for a branch reloc.
+ (mips16_extended_frag): Ignore the low bit in a branch target.
+ (md_convert_frag): Likewise.
+ (mips_no_prev_insn): Call mips_clear_insn_labels rather than just
+ clearing insn_label.
+ (mips_align, mips_flush_pending_output, s_cons): Likewise.
+ (s_float_cons, s_gpword): Likewise.
+ (s_align): Use insn_labels rather than insn_label.
+ (s_cons, s_float_cons, s_gpword): Likewise.
+ (mips_frob_file_after_relocs): New function.
+ (mips_define_label): Rewrite to add to insn_labels list.
+ * config/tc-mips.h (tc_frob_file_after_relocs): Define.
+ * ecoff.c (ecoff_build_symbols): If the size of a function comes
+ out odd, increment it.
+
+ * config/tc-mips.c (append_insn): Only update prev_insn when not
+ reordering if place is NULL.
+
+ * config/tc-mips.c (mips16_ip): Check for a missing expression
+ when using the register indirect addressing mode.
+
+Mon Dec 16 10:08:46 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10200.c (mn10200_insert_operand): Don't
+ check 24bit operands for overflow.
+ (check_operand): Likewise.
+
+Mon Dec 16 11:50:40 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * doc/as.texinfo (Section): Document how to use the .section
+ pseudo-op for COFF and ELF.
+
+Sun Dec 15 15:26:37 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * write.c (adjust_reloc_syms): Fix linkonce check for ELF.
+
+Sat Dec 14 22:37:27 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (prev_insn_reloc_type): New static variable.
+ (RELAX_MIPS16_ENCODE): Add dslot and jal_dslot arguments, and
+ store them. Adjust other RELAX_MIPS16 macros.
+ (RELAX_MIPS16_DSLOT): Define.
+ (RELAX_MIPS16_JAL_DSLOT): Define.
+ (append_insn): Pass new arguments to RELAX_MIPS16_ENCODE. Correct
+ handling of whether previous instruction has a fixup. Set
+ prev_insn_reloc_type.
+ (mips_no_prev_insn): Clear prev_insn_reloc_type.
+ (mips16_extended_frag): Use the right base address for a PC
+ relative add or load.
+ (md_convert_frag): Likewise. If a PC relative add or load is
+ used, record the alignment for the section.
+
+Fri Dec 13 13:00:33 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * write.c (adjust_reloc_syms): Don't reduce a reloc against a
+ linkonce section into a reloc against the section symbol.
+
+ * config/tc-mips.c (mips16_macro): Remove nop instructions after
+ branch instructions.
+
+ * config/tc-mips.c (md_begin): If configured for an embedded ELF
+ system, don't set the section alignment to 2**4.
+ (s_change_sec): Likewise.
+ (append_insn): Call record_alignment for the section.
+ (md_section_align): Don't align the section size for an embedded
+ ELF system.
+
+Thu Dec 12 16:40:47 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * write.c (adjust_reloc_syms): Make sure that symbols are
+ resolved; expression symbols may have been skipped.
+ * config/obj-coff.c (fixup_segment): Likewise.
+
+Thu Dec 12 15:18:21 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config/tc-ppc.c (ppc_elf_suffix): Move @plt to
+ BFD_RELOC_24_PLT_PCREL relocation.
+ (md_apply_fix3): Support BFD_RELOC_24_PLT_PCREL.
+
+start-sanitize-d10v
+Tue Dec 10 13:51:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (write_2_short): Remove code that called
+ parallel_ok() when the programmer specified parallel instructions.
+
+end-sanitize-d10v
+Tue Dec 10 12:23:19 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.c (md_assemble): Update to handle endianness
+ issues correctly.
+
+ * config/tc-mn10200.c (md_assemble): Opcode 0x0 is valid!
+ * config/tc-mn10300.c (md_assemble): Likewise.
+
+Tue Dec 10 11:37:14 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (append_insn): Make sure there is enough room
+ in a frag after a mips16 instruction to switch it with a jump
+ instruction.
+
+ * config/tc-mips.c (mips16_extended_frag): Give an error for an
+ attempt to use a non absolute symbol in an extending frag.
+
Mon Dec 9 16:48:20 1996 Jeffrey A Law (law@cygnus.com)
* config/tc-mn10200.c: Flesh out assembler support for MN10200.
Mon Dec 9 17:09:42 1996 Ian Lance Taylor <ian@cygnus.com>
+ * app.c (do_scrub_chars): At the end of a C comment, pass space to
+ UNGET rather than PUT. Set old_state before setting state to -2.
+
* config/tc-mips.c (mips16_extended_frag): Avoid an infinite loop
when extending because the value is exactly maxtiny + 1.