+2000-03-09 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-m32r.c (m32r_fix_adjustable): Look up the
+ relocation type based on the entry in the fixup structure.
+
+2000-03-08 H.J. Lu (hjl@gnu.org)
+
+ * Makefile.am (install-exec-tooldir): Depend on
+ install-exec-bindir for parallel make.
+ * Makefile.in: Regenerated.
+
+2000-03-06 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-m32r.c (struct md_longopts): Add -m32r command line
+ switch.
+ (md_parse_option): Parse -m32r command line switch - disable m32rx
+ compatability.
+ (md_show_usage): Document new option.
+
+ * doc/Makefile.am (CPU_DOCS): Add c-m32r.texi.
+ * doc/Makefile.in: Regenerate.
+ * doc/c-m32r.texi (M32R-Opts): Document new command line switch.
+
+2000-03-02 Michael Meissner <meissner@redhat.com>
+
+ * config/tc-d30v.c (check_range): Remove code that incorrectly
+ sign extended values where bits < 32.
+
+2000-03-02 H.J. Lu (hjl@gnu.org)
+
+ * configure.in: Support --enable-targets=all on ia32.
+ * configure: Regenerated.
+
+2000-03-01 Nick Clifton <nickc@cygnus.com>
+
+ * gasp.c (do_align): Remove bogus check of alignment value.
+
+2000-02-27 Thomas de Lellis <tdel@windriver.com>
+
+ * config/obj-elf.c (elf_frob_symbol): Remove code which when
+ TC_PPC was defined forced the type of a symbol with no other type
+ to be BSF_OBJECT.
+
+2000-02-27 Hans-Peter Nilsson <hp@axis.com>
+
+ * doc/internals.texi (CPU backend): Mention that
+ line_separator_chars do not break up comments. Fix typos for
+ LEX_AT and LEX_NAME descriptions. Document operands for
+ TC_EQUAL_IN_INSN, md_operand and md_section_align. Correct
+ description of md_create_short_jump usage. Document argument for
+ md_undefined_symbol.
+
+2000-02-27 Jakub Jelinek <jakub@redhat.com>
+
+ * config/tc-sparc.c (OPTION_UNDECLARED_REGS): New option.
+ (md_parse_option): Handle it.
+ (md_show_usage): Document it.
+
+2000-02-27 Ian Lance Taylor <ian@zembu.com>
+
+ * config/tc-alpha.c (md_assemble): Accept `1' and `9' in an
+ opcode, for the instruction `pal19'. From Andrea Arcangeli
+ <andrea@suse.de>.
+
+2000-02-26 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c (i386_immediate): Move constant operand sizing
+ from here..
+ (md_assemble): To here, before template operands are matched.
+ Also ensure a constant immediate is sign extended when we know the
+ size is at most 16 bits. This is to catch cases like "add
+ $0xffc0,%ax" where we don't know the size, and thus that the
+ immediate can be represented as Imm8S until after parsing the
+ register operand.
+ (i386_displacement): Similarly sign extend 16 bit constant
+ displacements.
+ (md_assemble): Relax 16-bit jump constant range check to suit sign
+ extended displacements.
+
+2000-02-26 Andreas Jaeger <aj@suse.de>
+
+ * doc/c-mips.texi (MIPS Opts): Fix typo in last patch.
+
+2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c (md_assemble): Don't swap intersegment jmp and
+ call operands when intel_syntax.
+ (intel_float_operand): Return 2 for "fi...".
+ (i386_operand_modifier): Change "DWORD PTR" test to suit above.
+ Return SHORT_MNEM_SUFFIX for "WORD PTR" when "fi...". Revert
+ earlier "SHORT" change.
+ (md_assemble): When determining suffix from Regs, exclude
+ InOutPortReg.
+
+2000-02-24 Nick Clifton <nickc@cygnus.com>
+
+ * configure: Add arm-wince, mips-pe and sh-pe targets.
+ * configure: Regenerate.
+
+ * config/obj-coff.h (COFF_WITH_PE): Define for mips-pe and
+ sh-pe targets.
+ (TARGET_FORMAT): Set to "pe-shl" for the sh-pe target and to
+ "pe-mips" for the mips-pe target.
+
+ * config/tc-arm.c (insns): Change displacement encoded in BL
+ and B instructions if the target port is arm-wince.
+ (do_ldst): Do not bias the relocation offset if the target
+ port is arm-wince.
+ (md_pcrel_from): Add in missing relocation offset bias if the
+ target os arm-wince.
+
+ * config/tc-mips.c (mips_target_format): Support COFF flavour.
+ (md_begin): Disable -G support for mips-pe target.
+ (md_apply_fix): Treat BFD_RELOC_RVA reloc as BFD_RELOC_32.
+ * config/tc-mips.h (USE_GLOBAL_POINTER_OPT): Add support for
+ COFF flavour.
+
+ * config/tc-sh.c (md_begin): sh-pe target is little endian.
+ * config/tc-sh.h (SUB_SEGMENT_ALIGN): If using a BFD
+ assembler, just set the alignment to 4.
+
+ * config/te-wince-pe.h: New file for WinCE targets. Define
+ TE_WINCE.
+
+2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c (md_assemble): Swap segments too for intel mode
+ string instructions.
+ (i386_operand_modifier): Set i.suffix = WORD_MNEM_SUFFIX for SHORT.
+ (i386_intel_memory_operand): After finding a segment override,
+ check again for no `[' before looking for a displacement. Bomb if
+ more than one displacement rather than silently discarding the
+ second and subsequent ones. Free strings malloc'd by
+ build_displacement_string.
+
+2000-02-24 Catherine Moore <clm@cygnus.com>
+
+ * config/obj-som.c (obj_pseudo_table): Add "weak".
+ (obj_som_weak): New routine.
+
+2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c (union i386_op): New.
+ (struct _i386_insn): Delete disps[], imms[], regs[]. Add op[].
+ Throughout file replace occurences of disps[n], imms[n], regs[n]
+ with equivalent op[n].disps, op[n].imms, op[n].regs. Simplify
+ intel mode operand swapping. Add assert in regKludge and
+ fake_zero_displacement code. Test i.types[n] when outputting
+ displacements and immediates. Combine output of Disp16 with
+ Disp32.
+ (md_assemble): Don't try to fix broken UNIXWARE_COMPAT opcodes
+ when in intel mode by (not) reversing fsub and fdiv operands
+ before the template search. This fails for single operand
+ shorthand forms of the instruction, and if UNIXWARE_COMPAT is
+ undefined. Instead fix the base_opcode after we've found the
+ template. Move base_opcode xor with found_reverse_match from
+ opcode output code to before this fix so we test for the correct
+ opcodes.
+ (md_assemble): Don't use strcmp when deciding to ignore the suffix
+ check in intel mode. Instead compare opcodes.
+
+ * config/tc-i386.h (TC_RELOC): Delete.
+ * config/tc-i386.c (TC_RELOC): Delete. Replace usage of TC_RELOC
+ with equivalent call to reloc.
+
+ * as.h (flag_m68k_mri): Move declaration after target include, and
+ only declare when TC_M68K defined. Define as zero otherwise.
+ (LABELS_WITHOUT_COLONS, NO_PSEUDO_DOT): If undefined, define as 0.
+ * app.c (scrub_m68k_mri): Declare only when TC_M68K defined.
+ Define as zero otherwise.
+ (do_scrub_begin): Use m68k_mri parameter only when TC_M68K defined.
+ (struct app_save): Declare scrub_m68k_mri only when TC_M68K.
+ (app_push, app_pop): Save scrub_m68k_mri only when TC_M68K.
+ (do_scrub_chars): Use LABELS_WITHOUT_COLONS directly rather than
+ testing whether defined.
+ * cond.c (ignore_input): Use NO_PSEUDO_DOT directly.
+ * expr.c (operand): #ifdef unused case labels when TC_M68K undefined.
+ * read.c: Use LABELS_WITHOUT_COLONS and NO_PSEUDO_DOT directly
+ rather than testing whether defined.
+ (s_mri): Set flag_m68k_mri only when TC_M68K defined.
+ (parse_mri_cons): Declare and use only when TC_M68K.
+ * config/tc-hppa.h (LABELS_WITHOUT_COLONS): Define as 1.
+ * config/tc-m68k.h (NO_PSEUDO_DOT): Define as 1.
+ * config/tc-m88k.h (NO_PSEUDO_DOT): Define as 1.
+
+ * NEWS: Mention IBM 370 support.
+
+2000-02-23 Richard Henderson <rth@cygnus.com>
+
+ * config/tc-i386.c (md_assemble): When swapping operands for
+ intel_syntax, assume everything that's not Imm or Disp is a
+ register.
+
+2000-02-23 Linas Vepstas <linas@linas.org>
+
+ * config/tc-i370.c, config/tc-i370.h: New files.
+ * Makefile.am: Add support for Linux/IBM 370.
+ * configure.in: Likewise.
+ * app.c (do_scrub_begin): Don't lex single quote when TC_I370.
+ * config/obj-elf.c: Include elf/i370.h
+ (obj_elf_section): Don't do anything special for flag_mri if TC_I370.
+
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+ * doc/c-i370.texi: New file.
+ * doc/all.texi: Include it.
+ * doc/as.texinfo: And here.
+ * doc/Makefile.am(CPU_DOCS): Add c-i370.texi.
+ * doc/Makefile.in: Regenerate.
+
+2000-02-19 Michael Meissner <meissner@redhat.com>
+
+ * config/tc-d30v.c (parallel_ok): Use FLAG_NOT_WITH_ADDSUBppp to
+ determine if an instruction can be used in parallel with an ADDppp
+ or SUBppp instruction.
+
+2000-02-22 Andrew Haley <aph@cygnus.com>
+
+ * doc/c-mips.texi (MIPS Opts): Document -mgp32 and -mgp64.
+
+1999-12-30 Andrew Haley <aph@cygnus.com>
+
+ * config/tc-mips.c (mips_gp32): New variable.
+ (macro_build) Use mips_gp32.
+ (mips_ip): Ditto.
+ (md_longopts): Add "-mgp32" and "-mgp64".
+ (md_parse_option): Add OPTION_GP32 and OPTION_GP64.
+
+2000-02-22 Alexandre Oliva <oliva@lsd.ic.unicamp.br>
+
+ * config/obj-coff.c (add_lineno): Accept non-positive lineno with
+ warning, and bump it to 1.
+
+2000-02-22 Ian Lance Taylor <ian@zembu.com>
+
+ From Brad Lucier <lucier@math.purdue.edu>:
+ * dwarf2dbg.c (print_stats): Add cast to force printf argument to
+ match format.
+
+2000-02-21 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-mips.c (MF_HILO_INSN): Define.
+ (mips_7000_hilo_fix): Declare.
+ (append_insn): Conditionally insert nops after an mfhi/mflo insn.
+ (md_parse_option): Check for 7000_HILO_FIX options.
+ (OPTION_M7000_HILO_FIX): Define.
+ (OPTION_NO_M7000_HILO_FIX): Define.
+ * doc/c-mips.texi (-mfix7000): Describe.
+
+2000-02-21 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * listing.c (print_lines): Remove unused variable `end'.
+
+ * config/tc-i386.c (md_assemble): Use `reloc()' to select reloc
+ type for JumpInterSegment output. Use enum bfd_reloc_code_real for
+ reloc_type when BFD_ASSEMBLER.
+ (md_estimate_size_before_relax): Use enum bfd_reloc_code_real for
+ reloc_type when BFD_ASSEMBLER. Move common code out of switch
+ statement and quell signed vs. unsigned comparison warning.
+
+2000-02-18 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-d10v.c (find_opcode): Add a symbol's value to
+ the computed frag offset, rather than overwriting it.
+
+Thu Feb 17 00:11:08 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * config/tc-sh.c ("elf/sh.h"): Include.
+ (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
+ (md.begin): Initialize target_arch.
+ Only include opcodes in has table that match selected architecture.
+ (parse_reg): Recognize register names for sh-dsp.
+ (parse_at): Recognize post-modify addressing.
+ (get_operands): The leading space is now optional.
+ (get_specific): Remove FDREG_N support. Add support for sh-dsp
+ arguments. Update valid_arch.
+ (build_Mytes): Add support for SDT_REG_N.
+ (find_cooked_opcode): New function, broken out of md_assemble.
+ (assemble_ppi, sh_elf_final_processing): New functions.
+ (md_assemble): Use find_cooked_opcode and assemble_ppi.
+ (md_longopts, md_parse_option): New option: -dsp.
+ * config/tc-sh.h (elf_tc_final_processing): Define.
+ (sh_elf_final_processing): Declare.
+
+Fri Feb 11 14:21:51 2000 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (pa_build_unwind_subspace): Use subseg_new to create
+ the unwinder subspace. Save the current seg/subseg before creating
+ the new seg/subseg.
+
+2000-02-10 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-mcore.c (INST_BYTE0): Redefine to handle big and
+ little endian targets.
+ (INST_BYTE1): Redefine to handle big and little endian
+ targets.
+ (cpu_type): New type: Select between M340 and M210.
+ (parse_psrmod): New function: Parse the PSRCLR and PSRSET
+ instructions of the M340.
+ (md_assemble): Add support for the MULSH and OPSR classes of
+ instructions.
+ (md_atof): Add support for little endian targets.
+ (md_parse_option): Add support for -EL, -EB and -mcpu command
+ line switches.
+ (md_convert_frag): Add support for little endian targets.
+ (md_apply_fix3): Add support for little endian targets.
+ (md_number_to_chars): Add support for little endian targets.
+
+2000-02-10 Timothy Wall <twall@redhat.com>
+
+ * read.c (read_a_source_file): If TC_START_LABEL_WITHOUT_COLON is
+ defined, use it to verify the symbol just read should be a label.
+
+2000-02-10 Timothy Wall <twall@redhat.com>
+
+ * app.c (do_scrub_chars): Handle "||" for parallel instructions
+ when DOUBLEBAR_PARALLEL is defined. Avoid stripping whitespace
+ around colons when KEEP_WHITE_AROUND_COLON is defined.
+ * doc/internals.texi (CPU backend): Document DOUBLEBAR_PARALLEL
+ and KEEP_WHITE_AROUND_COLON.
+
+2000-02-08 Timothy Wall <twall@redhat.com>
+
+ * read.c (s_rept): Call do_repeat, which abstracts the repeat
+ logic.
+ (do_repeat): New. Abstract repeat logic so that a "break" can be
+ implemented.
+ (end_repeat): New. Provide support for a "break" out of the
+ repeat loop.
+ * read.h: Add prototypes for new functions.
+
+2000-02-08 Timothy Wall <twall@redhat.com>
+
+ * doc/internals.texi: Document NUMBERS_WITH_SUFFIX macro.
+ * as.h: Provide a default NUMBERS_WITH_SUFFIX definition (zero).
+ * expr.c: Handle numbers with suffixes if NUMBERS_WITH_SUFFIX is
+ non-zero.
+
+2000-02-08 Timothy Wall <twall@redhat.com>
+
+ * read.c: Added elseif to directives table.
+ * read.h: Added prototype for s_elseif.
+ * doc/as.texinfo: Added description for elseif.
+ * cond.c (s_elseif): New function
+
+2000-02-04 Timothy Wall <twall@redhat.com>
+
+ * listing.c (print_lines): Remove conditionals causing bug in
+ listings.
+
+2000-02-03 Timothy Wall <twall@cygnus.com>
+
+ * as.h: Define OCTETS_PER_BYTE and OCTETS_PER_BYTE_POWER
+ default values.
+ * frags.c (frag_new): Calculate fr_fix in octets
+ (frag_now_fix) Return offset as target address offset (bytes).
+ (frag_now_fix_octets) New - Return offset in octets (8-bit
+ quantities).
+ * frags.h: Added prototype for frag_now_fix_octets().
+ Distinguish between octets and bytes in field descriptions.
+ * listing.c (calc_hex): Account for octets vs bytes when
+ printing addresses/offsets.
+ (print_lines) Ditto. Also, if LISTING_WORD_SIZE is not 1, and
+ target is little-endian, print the octets in a word in big-endian
+ order so that the display looks like a proper hexadecimal number,
+ instead of having the octets reversed.
+ * read.c (do_align): When recording alignment, alignment power
+ should be in terms of target bytes (minimum addressible unit)
+ instead of octets.
+ (do_org) Convert ORG target address (byte) argument into an
+ octet offset when generating a variable fragment.
+ * symbols.c (resolve_symbol_value): Symbol final value
+ converted to a target address offset (bytes) from its octet offset.
+ * config/obj-coff.c (coff_frob_symbol): Symbol target address
+ offset (bytes) is adjusted by the frag offset (octets) converted
+ to bytes.
+ (coff_frob_section) Section alignment power is in terms of bytes;
+ convert it to an octet alignment power when calculating size (and
+ size mask) in octets. Don't modify the section size in order to
+ "align" it for TI COFF, since that format has a different method
+ for storing alignment information.
+
+2000-02-01 Timothy Wall <twall@cygnus.com>
+
+ * stabs.c (generate_asm_file): Escape backslashes in stabs file
+ entries, matching the way GCC generates them. If not escaped, the
+ filename is encoded incorrectly.
+
+2000-01-31 Nick Clifton <nickc@cygnus.com>
+ * config/tc-arm.c (reg_table): Add support for ATPCS register
+ naming conventions.
+
+2000-01-31 Geoff Keating <geoffk@cygnus.com>
+
+ * config/obj-coff.h (OBJ_COPY_SYMBOL_ATTRIBUTES): Don't define if
+ already defined.
+ * config/tc-ppc.h [OBJ_XCOFF] (OBJ_COPY_SYMBOL_ATTRIBUTES):
+ New macro.
+ * config/tc-ppc.c (ppc_fix_adjustable): Don't look at the frag
+ of a symbol when we really care about its value.
+
+2000-01-19 Chandra Chavva <cchavva@cygnus.com>
+
+ * config/tc-mcore.c (md_assemble): Give warning message if
+ operands passes to instruction are more than the spec.
+
+2000-01-27 Thomas de Lellis <tdel@windriver.com>
+
+ * config/tc-arm.c (armadjust_symtab): If the assembler is in
+ Thumb mode but the label seen was not declared as '.thumb_func'
+ then set the ST_INFO type to STT_ARM_16BIT mode. This allows
+ correct disassembly of Thumb code bounded by non function labels.
+
+2000-01-27 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * Makefile.am (MULTI_CFILES): Add config/e-i386aout.c
+ Add dependencies for e-i386aout.o. Fix 2 comment lines.
+
+ * Makefile.in: Same here.
+ Update copyright.
+
+ * configure.in: Set bfd_gas for i386-aout when primary target
+ is bfd. Handle i386aout emulation. Don't use te_file=multi, as
+ we may need the primary te_file. Remove incorrect comment.
+
+ * configure: Regenerate.
+
+ * config/e-i386aout.c: New file.
+
+ * as.c (USE_EMULATIONS): Move to before print_version_id.
+ (struct emulation): Add i386aout.
+ (show_usage): Split text strings. Reformat -a text. Add --em
+ help.
+ Update copyright.
+
+ * obj.h (struct format_ops): Add s_get_other and s_get_desc.
+ (aout_format_ops): New.
+ Update copyright.
+
+ * read.c (s_lcomm_internal): Rewrite OBJ_AOUT,OBJ_BOUT
+ preprocessor conditional and add aout USE_EMULATIONS tests.
+ (read_a_source_file): Don't pass error strings to printf as
+ format arg.
+ Update copyright.
+
+ * gasp.c (exp_get_abs): Don't pass error strings to printf as
+ format arg.
+ (do_data): Same here.
+ (process_file): And here.
+ Update copyright.
+
+ * symbols.c (colon): Rewrite "already defined" fatal message
+ code for aout with USE_EMULATIONS.
+ Update copyright.
+
+ * config/obj-aout.c (OBJ_HEADER): Define.
+ (obj_pseudo_table): Rename to aout_pseudo_table. Init all
+ fields of sentinel.
+ (obj_aout_frob_symbol): Expand S_GET_DESC, S_GET_TYPE,
+ S_GET_OTHER, S_SET_TYPE macros since we don't need obj-multi
+ forms here.
+ (obj_aout_type): Expand S_SET_OTHER here too.
+ (obj_read_begin_hook): Remove.
+ (aout_pop_insert): New.
+ (obj_aout_s_get_other): New.
+ (obj_aout_s_get_desc): New.
+ (aout_format_ops): New.
+ Update copyright.
+
+ * config/obj-aout.h (obj_pop_insert): Define so non-multi usage
+ gets aout_pseudo_table.
+ (aout_pseudo_table): Declare.
+ (obj_read_begin_hook): Define.
+ Update copyright.
+
+ * config/obj-coff.c (obj_pseudo_table): Rename to
+ coff_pseudo_table.
+ (coff_pop_insert): Use coff_pseudo_table.
+ (coff_sec_sym_ok_for_reloc): Remove.
+ (coff_format_ops): Add 0 entries for s_get_size, s_set_size,
+ and comment all zero entries and remove #if 0 code.
+ Update copyright.
+
+ * config/obj-coff.h (obj_pop_insert): Define.
+ (coff_pseudo_table): Declare.
+ Update copyright.
+
+ * config/obj-ecoff.c (ecoff_format_ops): Add 0 entries for
+ s_get_size, s_set_size. Comment all zero entries.
+ Update copyright.
+
+ * config/obj-elf.c (elf_s_get_other): New function.
+ (obj_read_begin_hook): Rename to elf_obj_read_begin_hook.
+ (obj_symbol_new_hook): Rename to elf_obj_symbol_new_hook.
+ (elf_format_ops): Add elf_s_get_other, 0 s_get_size entry, and
+ comment.
+ (obj_elf_parse_section_letters): Don't pass error strings to
+ printf as format arg.
+ Update copyright.
+
+ * config/obj-elf.h (ECOFF_DEBUGGING): Define when
+ OBJ_MAYBE_ECOFF.
+ (elf_s_get_other): Declare.
+ (S_GET_OTHER) Define as elf_s_get_other if not already
+ defined.
+ (S_SET_OTHER): Only define when not already defined.
+ (elf_obj_read_begin_hook): Declare.
+ (obj_read_begin_hook): Define.
+ (elf_obj_symbol_new_hook): Declare.
+ (obj_symbol_new_hook): Define.
+ Update copyright.
+
+ * config/obj-multi.h: Add copyright header and protect against
+ multiple inclusion. Add * to all function pointers.
+ (OBJ_HEADER): If defined, include it rather than other defines
+ in this file.
+ (obj_frob_file_after_relocs): Test for NULL.
+ (obj_symbol_new_hook): Here too.
+ (obj_sec_sym_ok_for_reloc): And here.
+ (S_GET_OTHER): Define.
+ (S_GET_DESC): Define.
+ (ECOFF_DEBUGGING): Remove as it's done in obj-elf.h
+ (OBJ_MAYBE_ELF): Update comment.
+
+ * config/tc-i386.c (i386_immediate): Add OBJ_MAYBE_AOUT to
+ OBJ_AOUT preprocessor conditional and handle emulation by
+ testing OUTPUT_FLAVOR.
+ (i386_displacement): Here too.
+ (md_section_align): Similarly here.
+ (i386_target_format): Conditionally compile when more than one
+ of OBJ_MAYBE_{ELF,COFF,AOUT} defined. Add aout case.
+ (i386_immediate): Fix error message for aout BFD_ASSMBLER.
+ (i386_displacement): Here too.
+ Update copyright.
+
+ * config/tc-i386.h (AOUT_TARGET_FORMAT): Define for each TE_*.
+ Define TARGET_FORMAT for aout only when not multi.
+ Update copyright.
+
+ * config/te-multi.h: Delete file as it's identical to te-generic.h
+
+2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.h (DWORD_MNEM_SUFFIX): Delete.
+ * config/tc-i386.c (DWORD_MNEM_SUFFIX): Rename all occurrences to
+ LONG_MNEM_SUFFIX.
+
+ * config/tc-i386.h (INTEL_DWORD_MNEM_SUFFIX): Rename to
+ DWORD_MNEM_SUFFIX.
+ * config/tc-i386.c (INTEL_DWORD_MNEM_SUFFIX): Here too. Fix some
+ comments.
+
+2000-01-13 Clinton Popetz <cpopetz@cygnus.com>
+
+ * config/tc-mips.c (mips_do_align): New function.
+ * config/tc-mips.h (md_do_align): Define.
+
+2000-01-10 Philip Blundell <philb@gnu.org>
+
+ * doc/c-arm.texi (ARM Options): Fix typo.
+ (ARM-Chars): Correct description of `#'. Mention that `;' is a
+ line separator for Linux.
+ * doc/as.texinfo (Comments): Mention the ARM.
+
+2000-01-10 Philip Blundell <pb@futuretv.com>
+
+ * configure.in (arm*-*-conix*): New target.
+ (arm*-*-linux-gnu*): Match instead of arm-*-linux* and
+ armv*-*-linux-gnu.
+ * configure: Regenerate.
+
+2000-01-03 Martin v. Loewis <loewis@informatik.hu-berlin.de>
+
+ * config/obj-elf.c (elf_pseudo_table): Define visibility pseudos.
+ (obj_elf_visibility): New function.
+
+ * doc/as.texinfo (Visibility): New node: document visibility
+ pseudo ops.
+
+1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c (MATCH): Relax JumpAbsolute check. Emit a
+ warning for absolute jump/call without `*' in non-intel mode. No
+ need to set i.types[0] JumpAbsolute in intel mode.
+
+1999-12-22 Philip Blundell <pb@futuretv.com>
+
+ * config/tc-arm.c (arm_s_text): If OBJ_ELF, call the appropriate
+ hook function when changing sections.
+ (arm_s_data): Likewise.
+
+1999-12-14 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-arm.c (md_parse_option): Add support for -marm720
+ command line switch.
+
+Tue Nov 30 22:59:00 1999 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.c (md_pseudo_table): Add ".am33" pseudo-op.
+ (r_registers, xr_registers): Define.
+ (r_register_name, xr_register_name): New functions.
+ (md_assemble): Handle new am33 operand types and instruction
+ formats.
+ (mn10300_insert_operand, check_operand): Likewise.
+
+1999-11-29 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-arm.c (thumb_mode): Turn into a tristate variable.
+ (s_force_thumb): Set thumb_mode to 2.
+ (md_assemble): Do not complain about thumb instructions on a
+ non-thumb target if thumb_mode is set to 2.
+
+1999-11-28 Michael Meissner <meissner@cygnus.com>
+
+ * config/tc-alpha.c (toplevel): Include struc-symbol.h.
+ (alpha_macro_arg): Add MACRO_{LITERAL,BASE,BYTOFF,JSR} cases.
+ (O_...): Add new machine dependent expressions if we are handling
+ explicit relocations.
+ (alpha_reloc_op): New static table holding the explicit relocation
+ information.
+ (alpha_literal_hash): New static to hold the hash table for
+ explicit relocations.
+ (alpha_macros): Add support for explicit relocations.
+ (md_begin): If explicit relocations, initialize hash table.
+ (md_assemble): Don't print a second error if tokenize_arguments
+ already printed an error message.
+ (md_apply_fix): Add support for explicit relocations.
+ (alpha_force_relocation): Ditto.
+ (alpha_fix_adjustable): Ditto.
+ (alpha_adjust_symtab): New function to support explicit
+ relocations.
+ (alpha_adjust_symtab_relocs): Ditto.
+ (debug_exp): Debug stub compiled if DEBUG_ALPHA is defined.
+ (tokenize_arguments): Add debug code if DEBUG_ALPHA is defined.
+ Add support for explicit relocations. Return -2 if an error
+ message was already printed.
+ (find_macro_match): Add support for explicit relocations. Comment
+ each of the cases.
+ (emit_insn): Add support for explicit relocations.
+ (assemble_tokens): Ditto.
+ (emit_ldgp): Ditto.
+ (load_expression): Ditto.
+ (emit_lda): Ditto.
+ (emit_ldah): Ditto.
+ (emit_ir_load): Ditto.
+ (emit_loadstore): Ditto.
+ (emit_ldXu): Ditto.
+ (emit_ldil): Ditto.
+ (emit_sextX): Ditto.
+ (emit_division): Ditto.
+ (emit_jsrjmp): Ditto.
+ (emit_retjcr): Ditto.
+
+ * config/tc-alpha.h (RELOC_OP_P): Enable explicit relocations if
+ ELF object format.
+ (tc_adjust_symtab): If explicit relocations, call the function
+ alpha_adjust_symtab.
+ (TC_FIX_TYPE): Add fields to be able to move explicit lituse
+ relocations next to the literal relocation they reference.
+ (TC_INIT_FIX_DATA): Initialize the new fields.
+ (TC_FIX_DATA_PRINT): Print the new fields if DEBUG5 is defined.
+
+Wed Nov 24 20:27:58 1999 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (pa_ip): Handle PA2.0 unit completers. Handle
+ 'B' operand for PA2.0 bb instruction.
+
+1999-11-18 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-mcore.h (TC_FORCE_RELOCATION): Define for Mcore-pe
+ target.
+
+ * config/tc-mcore.c (tc_gen_reloc): Support generation of RVA
+ relocs.
+ (mcore_force_relocation): Force relocations to be generated for
+ RVA relocs.
+
+1999-11-16 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c (i386_immediate): Disallow O_big immediates.
+ (i386_displacement): Disallow O_big displacements.
+
+Mon Nov 15 20:12:43 1999 Donald Lindsay <dlindsay@cygnus.com>
+
+ * config/tc-arm.c (do_mia,do_mar,do_mra,do_pld,do_ldrl,do_co_reg): Small
+ improvements in error checking.
+ (md_assemble): Support for unconditional ARM instructions.
+ (md_parse_option): Support for -m[arm]v5e flag.
+
+1999-11-12 Nick Clifton <nickc@cygnus.com>
+
+ * macro.c (buffer_and_nest): Do not check beyond the end of the
+ buffer.
+
+1999-11-11 Nick Clifton <nickc@cygnus.com>
+
+ * macro.c (buffer_and_nest): Look for seperator after TO and
+ FROM tokens.
+
+1999-11-08 Andrew Haley <aph@cygnus.com>
+
+ * app.c (do_scrub_chars): When in State 10, treat backslash
+ characters in the same way as as symbol characters.
+
+1999-11-07 Richard Henderson <rth@cygnus.com>
+
+ * config/tc-alpha.c (alpha_align): Check, don't assert, that
+ the previous label was in the current section before playing
+ with auto-alignment.
+
+1999-11-06 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-v850.c (v850_force_relocation): Force relocation
+ for weak symbols.
+ (v850_pcrel_from_selection): Do not compute a pcrel offset if
+ the symbol is weak.
+
+1999-11-05 Michael Meissner <meissner@cygnus.com>
+
+ * expr.h (operatorT): Increase machine dependent operators to 16.
+ * expr.c (op_rank): Ditto.
+
+1999-11-03 Ian Lance Taylor <ian@zembu.com>
+
+ * read.c (pseudo_set): Reject attempts to set the value of a
+ section symbol.
+
+ * config/obj-elf.c (obj_elf_ident): Call md_flush_pending_output
+ if it is defined.
+
+ * config/obj-elf.c (elf_set_index): Add ATTRIBUTE_UNUSED.
+
+ * config/obj-elf.c (elf_frob_file_after_relocs): Don't pass NULL
+ to bfd_set_section_contents.
+
+1999-11-03 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-mcore.h (TARGET_BYTES_BIG_ENDIAN): Change to false.
+
+1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER.
+ (mips_ip): Use OPCODE_IS_MEMBER.
+
+Wed Oct 27 16:50:44 1999 Don Lindsay <dlindsay@cygnus.com>
+
+ * config/tc-arm.c (reg_required_here): Improve comments.
+
+ * config/tc-arm.c (thumb_opcode): Add "variants" field.
+ (tinsns): Initialize variants field.
+
+ * config/tc-arm.c (bad_args, bad_pc): Renamed to BAD_ARGS and
+ BAD_PC respectively.
+
+1999-10-27 Scott Bambrough <scottb@netwinder.org>
+
+ * config/tc-arm.c (reloc_map[]): Fix compiler warning.
+ * config/tc-arm.h: Fix compile time warnings.
+
+Mon Oct 18 18:11:10 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
+
+ * tc_d10v.c (find_opcode): Allow ATSIGN to match expressions of the
+ form @abs16, @(abs16) and @(abs16 + imm).
+
+1999-10-21 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * config/tc-mips.c (ISA_HAS_COPROC_DELAYS) : New.
+ (ISA_HAS_64_BIT_REGS) New.
+ (gpr_interlocks,md_begin,reg_needs_delay,append_insn,
+ mips_emit_delays,macro_build,load_register,load_addresss,
+ macro,macro2,mips_ip,s_cprestore,s_cpadd): Simplify
+ and/or use new ISA_xxx macros in expressions involving
+ ISA, particularly mips_opts.isa.
+
+1999-10-18 Michael Meissner <meissner@cygnus.com>
+
+ * expr.h (operatorT): Add machine dependent operators md1..md8.
+ (expressionS): Make X_op 8 bits instead of 7. Add a X_md field
+ for the machine dependent operators to use.
+
+ * expr.c (op_rank): Add machine dependent operators.
+
+ * config/tc-alpha.c (O_pregister): Define as a machine dependent
+ operator.
+ (O_cpregister): Ditto.
+ (md_begin): Change X_op test that field is wide enough to use
+ O_max instead of O_alpha_max.
+ (cpu_types): Fill in missing initializer.
+ (alpha_num_macros): Make unsigned.
+ (md_assemble): Make opnamelen be size_t.
+ (md_apply_fix): Cast alpha_num_operands to int before testing.
+ (alpha_force_relocation): Ditto.
+ (alpha_fix_adjustable): Ditto.
+ (alpha_fix_adjustable): Mark unused arguments ATTRIBUTE_UNUSED.
+ (tc_gen_reloc): Ditto.
+ (tc_get_register): Ditto.
+ (emit_ldgp): Ditto.
+ (emit_lda): Ditto.
+ (emit_ldah): Ditto.
+ (emit_ldil): Ditto.
+ (s_alpha_ent): Ditto.
+ (s_alpha_end): Ditto.
+ (s_alpha_frame): Ditto.
+ (s_alpha_prologue): Ditto.
+ (s_alpha_file): Ditto.
+ (s_alpha_gprel32): Ditto.
+ (s_alpha_proc): Ditto.
+ (s_alpha_set): Ditto.
+ (s_alpha_base): Ditto.
+ (s_alpha_align): Ditto.
+ (s_alpha_arch): Ditto.
+ (alpha_align): Ditto.
+ (assemble_insn): Suppress unused variable warning.
+ (emit_insn): Ditto.
+ (assemble_insn): Don't assume X_op and X_unsigned are in a given
+ order in the structure.
+ (s_alpha_coff_wrapper): Avoid int/unsigned comparison.
+
+Sun Oct 17 17:15:58 1999 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (md_apply_fix): Make "fmt" an int.
+
+1999-10-12 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * config/tc-i386.c (i386_index_check): Correct #endif location.
+
+Mon Oct 11 14:02:40 1999 Geoffrey Keating <geoffk@cygnus.com>
+
+ * as.c (show_usage): Document new options.
+ (parse_args): Add --no-warn, --warn, --fatal-warnings,
+ which become 'W', OPTION_WARN, and OPTION_WARN_FATAL.
+ (parse_args): Parse the new options.
+ (main): If there were warnings, and --fatal-warnings
+ was specified, print an error.
+ * as.h: New variable, flag_fatal_warnings, for new option.
+
+Sun Oct 10 01:47:23 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
+
+ * config/tc-hppa.c (pa_ip): Add new codes 'cc', 'cd', 'cC', 'co',
+ '@'. Change autoincrement completers to fall through to cache control
+ completers.
+
+ * config/tc-hppa.c (pa_ip): Remove unused args. Add code to '?W'
+ arg.
+ (pa_parse_addb_64_cmpltr): New function.
+
+ * config/tc-hppa.c (pa_ip): Change error message.
+ (pa_ip,pa_parse_cmpb_64_cmpltr,pa_parse_cmpib_64_cmpltr) Fix '?N' and
+ '?Q' args to allow falling through.
+
+ * configtc-hppa.c (pa_ip): Implement conditional codes "?N", "?Q".
+ Remove unused conditional codes.
+ (pa_parse_cmpb_64_cmpltr,pa_parse_cmpib_64_cmpltr): New.
+
+Thu Oct 7 00:23:53 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
+
+ * config/tc-d30v.c (CHAR_BIT): Define.
+ (check_range): Fix bit operations to support integers bigger than
+ 32 bits.
+
+Thu Oct 7 00:11:50 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
+
+ * config/tc-d10v.c (check_range): Check range for RESTRICTED_NUM3
+ operands.
+
+Mon Oct 4 17:24:23 1999 Nick Clifton <nickc@cygnus.com>
+ Doug Evans <devans@cygnus.com>
+
+ Add support for m32rx.
+ * config/tc-m32r.c (enable_m32rx): New static global.
+ (enable_special,warn_explicit_parallel_conflicts,optimize): Ditto.
+ (allow_m32rx): New function.
+ (M32R_SHORTOPTS): Add `O'.
+ (md_longopts): Add --m32rx plus several warning options.
+ (md_parse_option): Handle new options.
+ (md_show_usage): Print them.
+ (md_begin): Enable m32rx.
+ (OPERAND_IS_COND_BIT): New macro.
+ (first_writes_to_seconds_operands): New function.
+ (writes_to_pc,can_make_parallel,make_parallel): New functions.
+ (target_make_parallel,assemble_two_insns): New functions.
+ (md_assemble): Recognize "insn1 -> insn2" and "insn1 || insn2".
+ If optimizing and m32rx, try to make consecutive insns parallel.
+
+Tue Sep 28 14:06:44 1999 Geoffrey Keating <geoffk@cygnus.com>
+
+ * config/tc-mips.c (nopic_need_relax): Allow for the
+ .sdata.foo sections generated by -fdata-sections,
+ and for the .gnu.linkonce.s sections generated by C++.
+
+Thu Sep 23 07:13:45 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * config/tc-hppa.c (pa_ip): Replace 'B', 'M', 'l' and 'g' handling
+ with cleaner code using completer prefixes. Add 'Y'.
+
+ * config/tc-hppa.c (pa_ip): Add parens to silence compiler.
+
+Wed Sep 22 09:37:19 1999 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (pa_ip): Avoid ANSI specific initialization.
+ (pa_ip, case 'm'): Failure to get a CBIT specifier just means the
+ insn does not match and we should try the next insn in the table.
+
+1999-09-22 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-arm.c (MULTI_SET_PSR): Rename to LDM_TYPE_2_OR_3.
+
+Mon Sep 20 04:01:41 1999 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (pa_ip): Fix thinkos in recent cleanup
+ of PA2.0 support.
+
+1999-09-19 Alexandre Oliva <oliva@lsd.ic.unicamp.br>
+
+ * config/tc-i386.c (md_shortopts): Check OBJ_MAYBE_ELF as well as
+ OBJ_ELF. If ELF, add "sq".
+ (md_parse_option): If ELF, ignore -s and -q.
+ (md_show_usage): Mention ELF options.
+
Sun Sep 19 10:43:31 1999 Jeffrey A Law (law@cygnus.com)
+ * config/tc-hppa.c (pa_ip): Handle 'J', 'K' and 'cc'
+ operands.
+
* config/tc-hppa.c (pa_ip); Handle "fe", and 'cJ'.
* config/tc-hppa.c (pa_ip): Handle 'd', '#' and 'cq'.
projects / deliverable / binutils-gdb.git / blobdiff