x86: allow VEX et al encodings in 16-bit (protected) mode
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 2d05746753fbad9a0453232f11cb007be50f362b..e08db78cc3279cf6157e325bab4806badacb99d9 100644 (file)
@@ -1,3 +1,252 @@
+2019-06-27  Jan Beulich  <jbeulich@suse.com>
+
+       config/tc-i386.c (md_assemble): Check for protected mode
+       incapable processor before encoding VEX and alike insns.
+       * testsuite/gas/i386/inval-16.s: For 80186 architecture.
+       * testsuite/gas/i386/inval-16.l: Adjust expectations.
+       * testsuite/gas/i386/avx-16bit.d,
+       testsuite/gas/i386/avx-16bit.s,
+       testsuite/gas/i386/avx512f-16bit.d,
+       testsuite/gas/i386/avx512f-16bit.s,
+       testsuite/gas/i386/bmi-16bit.d,
+       testsuite/gas/i386/bmi-16bit.s,
+       testsuite/gas/i386/bmi2-16bit.d,
+       testsuite/gas/i386/bmi2-16bit.s,
+       testsuite/gas/i386/lwp-16bit.d,
+       testsuite/gas/i386/lwp-16bit.s: New
+       testsuite/gas/i386/i386.exp: Run new tests.
+
+2019-06-26  Jim Wilson  <jimw@sifive.com>
+
+       * testsuite/gas/xstormy16/allinsn.sh: Change first line to
+       #!/bin/bash and make it executable.
+       * testsuite/gas/xstormy16/gcc.sh: Likewise.
+
+2019-06-26  Lili Cui  <lili.cui@intel.com>
+
+       * doc/c-i386.texi: Document x/y/z instruction sufffixes in AT&T
+       syntax and xmmword/ymmword/zmmword/fword/tbyte/oword ptr in
+       Intel syntax.
+
+2019-06-25  Faraz Shahbazker  <fshahbazker@wavecomp.com>
+
+       * config/tc-mips.c (macro) <M_LI>: Re-order MTHC1 with
+       respect to MTC1 and use $0 for either part where possible.
+       * testsuite/gas/mips/li-d.s: Add test cases for non-zero
+       words in double precision constants.
+       * testsuite/gas/mips/li-d.d: Update reference output.
+       * testsuite/gas/mips/micromips@isa-override-1.d: Likewise.
+       * testsuite/gas/mips/mips32r2@isa-override-1.d: Likewise.
+       * testsuite/gas/mips/mips64r2@isa-override-1.d: Likewise.
+
+2019-06-25  Jan Beulich  <jbeulich@suse.com>
+
+       * tc-i386.c (acc32, acc64): Delete.
+       (pi): Make first parameter pinter-to-const.
+       (type_names): Remove Acc. Add acc8, acc16, acc32, and acc64.
+       (pt): Use operand_type_equal().
+       (match_template): Replace use of acc32.
+       (process_suffix): Replace use of acc64.
+
+2019-06-25  Jan Beulich  <jbeulich@suse.com>
+
+       * doc/c-i386.texi: Mark -mavxscalar= and -mvexwig as dangrous to
+       use.
+
+2019-06-25  Jan Beulich  <jbeulich@suse.com>
+
+       * tc-i386.c (process_suffix): Use is_any_vex_encoding().
+
+2019-06-25  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/sse2-16bit.d,
+       testsuite/gas/i386/sse2-16bit.s: New.
+       testsuite/gas/i386/i386.exp: Run new test.
+
+2019-06-25  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (optimize_encoding): Also handle ANDQ with
+       immediatie fitting in 7 bits.
+       * testsuite/gas/i386/x86-64-optimize-1.s: Add ANDQ cases with
+       7- and 8-bit immediates.
+       * testsuite/gas/i386/x86-64-optimize-1.d: Adjust expectations.
+
+2019-06-25  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/xmmword.s: Add cvtps2pi and cvttps2pi
+       tests.
+       * testsuite/gas/i386/xmmword.l: Adjust expectations.
+
+2019-06-25  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (ppc_handle_align): Add parentheses.
+
+2019-06-25  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.h (ppc_nop_select): Declare.
+       (NOP_OPCODE): Define.
+       * config/tc-ppc.c (ppc_elf_end, ppc_xcoff_end): Zero ppc_cpu.
+       (ppc_nop_encoding_for_rs_align_code): New enum.
+       (ppc_nop_select): New function.
+       (ppc_handle_align): Don't use ppc_cpu here.  Get nop type from frag.
+       * testsuite/gas/ppc/groupnop.d,
+       * testsuite/gas/ppc/groupnop.s: New test.
+       * testsuite/gas/ppc/ppc.exp: Run it.
+
+2019-06-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/24700
+       * testsuite/gas/i386/disassem.s: Add test for vbroadcasti32x8
+       with invalid vector length.
+       * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+       * testsuite/gas/i386/disassem.d: Updated.
+       * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/24691
+       * testsuite/gas/i386/disassem.s: Add test for vshuff32x4 with
+       invalid vector length.
+       * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+       * testsuite/gas/i386/disassem.d: Updated.
+       * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-14  Alan Modra  <amodra@gmail.com>
+
+       * Makefile.in: Regenerate.
+       * configure: Regenerate.
+       * doc/Makefile.in: Regenerate.
+
+2019-06-12  Peter Bergner  <bergner@linux.ibm.com>
+
+       * testsuite/gas/ppc/power9.d: Delete ldmx tests.
+       * testsuite/gas/ppc/power9.s: Likewise.
+
+2019-06-06  Lili Cui  <lili.cui@intel.com>
+
+       * config/tc-i386.c (cpu_arch): Add .enqcmd.
+       (cpu_noarch): Add noenqcmd.
+       * doc/c-i386.texi: Document noenqcmd.
+
+2019-06-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/24633
+       * testsuite/gas/i386/disassem.s: Add tests for invalid vector
+       lengths for EVEX vextractfXX and vinsertfXX.
+       * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+       * testsuite/gas/i386/disassem.d: Updated.
+       * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/24626
+       * testsuite/gas/i386/disassem.s: Add tests for reserved VEX.vvvv
+       and EVEX.vvvv.
+       * testsuite/gas/i386/x86-64-disassem.s: Likewise.
+       * testsuite/gas/i386/disassem.d: Updated.
+       * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
+2019-06-04  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+           Lili Cui  <lili.cui@intel.com>
+
+       * config/tc-i386.c (cpu_arch): Add .avx512_vp2intersect.
+       (cpu_noarch): Likewise.
+       * doc/c-i386.texi: Document avx512_vp2intersect.
+       * testsuite/gas/i386/i386.exp: Run vp2intersect tests.
+       * testsuite/gas/i386/vp2intersect-intel.d: New test.
+       * testsuite/gas/i386/vp2intersect.d: Likewise.
+       * testsuite/gas/i386/vp2intersect.s: Likewise.
+       * testsuite/gas/i386/vp2intersect-inval-bcast.l: Likewise.
+       * testsuite/gas/i386/vp2intersect-inval-bcast.s: Likewise.
+       * testsuite/gas/i386/x86-64-vp2intersect-intel.d: Likewise.
+       * testsuite/gas/i386/x86-64-vp2intersect.d: Likewise.
+       * testsuite/gas/i386/x86-64-vp2intersect.s: Likewise.
+       * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.l: Likewise.
+       * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s: Likewise.
+
+2019-06-04  Xuepeng Guo  <xuepeng.guo@intel.com>
+           Lili Cui  <lili.cui@intel.com>
+
+       * doc/c-i386.texi: Document enqcmd.
+       * testsuite/gas/i386/enqcmd-intel.d: New file.
+       * testsuite/gas/i386/enqcmd-inval.l: Likewise.
+       * testsuite/gas/i386/enqcmd-inval.s: Likewise.
+       * testsuite/gas/i386/enqcmd.d: Likewise.
+       * testsuite/gas/i386/enqcmd.s: Likewise.
+       * testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
+       * testsuite/gas/i386/x86-64-enqcmd-inval.l: Likewise.
+       * testsuite/gas/i386/x86-64-enqcmd-inval.s: Likewise.
+       * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
+       * testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
+       * testsuite/gas/i386/i386.exp: Run enqcmd-intel, enqcmd-inval,
+       enqcmd, x86-64-enqcmd-intel, x86-64-enqcmd-inval,
+       and x86-64-enqcmd.
+
+2019-05-30  Jim Wilson  <jimw@sifive.com>
+
+       * config/tc-riscv.c (riscv_ip) <'u'>: Move O_constant check inside if
+       statement.  Delete O_symbol and O_constant check after if statement.
+       * testsuite/gas/riscv/auipc-parsing.s: Test lui with missing %hi.
+       * testsuite/gas/riscv/auipc-parsing.l: Update.
+
+2019-05-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/24625
+       * testsuite/gas/i386/inval-avx512f.s: Add tests for AVX512_BF16
+       instructions with invalid broadcast.
+       * testsuite/gas/i386/x86-64-inval-avx512f.s: Likewise.
+       * testsuite/gas/i386/inval-avx512f.l: Updated.
+       * testsuite/gas/i386/x86-64-inval-avx512f.l: Likewise.
+
+2019-05-27  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (is_ppc64_target): New function.
+       (md_show_usage): Split up usage message.  Don't show -a64 when
+       unsupported.
+       testsuite/gas/ppc/ppc.exp (supports_ppc64): New.
+       (prefix-reloc): Only run for ppc64.
+
+2019-05-24  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * config/tc-aarch64.c (aarch64_elf_copy_symbol_attributes): Define.
+       * config/tc-aarch64.h (aarch64_elf_copy_symbol_attributes): Declare.
+       (OBJ_COPY_SYMBOL_ATTRIBUTES): Define.
+       * testsuite/gas/aarch64/symbol-variant_pcs-3.d: New test.
+       * testsuite/gas/aarch64/symbol-variant_pcs-3.s: New test.
+
+2019-05-24  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * config/tc-aarch64.c (s_variant_pcs): New function.
+       * doc/c-aarch64.texi: Document .variant_pcs.
+       * testsuite/gas/aarch64/symbol-variant_pcs-1.d: New test.
+       * testsuite/gas/aarch64/symbol-variant_pcs-1.s: New test.
+       * testsuite/gas/aarch64/symbol-variant_pcs-2.d: New test.
+       * testsuite/gas/aarch64/symbol-variant_pcs-2.s: New test.
+
+2019-05-24  Alan Modra  <amodra@gmail.com>
+
+       * po/POTFILES.in: Regenerate.
+
+2019-05-24  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (ppc_elf_suffix): Support @pcrel, @got@pcrel,
+       @plt@pcrel, @higher34, @highera34, @highest34, and @highesta34.
+       (fixup_size): Handle new powerxx relocs.
+       (md_assemble): Warn for @pcrel on non-prefix insns.
+       Accept @l, @h and @ha on prefix insns, and infer reloc without
+       any @ suffix.  Translate powerxx relocs to suit DQ and DS field
+       instructions.  Include operand tests as well as opcode test to
+       translate BFD_RELOC_HI16_S to BFD_RELOC_PPC_16DX_HA.
+       (ppc_fix_adjustable): Return false for pcrel GOT and PLT relocs.
+       (md_apply_fix): Handle new powerxx relocs.
+       * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Accept
+       BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34,
+       BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34,
+       BFD_RELOC_PPC64_D34, and BFD_RELOC_PPC64_D28.
+       * testsuite/gas/ppc/prefix-reloc.d,
+       * testsuite/gas/ppc/prefix-reloc.s: New test.
+       * testsuite/gas/ppc/ppc.exp: Run it.
+
 2019-05-24  Peter Bergner  <bergner@linux.ibm.com>
            Alan Modra  <amodra@gmail.com>
 
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