+2015-06-02 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-arm.c (arm_ext_pan): New.
+ (do_setpan): New, encode an ARM SETPAN instruction.
+ (do_t_setpan): New, encode a Thumb SETPAN instruction.
+ (insns): Add "setpan".
+ (arm_extensions): Add "pan".
+ * doc/c-arm.texi (ARM Options): Add "pan" to list of -mcpu processor
+ extensions.
+
+2015-06-02 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): Add "rdma".
+ * doc/c-aarch64.texi (AArch64 Extensions): Add "rdma".
+
+2015-06-02 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): Add "lor".
+ * doc/c-aarch64.c (Aarch64 Extensions): Add "lor" to list of
+ architecture extensions.
+
+2015-06-01 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-aarch64.c (parse_sys_reg): New parameter. Check target
+ support. Fix whitespace.
+ (parse_operands): Update for parse_sys_reg changes.
+ (aarch64_features): Add "pan".
+ * doc/c-aarch64.texi (Aarch64 Extensions): Add "pan".
+
+2015-06-01 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-aarch64.c (reloc_table): New relocation modifiers.
+ (md_apply_fix): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14.
+ (aarch64_force_relocation): Ditto.
+
+2015-06-01 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-aarch64.c (reloc_table): New relocation modifiers.
+ (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15.
+ (aarch64_force_relocation): Ditto.
+
+2015-05-28 Catherine Moore <clm@codesourcery.com>
+ Bernd Schmidt <bernds@codesourcery.com>
+ Paul Brook <paul@codesourcery.com>
+
+ gas/
+ * config/tc-alpha.c (all_cfi_sections): Declare.
+ (s_alpha_ent): Initialize all_cfi_sections.
+ (alpha_elf_md_end): Invoke cfi_set_sections.
+ * config/tc-mips.c (md_apply_fix): Handle BFD_RELOC_NONE.
+ (s_ehword): Use BFD_RELOC_32_PCREL.
+ (mips_fix_adjustable): Handle BFD_RELOC_32_PCREL.
+ (mips_cfi_reloc_for_encoding): New function.
+ * tc-mips.h (DWARF2_FDE_RELOC_SIZE): Redefine.
+ (DWARF2_FDE_RELOC_ENCODING): Define.
+ (tc_cfi_reloc_for_encoding): Define.
+ (mips_cfi_reloc_for_encoding): Define.
+ (tc_compact_eh_opcode_stop): Define.
+ (tc_compact_eh_opcode_pad): Define.
+ * doc/as.texinfo: Document Compact EH extensions.
+ * doc/internals.texi: Likewise.
+ * dw2gencfi.c (EH_FRAME_LINKONCE): Redefine.
+ (tc_cfi_reloc_for_encoding): Provide default.
+ (compact_eh): Declare.
+ (emit_expr_encoded): New function.
+ (get_debugseg_name): Add Compact EH support.
+ (alloc_debugseg_item): Likewise.
+ (cfi_set_sections): New function.
+ (dot_cfi_fde_data): New function.
+ (dot_cfi_personality_id): New function.
+ (dot_cfi_inline_lsda): New function.
+ (cfi_pseudo_table): Add cfi_fde_data, cfi_personality_id,
+ and cfi_inline_lsda.
+ (dot_cfi_personality): Add Compact EH support.
+ (dot_cfi_lsda): Likewise.
+ (dot_cfi_sections): Likewise.
+ (dot_cfi_startproc): Likewise.
+ (get_cfi_seg): Likewise.
+ (output_compact_unwind_data): New function.
+ (output_cfi_insn): Add Compact EH support.
+ (output_cie): Likewise.
+ (output_fde): Likewise.
+ (cfi_finish): Likewise.
+ (cfi_emit_eh_header): New function.
+ (output_eh_header): New function.
+ * dw2gencfi.h (cfi_set_sections): Declare.
+ (SUPPORT_COMPACT_EH): Define.
+ (MULTIPLE_FRAME_SECTIONS): Define.
+ New enumeration to describe the Compact EH header format.
+ (fde_entry): Add new fields personality_id, eh_header_type, eh_data_size,
+ eh_data, eh_loc and sections.
+ (CFI_EMIT_eh_frame, CFI_EMIT_debug_frame, CFI_EMIT_target,
+ CFI_EMIT_eh_frame_compact): Define.
+
+2015-05-26 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (xtensa_move_literals): Check that
+ search_frag is non-NULL. Report error if literal frag is not
+ found.
+
+2015-05-22 Nick Clifton <nickc@redhat.com>
+
+ PR gas/18446
+ * read.c (output_big_sleb128): Use U suffix to prevent compile
+ time warning.
+
+2015-05-19 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-aarch64.c (process_movw_reloc_info): Sort relocation case
+ labels alphabetically.
+ (md_apply_fix): Ditto.
+ (aarch64_force_relocation): Ditto.
+
+2015-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutis/18386
+ * config/tc-i386.c (OPTION_MAMD64): New.
+ (OPTION_MINTEL64): Likewise.
+ (md_longopts): Add -mamd64 and -mintel64.
+ (md_parse_option): Handle OPTION_MAMD64 and OPTION_MINTEL64.
+ (md_show_usage): Add -mamd64 and -mintel64.
+ * doc/c-i386.texi: Document -mamd64 and -mintel64.
+
+2015-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (shared): New.
+ (OPTION_MSHARED): Likewise.
+ (elf_symbol_resolved_in_segment_p): Add relocation argument.
+ Check PLT relocations and shared.
+ (md_estimate_size_before_relax): Pass fragP->fr_var to
+ elf_symbol_resolved_in_segment_p.
+ (md_longopts): Add -mshared.
+ (md_show_usage): Likewise.
+ (md_parse_option): Handle OPTION_MSHARED.
+ * doc/c-i386.texi: Document -mshared.
+
+2015-05-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * write.c (compress_debug): Don't write the zlib header, which
+ is handled by bfd_update_compression_header.
+
+2015-05-13 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (xtensa_relax_frag): Allow trampoline to be
+ closer than J_RANGE / 2 to jump frag.
+
+2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.tgt (arch): Set to iamcu for i386-*-elfiamcu target.
+ * config/tc-i386.c (i386_mach): Support iamcu.
+ (i386_target_format): Likewise.
+
+2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add iamcu.
+ (i386_align_code): Handle PROCESSOR_IAMCU.
+ (i386_arch): Likewise.
+ (i386_mach): Likewise.
+ (i386_target_format): Likewise.
+ (valid_iamcu_cpu_flags): New function.
+ (check_cpu_arch_compatible): Only allow Intel MCU instructions
+ when targeting Intel MCU.
+ (set_cpu_arch): Call valid_iamcu_cpu_flags to check if CPU flags
+ are valid for Intel MCU.
+ (md_parse_option): Likewise.
+ * tc-i386.h (ELF_TARGET_IAMCU_FORMAT): New.
+ (processor_type): Add PROCESSOR_IAMCU.
+ * doc/c-i386.texi: Document iamcu.
+
+2015-05-08 Nick Clifton <nickc@redhat.com>
+
+ PR gas/18347
+ * config/tc-arm.h (TC_EQUAL_IN_INSN): Define.
+ * config/tc-arm.c (arm_tc_equal_in_insn): New function. Move
+ the symbol name checking code to here from...
+ (md_undefined_symbo): ... here.
+
+2015-05-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (elf_symbol_resolved_in_segment_p): New.
+ (md_estimate_size_before_relax): Use it.
+
+2015-05-06 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c: Typo in comment fixed.
+
+2015-05-06 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (sparc_ip): Support the %ncc "natural"
+ condition codes
+ * doc/c-sparc.texi (Sparc-Regs): Document %ncc.
+
+2015-05-06 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (Dollar Local Labels): Note that these are only
+ supported on some targets.
+
+2015-05-06 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (mapping_state): Recording alignment before exit.
+
+2015-05-05 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (aarch64_init_frag): Always generate mapping
+ symbols.
+
+2015-05-05 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c (MAX_OP_LEN): Increase to 4096.
+ (msp430_make_init_symbols): New function.
+ (msp430_section): Call it.
+ (msp430_frob_section): Likewise.
+
+2015-05-02 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (cached_fixupS, fixup_cacheS): New typedefs.
+ (struct cached_fixup, struct fixup_cache): New structures.
+ (fixup_order, xtensa_make_cached_fixup),
+ (xtensa_realloc_fixup_cache, xtensa_cache_relaxable_fixups),
+ (xtensa_find_first_cached_fixup, xtensa_delete_cached_fixup),
+ (xtensa_add_cached_fixup): New functions.
+ (xtensa_relax_frag): Cache fixups pointing at potentially
+ oversized jumps at the beginning of every relaxation pass. Only
+ check subset of this cache in the reach of single jump from the
+ trampoline frag currently being relaxed.
+
+2015-05-01 Nick Clifton <nickc@redhat.com>
+
+ * config/rl78-parse.y (MULU): Remove ISA_G14.
+ (MULH, DIVHU, DIVWU, MACHI, MACH): Update error strings.
+
+2015-05-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_elf_emit_arch_note): Removed.
+ * config/tc-i386.h (md_end): Likewise.
+ (i386_elf_emit_arch_note): Likewise.
+
+2015-05-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.tgt: Support i386-*-elf*.
+
+2015-04-30 DJ Delorie <dj@redhat.com>
+
+ * config/rl78-defs.h (rl78_isa_g10): New.
+ (rl78_isa_g13): New.
+ (rl78_isa_g14): New.
+ * config/rl78-parse.y (ISA_G10): New.
+ (ISA_G13): New.
+ (ISA_G14): New.
+ (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
+ * config/tc-rl78.c (rl78_isa_g10): New.
+ (rl78_isa_g13): New.
+ (rl78_isa_g14): New.
+
+2015-04-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_target_format): Use "else if" on
+ cpu_arch_isa.
+
+2015-04-30 Nick Clifton <nickc@redhat.com>
+
+ PR gas/18347
+ * config/tc-arm.c (md_undefined_symbol): Issue a warning message
+ (if enabled) when the user creates a symbol with the same name as
+ an ARM instruction.
+ (flag_warn_syms): New static variable.
+ (arm_opts): Add mwarn-syms and mno-warn-syms.
+ * doc/c-arm.texi (ARM Options): Document the -m[no-]warn-syms
+ options.
+
+ PR gas/18353
+ * doc/as.texinfo (Zero): Add documentation of the .zero pseudo-op.
+
+2015-04-29 Nick Clifton <nickc@redhat.com>
+
+ PR 18256
+ * config/tc-arm.c (encode_arm_cp_address): Issue an error message
+ if the operand is neither a register nor a vector.
+
+2015-04-29 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (Set): Note that a symbol cannot be set multiple
+ times if the expression is not constant and the target uses linker
+ relaxation.
+
+2015-04-28 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-arm.c (arm_init_frag): Always emit mapping symbols.
+
2015-04-28 Nick Clifton <nickc@redhat.com>
PR 18313
projects / deliverable / binutils-gdb.git / blobdiff