cpu,opcodes,gas: fix neg and neg32 instructions in BPF
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 4a8bb549b34ca0faea1d5490aabce4719ce06f24..ef3a47cd8c950f54dda7d6eef84b205737dd5a8f 100644 (file)
@@ -1,3 +1,401 @@
+2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
+       * testsuite/gas/bpf/alu-be.d: Likewise.
+       * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
+       * testsuite/gas/bpf/alu32-be.d: Likewise.
+
+2020-01-30  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/x86-64-branch-2.s,
+       testsuite/gas/i386/x86-64-branch-4.s,
+       testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
+       * testsuite/gas/i386/ilp32/x86-64-branch.d,
+       testsuite/gas/i386/x86-64-branch-2.d,
+       testsuite/gas/i386/x86-64-branch-4.l,
+       testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
+
+2020-01-30  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): .
+       testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
+       testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
+       Add LRETQ case.
+       testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
+       suffix.
+       testsuite/gas/i386/x86_64.s: Add RETF cases.
+       * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
+       testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
+       testsuite/gas/i386/x86-64-opcode.d,
+       testsuite/gas/i386/x86-64-suffix-intel.d,
+       testsuite/gas/i386/x86-64-suffix.d,
+       testsuite/gas/i386/x86_64-intel.d
+       testsuite/gas/i386/x86_64.d: Adjust expectations.
+       * testsuite/gas/i386/x86-64-suffix.e,
+       testsuite/gas/i386/x86_64.e: New.
+
+2020-01-30  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
+       special case.
+
+2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/25445
+       * config/tc-i386.c (check_long_reg): Also convert to QWORD for
+       movsxd.
+       * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
+       differences.  Document movslq and movsxd.
+       * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
+       * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
+       * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
+       * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
+       * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
+       * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
+       * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
+       * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
+       * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
+       * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
+       * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
+
+2020-01-27  Alan Modra  <amodra@gmail.com>
+
+       * testsuite/gas/all/gas.exp: Replace case statements with switch
+       statements.
+       * testsuite/gas/elf/elf.exp: Likewise.
+       * testsuite/gas/macros/macros.exp: Likewise.
+       * testsuite/lib/gas-defs.exp: Likewise.
+
+2020-01-27  Tamar Christina  <tamar.christina@arm.com>
+
+       PR 25403
+       * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
+       * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
+
+2020-01-22  Maxim Blinov  <maxim.blinov@embecosm.com>
+
+       * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
+       s exts must be known, so rename *ok* to *fail*.
+       * testsuite/gas/riscv/march-ok-sx.d: Likewise.
+       * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
+       * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
+       above change.
+       * testsuite/gas/riscv/march-fail-sx.l: Likewise.
+       * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
+
+2020-01-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/25438
+       * config/tc-i386.c (check_long_reg): Always disallow double word
+       suffix in mnemonic with word general register.
+       * testsuite/gas/i386/general.s: Replace word general register
+       with double word general register for movl.
+       * testsuite/gas/i386/inval.s: Add tests for movl with word general
+       register.
+       * testsuite/gas/i386/general.l: Updated.
+       * testsuite/gas/i386/inval.l: Likewise.
+
+2020-01-22  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
+       __tls_get_addr_desc and __tls_get_addr_opt.
+
+2020-01-21  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/inval-crc32.s,
+       testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
+       * testsuite/gas/i386/inval-crc32.l,
+       testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
+
+2020-01-21  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): Merge CRC32 handling into
+       generic code path. Deal with No_lSuf being set in a template.
+       * testsuite/gas/i386/inval-crc32.l,
+       testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
+       instead of error(s) when operand size is ambiguous.
+       * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
+       testsuite/gas/i386/noreg64.s: Add CRC32 tests.
+       * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
+       testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
+       testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
+       Adjust expectations.
+
+2020-01-21  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): Drop SYSRET special case
+       and an intel_syntax check. Re-write lack-of-suffix processing
+       logic.
+       * doc/c-i386.texi: Document operand size defaults for suffix-
+       less AT&T syntax insns.
+       * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
+       testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
+       testsuite/gas/i386/x86-64-avx-scalar.s,
+       testsuite/gas/i386/x86-64-avx.s,
+       testsuite/gas/i386/x86-64-bundle.s,
+       testsuite/gas/i386/x86-64-intel64.s,
+       testsuite/gas/i386/x86-64-lock-1.s,
+       testsuite/gas/i386/x86-64-opcode.s,
+       testsuite/gas/i386/x86-64-sse2avx.s,
+       testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
+       * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
+       testsuite/gas/i386/x86-64-nops.s,
+       testsuite/gas/i386/x86-64-ptwrite.s,
+       testsuite/gas/i386/x86-64-simd.s,
+       testsuite/gas/i386/x86-64-sse-noavx.s,
+       testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
+       insns.
+       * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
+       testsuite/gas/i386/noreg64.s: Add further tests.
+       * testsuite/gas/i386/ilp32/x86-64-nops.d,
+       testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
+       testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
+       testsuite/gas/i386/sse-noavx.d,
+       testsuite/gas/i386/x86-64-intel64.d,
+       testsuite/gas/i386/x86-64-nops.d,
+       testsuite/gas/i386/x86-64-opcode.d,
+       testsuite/gas/i386/x86-64-ptwrite-intel.d,
+       testsuite/gas/i386/x86-64-ptwrite.d,
+       testsuite/gas/i386/x86-64-simd-intel.d,
+       testsuite/gas/i386/x86-64-simd-suffix.d,
+       testsuite/gas/i386/x86-64-simd.d,
+       testsuite/gas/i386/x86-64-sse-noavx.d
+       testsuite/gas/i386/x86-64-suffix.d,
+       testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
+       * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
+       testsuite/gas/i386/noreg64.l: New.
+       * testsuite/gas/i386/i386.exp: Run new tests.
+
+2020-01-21  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/avx512_bf16_vl.s,
+       testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
+       of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
+       broadcast forms of VCVTNEPS2BF16.
+       * testsuite/gas/i386/avx512_bf16_vl.d,
+       testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
+
+2020-01-20  Nick Clifton  <nickc@redhat.com>
+
+       * po/uk.po: Updated Ukranian translation.
+
+2020-01-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/25416
+       * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
+       for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
+       x32 object.
+       * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
+       * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
+       R_X86_64_GOTPC32_TLSDESC relocation.
+
+2020-01-18  Nick Clifton  <nickc@redhat.com>
+
+       * configure: Regenerate.
+       * po/gas.pot: Regenerate.
+
+2020-01-18  Nick Clifton  <nickc@redhat.com>
+
+       Binutils 2.34 branch created.
+
+2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
+       with vex_encoding_vex.
+       (parse_insn): Likewise.
+       * doc/c-i386.texi: Replace {vex2} with {vex}.  Update {vex}
+       and {vex3} documentation.
+       * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
+       {vex}.
+       * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
+
+2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       PR 25376
+       * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
+       (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
+       * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
+       * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
+       * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
+       * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
+
+2020-01-16  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (match_template): Drop found_cpu_match local
+       variable.
+
+2020-01-16  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/avx512dq-inval.l,
+       testsuite/gas/i386/avx512dq-inval.s: New.
+       * testsuite/gas/i386/i386.exp: Run new test.
+
+2020-01-15  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+
+       * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
+       relocations when the target is 430X, except when extracting part of an
+       expression.
+       (msp430_srcoperand): Adjust comment.
+       Initialize the expp member of the msp430_operand_s struct as
+       appropriate.
+       (msp430_dstoperand): Likewise.
+       * testsuite/gas/msp430/msp430.exp: Run new test.
+       * testsuite/gas/msp430/reloc-lo-430x.d: New test.
+       * testsuite/gas/msp430/reloc-lo-430x.s: New test.
+
+2020-01-15  Alan Modra  <amodra@gmail.com>
+
+       * configure.tgt: Add sparc-*-freebsd case.
+
+2020-01-14  Lili Cui <lili.cui@intel.com>
+
+       * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
+       * testsuite/gas/i386/align-branch-1b.d: Likewise.
+       * testsuite/gas/i386/align-branch-1c.d: Likewise.
+       * testsuite/gas/i386/align-branch-1d.d: Likewise.
+       * testsuite/gas/i386/align-branch-1e.d: Likewise.
+       * testsuite/gas/i386/align-branch-1f.d: Likewise.
+       * testsuite/gas/i386/align-branch-1g.d: Likewise.
+       * testsuite/gas/i386/align-branch-1h.d: Likewise.
+       * testsuite/gas/i386/align-branch-1i.d: Likewise.
+       * testsuite/gas/i386/align-branch-5.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
+       * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
+       * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
+       x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
+
+2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
+
+       PR 25377
+       * config/tc-z80.c: Add support for half precision, single
+       precision and double precision floating point values.
+       * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
+       * doc/as.texi: Add new z80 command line options.
+       * doc/c-z80.texi: Document new z80 command line options.
+       * testsuite/gas/z80/ez80_pref_dis.s: New test.
+       * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
+       * testsuite/gas/z80/z80.exp: Run the new test.
+       * testsuite/gas/z80/fp_math48.d: Use correct command line option.
+       * testsuite/gas/z80/fp_zeda32.d: Likewise.
+       * testsuite/gas/z80/strings.d: Update expected output.
+
+2020-01-13  Matthew Malcomson  <matthew.malcomson@arm.com>
+
+       * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
+       dependency.
+
+2020-01-13  Claudiu Zissulescu  <claziss@gmail.com>
+
+       * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
+       the CPU.
+       * config/tc-arc.h: Add header if/defs.
+       * testsuite/gas/arc/pseudos.d: Improve matching pattern.
+
+2020-01-13  Alan Modra  <amodra@gmail.com>
+
+       * testsuite/gas/wasm32/allinsn.d: Update expected output.
+
+2020-01-13  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
+       insertion.
+
+2020-01-10  Alan Modra  <amodra@gmail.com>
+
+       * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
+       * testsuite/gas/elf/pr21661.d: Don't run on hpux.
+
+2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
+
+       PR 25224
+       * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
+       opcode byte values.
+       (emit_ld_r_r): Likewise.
+       (emit_ld_rr_m): Likewise.
+       (emit_ld_rr_nn): Likewise.
+
+2020-01-09  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (optimize_encoding): Add
+       is_any_vex_encoding() invocations. Drop respective
+       i.tm.extension_opcode == None checks.
+
+2020-01-09  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (md_assemble): Check RegRex is clear during
+       REX transformations. Correct comment indentation.
+
+2020-01-09  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (optimize_encoding): Generalize register
+       transformation for TEST optimization.
+
+2020-01-09  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/x86-64-sysenter-amd.s,
+       testsuite/gas/i386/x86-64-sysenter-amd.d,
+       testsuite/gas/i386/x86-64-sysenter-amd.l,
+       testsuite/gas/i386/x86-64-sysenter-intel.d,
+       testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
+       * testsuite/gas/i386/i386.exp: Run new tests.
+
+2020-01-08  Nick Clifton  <nickc@redhat.com>
+
+       PR 25284
+       * doc/as.texi (Align): Document the fact that all arguments can be
+       omitted.
+       (Balign): Likewise.
+       (P2align): Likewise.
+
+2020-01-08  Nick Clifton  <nickc@redhat.com>
+
+       PR 14891
+       * config/obj-elf.c (obj_elf_section): Fail if the section name is
+       already defined as a different symbol type.
+       * testsuite/gas/elf/pr14891.s: New test source file.
+       * testsuite/gas/elf/pr14891.d: New test driver.
+       * testsuite/gas/elf/pr14891.s: New test expected error output.
+       * testsuite/gas/elf/elf.exp: Run the new test.
+
+2020-01-08  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-z8k.c (md_begin): Make idx unsigned.
+       (get_specific): Likewise for this_index.
+
+2020-01-07  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * onfig/tc-arc.c (parse_reloc_symbol): New function.
+       (tokenize_arguments): Clean up, use parse_reloc_symbol function.
+       (md_operand): Set X_md to absent.
+       (arc_parse_name): Check for X_md.
+
+2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
+
+       PR 25311
+       * as.h (TC_STRING_ESCAPES): Provide a default definition.
+       * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
+       NO_STRING_ESCAPES.
+       * read.c (next_char_of_string): Likewise.
+       * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
+       * config/tc-z80.h (TC_STRING_ESCAPES): Define.
+
+2020-01-03  Nick Clifton  <nickc@redhat.com>
+
+       * po/sv.po: Updated Swedish translation.
+
+2020-01-03  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
+       * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
+
 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 
        * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
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