+2018-04-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/22318
+ * configure: Regenerated.
+
+2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/23025
+ * testsuite/gas/i386/prefix.s: Add tests for vcvtpd2dq with
+ VEX and EVEX prefixes.
+ * testsuite/gas/i386/prefix.d: Updated.
+
+2018-03-30 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR binutils/23013
+ * config/tc-ppc.c (ppc_set_cpu): Select appropriate cpu when ppc_obj64
+ and little endian.
+
+2018-03-28 Renlin Li <renlin.li@arm.com>
+
+ PR ld/22970
+ * config/tc-aarch64.c (reloc_table): Update entry for tprel_lo12 and
+ tprel_lo12_nc with pseudo relocations.
+ (ldst_lo12_determine_real_reloc_type): Add new relocations support.
+ (parse_operands): Handle BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12 and
+ BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC pseudo relocations.
+ (md_apply_fix): Add handling for new relocation.
+ (aarch64_force_relocation): Likewise.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.s: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.s: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.s: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.s: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.s: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.s: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.s: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.s: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d: New.
+ * testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d: New.
+
+2018-03-28 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_VecOperands): Replace uses of
+ .vecesize. Always initialize op.
+ * testsuite/gas/i386/avx512_vpopcntdq.s,
+ testsuite/gas/i386/avx512bitalg_vl.s: Add Intel syntax vpopcnt
+ broadcast cases with explicit operand size.
+ * testsuite/gas/i386/avx512_vpopcntdq.d,
+ testsuite/gas/i386/avx512_vpopcntdq-intel.d,
+ testsuite/gas/i386/avx512bitalg_vl.d
+ testsuite/gas/i386/avx512bitalg_vl-intel.d: Adjust expectations.
+
+2018-03-28 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (struct Broadcast_Operation): Adjust comment.
+ (check_VecOperands): Re-write broadcast validation code.
+ (check_VecOperations): Replace BROADCAST_1TO* uses.
+ * testsuite/gas/i386/inval-avx512f.s: Add various broadcast
+ cases.
+ * testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
+
+2018-03-28 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Check .todword/.toqword
+ before zapping suffix.
+
+2018-03-28 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/ilp32/x86-64-simd-suffix.d,
+ testsuite/gas/i386/x86-64-simd-suffix.d: Drop q suffix from
+ cvt*2si.
+
+2018-03-28 Nick Clifton <nickc@redhat.com>
+
+ PR 22988
+ * config/tc-aarch64.c (parse_operands): Add code to handle
+ AARCH64_OPN_SVE_ADDR_R.
+ * testsuite/gas/aarch64/sve.s: Add tests for LDFF1xx instructions
+ with an assumed XZR offset address register.
+ * testsuite/gas/aarch64/sve.d: Update expected disassembly.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_VecOperands): Latch
+ i.broadcast->operand into op.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_template): Special case base opcode
+ 0xa0 with HLE prefix.
+ * testsuite/gas/i386/hle.s: Add mov-accumulator-to-disp cases.
+ * testsuite/gas/i386/hle.d, testsuite/gas/i386/hle-intel.d:
+ Adjust expectations.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/opts.s: Add bndmov cases.
+ * testsuite/gas/i386/opts.d, testsuite/gas/i386/opts-intel.d,
+ testsuite/gas/i386/sse2avx-opts.d,
+ testsuite/gas/i386/sse2avx-opts-intel.d: Adjust expectations.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_mem_size): Extend sub-xmmword
+ exceptions.
+ * testsuite/gas/i386/xmmword.l, testsuite/gas/i386/xmmword.s:
+ New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_template): Also match 2nd and 4th
+ operand's register sizes.
+ * testsuite/gas/i386/unspec.l, testsuite/gas/i386/unspec.s: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2018-03-19 Nick Clifton <nickc@redhat.com>
+
+ * po/uk.po: Updated Ukranian translation.
+
+2018-03-16 Jim Wilson <jimw@sifive.com>
+
+ * config/tc-riscv.c (check_absolute_expr): Expand comment. New
+ parameter maybe_csr. If maybe_csr and O_symbol, print CSR name.
+ (riscv_ip): Add new argument to check_absolute_expr calls.
+ * testsuite/gas/riscv/bad-csr.d: New.
+ * testsuite/gas/riscv/bad-csr.l: New.
+ * testsuite/gas/riscv/bad-csr.s: New.
+
+2018-03-14 Kito Cheng <kito.cheng@gmail.com>
+
+ * config/tc-riscv.c (opcode_name_list): New.
+ (opcode_names_hash): Likewise.
+ (init_opcode_names_hash): Likewise.
+ (opcode_name_lookup): Likewise.
+ (validate_riscv_insn): New argument length, and add new format
+ which used in .insn directive.
+ (md_begin): Refine hash table initialization logic into
+ init_opcode_hash.
+ (init_opcode_hash): New.
+ (my_getOpcodeExpression): Parse opcode name for .insn.
+ (riscv_ip): New argument hash, able to handle .insn directive.
+ (s_riscv_insn): Handler for .insn directive.
+ (riscv_pseudo_table): New entry for .insn.
+ * doc/c-riscv.texi: Add documentation for .insn directive.
+ * testsuite/gas/riscv/insn.d: Add testcase for .insn directive.
+ * testsuite/gas/riscv/insn.s: Likewise.
+
+2018-03-13 Nick Clifton <nickc@redhat.com>
+
+ * po/ru.po: Updated Russian translation.
+
+2018-03-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (optimize_encoding): Encode EVEX instructions
+ with VEX128 if EVEX encoding isn't required.
+ * testsuite/gas/i386/optimize-1.d: Updated.
+ * testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
+
+2018-03-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (check_VecOperations): Strip whitespace.
+ * testsuite/gas/i386/optimize-1.s: Add whitespaces before
+ {%k7} and {z},
+ * testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
+
+2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (set_cpu_arch): Set cpu_arch_isa_flags.
+ (md_parse_option): Likewise.
+ (optimize_encoding): Check i.tm.cpu_flags and cpu_arch_isa_flags
+ for cpuavx512vl instead of cpu_arch_flags. Optimize EVEX with
+ EVEX128 when EVEX encoding is required.
+ * testsuite/gas/i386/i386.exp: Run optimize-4, optimize-5,
+ x86-64-optimize-5 and x86-64-optimize-6.
+ * testsuite/gas/i386/optimize-1.d: Updated.
+ * testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
+ * testsuite/gas/i386/optimize-4.d: New file.
+ * testsuite/gas/i386/optimize-4.s: Likewise.
+ * testsuite/gas/i386/optimize-5.d: Likewise.
+ * testsuite/gas/i386/optimize-5.s: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-5.d: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-5.s: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-6.d: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-6.s: Likewise.
+
+2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (optimize_encoding): Also encode "clr reg64"
+ as "xor reg32, reg32".
+ * testsuite/gas/i386/x86-64-optimize-1.s: Add "clr reg64" tests.
+ * testsuite/gas/i386/x86-64-optimize-1.d: Updated.
+
+2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention -mold-gcc removal.
+ * config/tc-i386.c (i386_error): Remove old_gcc_only.
+ (old_gcc): Removed.
+ (match_template): Remove old gcc support.
+ (OPTION_MOLD_GCC): Removed.
+ (OPTION_MRELAX_RELOCATIONS): Updated.
+ (md_longopts): Remove OPTION_MOLD_GCC.
+ (md_parse_option): Likewise.
+ (md_show_usage): Remove -mold-gcc.
+ * testsuite/gas/i386/general.s: Convert fsub/fdiv tests for old
+ (<= 2.8.1) versions of gcc.
+ * testsuite/gas/i386/intel.s: Likewise.
+ * testsuite/gas/i386/general.l: Updated.
+ * testsuite/gas/i386/intel-intel.d: Likewise.
+ * testsuite/gas/i386/intel.d: Likewise.
+ * testsuite/gas/i386/intel.e: Likewise.
+ * testsuite/gas/i386/i386.exp: Don't pass -mold-gcc to general.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (is_evex_encoding): New.
+ (optimize_encoding, md_assemble, md_assemble,
+ VEX_check_operands, build_modrm_byte): Use is_evex_encoding.
+ (build_evex_prefix): Derive EVEX length field from actual
+ operands if the template allows multiple ones.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (build_modrm_byte): Make VexNDD handling cope
+ with 3rd (immediate) operand.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (XMMWORD_MNEM_SUFFIX, YMMWORD_MNEM_SUFFIX,
+ ZMMWORD_MNEM_SUFFIX): Delete.
+ (process_suffix): Drop their uses. Re-arrange final part of
+ logic into a switch() statement. Drop special casing of
+ cmpxchg8b.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_template): Also match register
+ operands 0 and 2 for 3-operand forms.
+ * testsuite/gas/i386/unspec64.l, testsuite/gas/i386/unspec64.s:
+ New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Do common part of register
+ checks first.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (parse_insn): Move success return up. Combine
+ failure returns.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (cpu_flags_match): Add GFNI check to AVX
+ logic. Add respective logic for AVX512F.
+ * testsuite/gas/i386/arch-avx-1.s: Add GFNI test.
+ testsuite/gas/i386/arch-avx-1.d,
+ testsuite/gas/i386/arch-avx-1-1.l,
+ testsuite/gas/i386/arch-avx-1-2.l,
+ testsuite/gas/i386/arch-avx-1-3.l,
+ testsuite/gas/i386/arch-avx-1-4.l,
+ testsuite/gas/i386/arch-avx-1-5.l,
+ testsuite/gas/i386/arch-avx-1-6.l: Adjust expectations.
+ * testsuite/gas/i386/arch-avx-1-7.l,
+ testsuite/gas/i386/arch-avx-1-7.s,
+ testsuite/gas/i386/arch-avx-1-8.l,
+ testsuite/gas/i386/arch-avx-1-8.s,
+ testsuite/gas/i386/avx512f-plain.l,
+ testsuite/gas/i386/avx512f-plain.s,
+ testsuite/gas/i386/avx512vl-plain.l,
+ testsuite/gas/i386/avx512vl-plain.s: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (cpu_flags_match): Move AVX512VL check ahead.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (CPU_FLAGS_32BIT_MATCH): Delete.
+ (cpu_flags_match): Use CPU_FLAGS_ARCH_MATCH instead of
+ CPU_FLAGS_32BIT_MATCH.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (CPU_FLAGS_AES_MATCH, CPU_FLAGS_AVX_MATCH,
+ CPU_FLAGS_PCLMUL_MATCH): Delete.
+ (CPU_FLAGS_32BIT_MATCH): Drop uses of deleted CPU_FLAGS_*_MATCH.
+ (cpu_flags_match): Combine AVX checks into
+ single if().
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (cpu_flags_match): Drop "else" branches
+ setting CPU_FLAGS_ARCH_MATCH.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_assemble): Extend SSE check conditional.
+ * testsuite/gas/i386/ilp32/x86-64-sse-check-none.d,
+ testsuite/gas/i386/ilp32/x86-64-sse-check-warn.d,
+ testsuite/gas/i386/ilp32/x86-64-sse-check.d,
+ testsuite/gas/i386/sse-check-none.d,
+ testsuite/gas/i386/sse-check-warn.d,
+ testsuite/gas/i386/x86-64-sse-check.d,
+ testsuite/gas/i386/x86-64-sse-check-none.d,
+ testsuite/gas/i386/x86-64-sse-check-warn.d: Refer to sse-check.d.
+ * testsuite/gas/i386/sse-check.s: Add AES, GFNI, and PCLMUL
+ tests.
+ * testsuite/gas/i386/sse-check-none.s: Replace code by inclusion
+ of sse-check.s.
+ * testsuite/gas/i386/sse-check.d: Adjust expectations.
+ * testsuite/gas/i386/sse-check-error.l,
+ testsuite/gas/i386/x86-64-sse-check-error.l: Likewise.
+ * testsuite/gas/i386/sse-check-warn.e: Likewise.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (operand_size_match): Drop / replace uses of
+ .floatd.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/intel-intel.d: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_operands): Access operands only
+ after operand count assertion. Sanitize warning text. Fix
+ indentation.
+ * testsuite/gas/i386/avx512_4fmaps-warn.l,
+ gas/i386/x86-64-avx512_4fmaps-warn.l: Adjust expectations.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/x86-64-movd.s: Drop bogus vmovd memory forms.
+ * testsuite/gas/i386/x86-64-movd.d,
+ testsuite/gas/i386/x86-64-movd-intel.d: Adjust expectations.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (operand_type_and_not): New.
+ (build_modrm_byte): Use it to prevent clearing unrelated bits.
+
+2018-03-08 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_handle_align): Correct last patch. Really
+ don't emit a group terminating nop for power9. Simplify cpu
+ tests.
+
+2018-03-08 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_handle_align): Don't emit a group
+ terminating nop for power9.
+
+2018-03-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/22874
+ * config/tc-i386.c (f32_5): Removed.
+ (f32_8): Likewise.
+ (f32_9): Likewise.
+ (f32_10): Likewise.
+ (f32_11): Likewise.
+ (f32_12): Likewise.
+ (f32_13): Likewise.
+ (f32_14): Likewise.
+ (f16_5): Likewise.
+ (f16_6): Likewise.
+ (f16_7): Likewise.
+ (f16_8): Likewise.
+ (jump_31): Likewise.
+ (alt64_11): Likewise.
+ (alt64_patt): Likewise.
+ (jump_disp8): New.
+ (jump32_disp32): Likewise.
+ (jump16_disp32): Likewise.
+ (alt_11): Likewise.
+ (f32_patt): Updated.
+ (f16_patt): Likewise.
+ (alt_patt): Add alt_11.
+ (i386_align_code): Merged with ...
+ (i386_generate_nops): This. Rewritten.
+ (fits_in_imm7): Moved before i386_generate_nops.
+ (fits_in_imm31): Likewise.
+ * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Updated to
+ 4095.
+ (i386_align_code): Removed.
+ (HANDLE_ALIGN): Rewritten with i386_generate_nops.
+ * doc/as.texinfo: Update limits of control byte for x86 .nops
+ directive.
+ * testsuite/gas/i386/i386.exp: Run nops-7 and x86-64-nops-7.
+ * gas/testsuite/gas/i386/noavx-3.l: Updated.
+ * gas/testsuite/gas/i386/nop-1.d: Likewise.
+ * gas/testsuite/gas/i386/nop-1.s: Likewise.
+ * gas/testsuite/gas/i386/nop-2.d: Likewise.
+ * gas/testsuite/gas/i386/nop-2.s: Likewise.
+ * gas/testsuite/gas/i386/nop-3.d: Likewise.
+ * gas/testsuite/gas/i386/nop-4.d: Likewise.
+ * gas/testsuite/gas/i386/nop-5.d: Likewise.
+ * gas/testsuite/gas/i386/nop-5.s: Likewise.
+ * gas/testsuite/gas/i386/nop-6.d: Likewise.
+ * gas/testsuite/gas/i386/nop-bad-1.l: Likewise.
+ * gas/testsuite/gas/i386/nops-1-core2.d: Likewise.
+ * gas/testsuite/gas/i386/nops-1-i386-i686.d: Likewise.
+ * gas/testsuite/gas/i386/nops-1-i386.d: Likewise.
+ * gas/testsuite/gas/i386/nops-1-i686.d: Likewise.
+ * gas/testsuite/gas/i386/nops-1-k8.d: Likewise.
+ * gas/testsuite/gas/i386/nops-1.d: Likewise.
+ * gas/testsuite/gas/i386/nops-2-core2.d: Likewise.
+ * gas/testsuite/gas/i386/nops-2-i386.d: Likewise.
+ * gas/testsuite/gas/i386/nops-2.d: Likewise.
+ * gas/testsuite/gas/i386/nops-3-i386.d: Likewise.
+ * gas/testsuite/gas/i386/nops-3-i686.d: Likewise.
+ * gas/testsuite/gas/i386/nops-3.d: Likewise.
+ * gas/testsuite/gas/i386/nops-4-i386.d: Likewise.
+ * gas/testsuite/gas/i386/nops-4-i686.d: Likewise.
+ * gas/testsuite/gas/i386/nops-4.d: Likewise.
+ * gas/testsuite/gas/i386/nops-4a-i686.d: Likewise.
+ * gas/testsuite/gas/i386/nops-5-i686.d: Likewise.
+ * gas/testsuite/gas/i386/nops-5.d: Likewise.
+ * gas/testsuite/gas/i386/nops-6.d: Likewise.
+ * gas/testsuite/gas/i386/nops16-1.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nop-1.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nop-2.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nop-5.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-1-core2.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-1-g64.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-1-k8.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-1-pentium.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-1.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-2.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-3.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-4-core2.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-4-k8.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-4.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-5-k8.d: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-5.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-1.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-2.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-3.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-4.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
+ * gas/testsuite/gas/i386/ilp32/x86-64-nops-5.d: Likewise.
+ * gas/testsuite/gas/i386/nops-7.d: New file.
+ * gas/testsuite/gas/i386/nops-7.s: Likewise.
+ * gas/testsuite/gas/i386/x86-64-nops-7.d: Likewise.
+
+2018-03-07 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/aix.exp: Run for rs6000 too.
+ * testsuite/gas/ppc/ppc.exp: Run more tests for non-ELF targets.
+ * testsuite/gas/ppc/machine.d: Don't run for PE targets.
+
+2018-03-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (md_begin): Add NULL pointer check before
+ dereferencing march_ext_opt.
+
+2018-03-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (cpu_variant, arm_arch_used, thumb_arch_used,
+ legacy_cpu, legacy_fpu, mcpu_cpu_opt, dyn_mcpu_ext_opt,
+ mcpu_fpu_opt, march_cpu_opt, dyn_march_ext_opt, march_fpu_opt,
+ mfpu_opt, object_arch, selected_cpu): Comment meaning of variables.
+ (dyn_mcpu_ext_opt): Also rename into ...
+ (mcpu_ext_opt): This.
+ (dyn_march_ext_opt): Also rename into ...
+ (march_ext_opt): This.
+ (object_arch): Also rename into ...
+ (selected_object_arch): This and make it a plain arm_feature_set
+ structure.
+ (selected_arch, selected_ext, selected_fpu): New static variables.
+ (mark_feature_used): Fix comments, feature is marked as used iff it is
+ currently allowed.
+ (do_bx): Adapt to change in name and type of object_arch.
+ (md_begin): Set selected_arch rather than mcpu_cpu_opt, selected_ext
+ rather than dyn_mcpu_ext_opt and selected_fpu rather than mfpu_opt.
+ Remove dead code to set default FPU if architecture version is greater
+ than 5. Set all CPU bits of cpu_variant directly in autodection
+ leaving mcpu_cpu_opt, selected_arch and selected_cpu unset.
+ (arm_parse_extension): Take extension feature set pointer parameter by
+ value rather than by pointer. Remove allocation code. Adapt code
+ accordingly.
+ (arm_parse_cpu): Adapt to variable renaming and changes in
+ arm_parse_extension () signature.
+ (arm_parse_arch): Likewise.
+ (aeabi_set_public_attributes): Also set selected_arch and selected_ext
+ in addition to selected_cpu. Set flags_arch and flags_ext from them
+ instead of selected_cpu. Adapt to variables renaming and type change.
+ (arm_md_post_relax): Adapt to variable renaming.
+ (s_arm_cpu): Set selcted_cpu_cpu and selected_ext instead of
+ mcpu_cpu_opt and dyn_mcpu_ext_opt. Set selected_cpu from them and
+ cpu_variant from selected_cpu and selected_fpu.
+ (s_arm_arch): Likewise.
+ (s_arm_object_arch): Adapt to variable renaming.
+ (s_arm_arch_extension): Use ARM_CPU_IS_ANY instead of checking feature
+ set against arm_any. Check selected_arch rather than *mcpu_cpu_opt.
+ Set selected_ext rather than *dyn_mcpu_ext_opt and remove allocation
+ code.
+ (s_arm_fpu): Set selected_fpu instead of mfpu_opt. Set all CPU feature
+ bits if in autodetection mode.
+
+2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (optimize_encoding): Optimize AVX256 and
+ AVX512 vpsub[bwdq] instructions.
+ * testsuite/gas/i386/optimize-1.s: Add tests for AVX256 and
+ AVX512 vpsub[bwdq] instructions.
+ * testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
+ * testsuite/gas/i386/optimize-1.d: Updated.
+ * testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
+
+2018-03-01 Alan Modra <amodra@gmail.com>
+
+ * configure.ac (ALL_LINGUAS): Add uk. Sort.
+ * configure: Regenerate.
+
+2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Rename .nop to .nops.
+ * doc/as.texinfo: Likewise.
+ * read.c (potable): Add "nops". Remove "nop".
+ (s_nop): Renamed to ...
+ (s_nops): This.
+ * read.h (s_nop): Renamed to ...
+ (s_nops): This.
+ * write.c (cvt_frag_to_fill): Rename .nop to .nops.
+ (md_generate_nops): Likewise.
+ (relax_segment): Likewise.
+ * testsuite/gas/i386/nop-1.d: Updated.
+ * testsuite/gas/i386/nop-1.s: Likewise.
+ * testsuite/gas/i386/nop-2.d: Likewise.
+ * testsuite/gas/i386/nop-2.s: Likewise.
+ * testsuite/gas/i386/nop-3.d: Likewise.
+ * testsuite/gas/i386/nop-3.s: Likewise.
+ * testsuite/gas/i386/nop-4.d: Likewise.
+ * testsuite/gas/i386/nop-4.s: Likewise.
+ * testsuite/gas/i386/nop-5.d: Likewise.
+ * testsuite/gas/i386/nop-5.s: Likewise.
+ * testsuite/gas/i386/nop-6.d: Likewise.
+ * testsuite/gas/i386/nop-6.s: Likewise.
+ * testsuite/gas/i386/nop-bad-1.l: Likewise.
+ * testsuite/gas/i386/nop-bad-1.s: Likewise.
+ * testsuite/gas/i386/x86-64-nop-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-2.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-3.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-4.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-5.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-6.d: Likewise.
+
+2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/22871
+ * NEWS: Mention -O[2|s].
+ * config/tc-i386.c (_i386_insn): Add no_optimize.
+ (optimize): New.
+ (optimize_for_space): Likewise.
+ (fits_in_imm7): New function.
+ (fits_in_imm31): Likewise.
+ (optimize_encoding): Likewise.
+ (md_assemble): Call optimize_encoding to optimize encoding.
+ (parse_insn): Handle {nooptimize}.
+ (md_shortopts): Append "O::".
+ (md_parse_option): Handle -On.
+ * doc/c-i386.texi: Document -O0, -O, -O1, -O2 and -Os as well
+ as {nooptimize}.
+ * testsuite/gas/cfi/cfi-x86_64.d: Pass -O0 to assembler.
+ * testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise.
+ * testsuite/gas/i386/i386.exp: Run optimize-1, optimize-2,
+ optimize-3, x86-64-optimize-1, x86-64-optimize-2,
+ x86-64-optimize-3 and x86-64-optimize-4.
+ * testsuite/gas/i386/optimize-1.d: New file.
+ * testsuite/gas/i386/optimize-1.s: Likewise.
+ * testsuite/gas/i386/optimize-2.d: Likewise.
+ * testsuite/gas/i386/optimize-2.s: Likewise.
+ * testsuite/gas/i386/optimize-3.d: Likewise.
+ * testsuite/gas/i386/optimize-3.s: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-1.s: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-3.d: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-3.s: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-4.d: Likewise.
+ * testsuite/gas/i386/x86-64-optimize-4.s: Likewise.
+
+2018-02-27 Nick Clifton <nickc@redhat.com>
+
+ * po/ru.po: Updated Russian translation.
+
+2018-02-26 Maciej W. Rozycki <macro@mips.com>
+
+ * doc/as.texinfo (Pseudo Ops): Clean up `.dc' and `.ds'
+ descriptions.
+
+2018-02-26 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (Dc): Fix typo.
+
+2018-02-26 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/mips/reginfo-2.l: Update.
+
+2018-02-23 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/mips/reginfo-2.l: Update.
+
+2018-02-23 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (Pseudo Ops): Add nodes for .dc, .dcb and .ds.
+
+2018-02-23 Kuan-Lin Chen <kuanlinchentw@gmail.com>
+
+ * config/tc-nds32.c (ict_model): New function. Hook new
+ directive .ict_model.
+ (nds32_insert_relax_entry): Tag the bits of entry relocation
+ for .ict_model.
+
+2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (_i386_insn): Add rex_encoding.
+ (md_assemble): When i.rex_encoding is true, generate a REX byte
+ if possible.
+ (parse_insn): Set i.rex_encoding for {rex}.
+ * doc/c-i386.texi: Document {rex}.
+ * testsuite/gas/i386/x86-64-pseudos.s: Add {rex} tests.
+ * testsuite/gas/i386/x86-64-pseudos.d: Updated.
+
+2018-02-22 A. Wilcox <awilfox@adelielinux.org>
+
+ PR 22014
+ * config/tc-mips.c (mips_lookup_insn): Use memmove to strip the
+ instruction size suffix.
+
+2018-02-20 Maciej W. Rozycki <macro@mips.com>
+
+ * testsuite/gas/mips/mips16-branch-reloc-4.d: New test.
+ * testsuite/gas/mips/mips16-branch-reloc-5.d: New test.
+ * testsuite/gas/mips/mips16-branch-reloc-4.s: New test source.
+ * testsuite/gas/mips/mips16-branch-reloc-5.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-02-20 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (struct litpool_frag): Add new field
+ literal_count.
+ (MAX_AUTO_POOL_LITERALS, MAX_EXPLICIT_POOL_LITERALS)
+ (MAX_POOL_LITERALS): New macro definitions.
+ (auto_litpool_limit): Initialize to 0.
+ (md_parse_option): Set auto_litpool_limit in the presence of
+ --auto-litpools option.
+ (xtensa_maybe_create_literal_pool_frag): Zero-initialize
+ literal_count field.
+ (xg_find_litpool): New function. Make sure that found literal
+ pool size is within the limit.
+ (xtensa_move_literals): Extract literal pool search code into
+ the new function.
+ * testsuite/gas/xtensa/all.exp: Add auto-litpools-2 test.
+ * testsuite/gas/xtensa/auto-litpools-2.d: New file.
+ * testsuite/gas/xtensa/auto-litpools-2.s: New file.
+ * testsuite/gas/xtensa/auto-litpools.d: Fix up changed
+ addresses.
+ * testsuite/gas/xtensa/auto-litpools.s: Change literal value so
+ that objdump doesn't get out of sync.
+
+2018-02-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * doc/c-arm.texi (.arch_extension): Mention extensions it accepts are
+ also the same as -march.
+
+2018-02-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention .nop directive.
+ * as.h (_relax_state): Add rs_space_nop and rs_fill_nop.
+ * read.c (potable): Add .nop.
+ (s_nop): New function.
+ * read.h (s_nop): New prototype.
+ * write.c (cvt_frag_to_fill): Handle rs_space_nop and
+ rs_fill_nop.
+ (md_generate_nops): New function.
+ (relax_segment): Likewise.
+ (write_contents): Use md_generate_nops for rs_fill_nop.
+ * config/tc-i386.c (alt64_11): New.
+ (alt64_patt): Likewise.
+ (md_convert_frag): Handle rs_space_nop.
+ (i386_output_nops): New function.
+ (i386_generate_nops): Likewise.
+ (i386_align_code): Call i386_output_nops.
+ * config/tc-i386.h (i386_generate_nops): New.
+ (md_generate_nops): Likewise.
+ * doc/as.texinfo: Document .nop directive.
+ * testsuite/gas/i386/i386.exp: Run .nop directive tests.
+ * testsuite/gas/i386/nop-1.d: New file.
+ * testsuite/gas/i386/nop-1.s: Likewise.
+ * testsuite/gas/i386/nop-2.d: Likewise.
+ * testsuite/gas/i386/nop-2.s: Likewise.
+ * testsuite/gas/i386/nop-3.d: Likewise.
+ * testsuite/gas/i386/nop-3.s: Likewise.
+ * testsuite/gas/i386/nop-4.d: Likewise.
+ * testsuite/gas/i386/nop-4.s: Likewise.
+ * testsuite/gas/i386/nop-5.d: Likewise.
+ * testsuite/gas/i386/nop-5.s: Likewise.
+ * testsuite/gas/i386/nop-6.d: Likewise.
+ * testsuite/gas/i386/nop-6.s: Likewise.
+ * testsuite/gas/i386/nop-bad-1.l: Likewise.
+ * testsuite/gas/i386/nop-bad-1.s: Likewise.
+ * testsuite/gas/i386/x86-64-nop-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-2.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-3.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-4.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-5.d: Likewise.
+ * testsuite/gas/i386/x86-64-nop-6.d: Likewise.
+
+2018-02-15 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-arm.c (cpu_arch_ver): Renumber ARM_ARCH_V8_4A.
+ * testsuite/gas/arm/attr-march-armv8_4-a.d: New.
+
+2018-02-13 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (xg_find_best_trampoline): Skip trampoline
+ frag that contains source address.
+
+2018-02-13 Nick Clifton <nickc@redhat.com>
+
+ PR 22773
+ * config/tc-arm.c (md_apply_fix): Test Rn field of Thumb ORR
+ instruction before assuming that it is a MOV instruction.
+ * testsuite/gas/arm/pr22773.s: New test.
+ * testsuite/gas/arm/pr22773.d: New test driver.
+ * testsuite/gas/arm/pr22773.l: New expected output.
+
+2018-02-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/22791
+ * config/tc-i386.c (need_plt32_p): New function.
+ (output_jump): Generate BFD_RELOC_X86_64_PLT32 if possible.
+ (md_estimate_size_before_relax): Likewise.
+ * testsuite/gas/i386/reloc64.d: Updated.
+ * testsuite/gas/i386/x86-64-jump.d: Likewise.
+ * testsuite/gas/i386/x86-64-mpx-branch-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-mpx-branch-2.d: Likewise.
+ * testsuite/gas/i386/x86-64-relax-2.d: Likewise.
+ * testsuite/gas/i386/x86-64-relax-3.d: Likewise.
+ * testsuite/gas/i386/ilp32/reloc64.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
+
+2018-02-13 Maciej W. Rozycki <macro@mips.com>
+
+ * testsuite/gas/mips/loongson-3a-2.d: Rename test.
+
+2018-02-13 Nick Clifton <nickc@redhat.com>
+
+ PR 22823
+ * config/obj-elf.c (elf_pseudo_table): Remove now redundant
+ casts.
+ (obj_elf_vtable_inherit): Rename to obj_elf_get_vtable_inherit.
+ (obj_elf_vtable_inherit): New stub function that calls
+ obj_elf_get_vtable_inherit.
+ (obj_elf_vtable_entry): Rename to obj_elf_get_vtable_entry.
+ (obj_elf_vtable_entry): New stub function that calls
+ obj_elf_get_vtable_entry.
+ * config/obj-elf.h (obj_elf_vtable_inherit): Update prototype.
+ (obj_elf_vtable_entry) Likewise.
+ (obj_elf_get_vtable_inherit) Likewise.
+ (obj_elf_get_vtable_entry) Likewise.
+ * config/tc-arm.c (md_pseudo_table): Remove now redundant cast.
+ * config/tc-i386c (md_pseudo_table): Likewise.
+ * config/tc-hppa.c (pa_vtable_entry): Call
+ obj_elf_get_vtable_entry.
+ (pa_vtable_inherit): Call obj_elf_get_vtable_inherit.
+ * config/tc-mips.c (s_mips_file): Replace call to dwarf2_get_file
+ with call to dwarf2_get_filename.
+ * dwarf2dbg.c (dwarf2_directive_file): Rename to
+ dwarf2_directive_filename.
+ (dwarf2_directive_file): New stub function that calls
+ dwarf2_directive_filename.
+ * dwarf2dbg.h: Prototype dwarf2_directive_filename.
+
2018-02-12 Maciej W. Rozycki <macro@mips.com>
* testsuite/gas/mips/reginfo-2-n32.d: Add `--no-pad-sections' to