+Thu Oct 10 17:22:18 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config/tc-ppc.c (ppc_insert_operand): Change most warnings into
+ errors.
+ (ppc_elf_validate_fix): Ditto.
+ (md_assemble): Ditto.
+ (ppc_tc): Ditto.
+ (ppc_pe_section): Ditto.
+ (ppc_frob_symbol): Ditto.
+
+Thu Oct 10 12:05:45 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.c (md_assemble): Use FMT_* macros for
+ formats rather than hard-coded constants.
+
+ * config/tc-mn10300.c (md_assemble): Format D5 instructions
+ are 7 bytes long. Write out instructions in big-endian format.
+
+Tue Oct 8 14:56:15 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.c (md_assemble): Tweak further so
+ that all instructions are parsed correctly.
+
+Tue Oct 8 13:02:21 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * as.h: Include libiberty.h.
+ (xmalloc, xrealloc): Don't declare.
+ * as.c: Don't include libiberty.h.
+ * expr.c, read.c, stabs.c, config/obj-coff.c: Likewise.
+ * config/tc-mips.c: Likewise.
+ * messages.c: Likewise.
+ (xstrerror): Don't declare.
+ * xmalloc.c: Remove.
+
+Mon Oct 7 16:53:23 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.h (pre_defined_registers) Remove.
+ (system_registers, cc_names): Likewise.
+ (address_registers, data_registers, other_registers): New register
+ arrays.
+ (register_name, system_register_name, cc_name): Remove.
+ (mn10300_reloc_prefix): Likewise.
+ (data_register_name): New function.
+ (address_register_name, other_register_name): Likewise.
+ (md_assemble): Rough cut at parsing operands. Remove lots of
+ unwanted code.
+ (md_apply_fix3): Disable for now.
+
+Mon Oct 7 11:38:34 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * config/tc-m68k.c (select_control_regs): New function, extracted
+ out of m68k_init_after_args.
+ (m68k_init_after_args): Use it.
+ (mri_chip): Use it here as well to update set of allowed control
+ regs for movec.
+
+Mon Oct 7 11:24:29 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-elf.c (elf_begin): New function.
+ (obj_elf_section): Add the section symbol to the symbol table.
+ * config/obj-elf.h (obj_begin): Define.
+ (elf_begin): Declare.
+ * as.c (perform_an_assembly_pass): Call obj_begin if it is
+ defined.
+
+Fri Oct 4 18:37:32 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-coff.c (fixup_segment): Subtract the section address
+ from a PC relative reloc if TC_M68K.
+
+Thu Oct 3 15:15:30 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-sparc.c (md_pseudo_table): Make .uahalf, .uaword, and
+ .uaxword available even if not OBJ_ELF.
+ (md_atof): Remove unused local variable wordP.
+
+Thu Oct 3 00:16:50 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10x00.c, config/tc-mn10x00.h: New files
+ for Matsushita MN10x00 support.
+ * configure.in: Recognize mn10x00-*-*
+ * configure: Rebuilt.
+
+Wed Oct 2 15:54:03 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * obj-evax.h: move openvms definitions from here to tc-alpha.c.
+ * tc-alpha.c: add support for vms_case_hack like in vax/vms.
+ (load_expression): track clobbering of base reg before jmp/jsr.
+ (s_alpha_file): pass case_hack flags and source filename via
+ symbol table to bfd.
+ * tc-alpha.h (TC_CONS_FIX_NEW): define
+
+Tue Oct 1 16:16:01 1996 Joel Sherrill <joel@oarcorp.com>
+
+ * configure.in (mips-*-rtems*): New target, like mips-*-elf*.
+ * configure: Rebuild.
+
+Tue Oct 1 12:37:48 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * read.c (s_macro): Warn if a macro has the same name as a
+ pseudo-op.
+ (s_space): In m68k MRI mode, align to a word boundary.
+ * macro.c (define_macro): Add namep parameter. Change all
+ callers.
+ * macro.h (define_macro): Update declaration.
+
+ * as.c (show_usage): Print bug report address.
+ (parse_args): Change version printing to match current GNU
+ standards.
+ * gasp.c (show_usage): Print bug report address.
+ (main): Change version printing to match current GNU standards.
+
+ * config/tc-m68k.c (init_table): Correct access control unit
+ register numbers. From Ken Rose <rose@netcom.com>.
+
+ * config/tc-alpha.c: Add some static function prototypes.
+ (alpha_macros): Move to top of file. Make static.
+ (alpha_num_macros): Move to top of file.
+
+start-sanitize-v850
+Tue Oct 1 09:36:19 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * tc-v850.h: Define LOCAL_LABEL to recognise _.L_* symbols
+ generated by DWARF.
+
+end-sanitize-v850
+Sat Sep 28 03:38:08 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * listing.c (list_symbol_table): Remove bogus code in BFD64 case,
+ and just call sprintf_vma.
+
+Thu Sep 26 16:04:11 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * expr.c (expr): Change >>= to >> (fix typo). (From meissner).
+
+Tue Sep 24 19:05:08 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * read.c (float_cons): Call md_flush_pending_output if it is
+ defined.
+
+start-sanitize-d10v
+Tue Sep 24 12:22:18 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (md_operand): Created. Allows operands to
+ start with '#'.
+ * config/tc-d10v.h (md_operand): Undefined.
+
+end-sanitize-d10v
+Mon Sep 23 12:13:18 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-m68k.c (add_fix): Treat a width of '3' like 'B'.
+ (md_assemble): A fixup width of '3' means a 1 byte reloc.
+
+Thu Sep 19 12:21:24 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-coff.c (fixup_segment): Don't adjust PC relative
+ reloc for the i960 for a reloc in the same section. This undoes
+ one of the two changes made Aug 19.
+
+Wed Sep 18 12:11:58 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-coff.c (obj_coff_endef): Both versions: Move C_STAT
+ symbols to the position of the debugging information.
+
+Mon Sep 16 11:41:40 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * expr.c (expr): Always use unsigned right shifts for >>.
+
+Thu Sep 12 10:25:45 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-arm.c (md_apply_fix3): Update two thumb instruction
+ slots when processing BL fixups.
+
+ * config/tc-arm.c (output_inst): Ensure Thumb BL fixup is marked
+ on the first half of the instruction.
+
+Wed Sep 11 00:09:35 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.c (ecoff_stab): Create an expression symbol for a complex
+ stabs expression, rather than giving an error.
+
+ * ecoff.c (ecoff_new_file): Don't do anything if we are still in
+ the same file.
+
+Tue Sep 10 11:45:37 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (append_insn): Fill in the value for a constant
+ jump, rather than creating a reloc.
+
+Mon Sep 9 10:57:42 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (append_insn): Don't swap an instruction which
+ sets a condition code with an instruction which uses a condition
+ code.
+ (mips_ip): In cases 'N' and 'M', look for $fccN rather than an
+ immediate value.
+
+ * config/tc-mips.c (md_begin): Recognize r5000 for cpu.
+ (mips_ip): Give a better error message if the ISA level is wrong.
+ (md_parse_option): Recognize -mcpu=[v][r]5000.
+
+Sat Sep 7 13:25:55 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-mips.c (COUNT_TOP_ZEROES): Added macro to count
+ leading zeroes.
+ (load_register): Ensure hi32 bits are not lost during lo32bit
+ processing. Fix shift offset that was overflowing into the next
+ instruction field. Add code to generate shorter sequences for
+ constants with a single contiguous seqeuence of ones.
+
+start-sanitize-d10v
+Fri Sep 6 17:07:12 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (d10v_dot_word): New function to support
+ "@word" with the word pseudo-op.
+ (md_apply_fix3): Cleanup and changes to support correct sizes
+ for 16 and 18-bit relocs.
+
+end-sanitize-d10v
+Fri Sep 6 16:00:29 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * configure.in (sparc-*-aout): Set `em'.
+ * configure: Regenerated.
+ * config/te-sparcaout.h: New file.
+ * config/tc-sparc.h (TARGET_BYTES_BIG_ENDIAN): Define.
+ Ifdef TE_SPARCOUT define TARGET_FORMAT and SPARC_BIENDIAN.
+ * config/tc-sparc.c (INSN_BIG_ENDIAN): New macro.
+ (SPECIAL_CASE_{SETSW,SETX}): Define.
+ ({NOP,OR,FMOVS,SETHI,SLLX,SRA}_INSN): Define.
+ (md_begin): Delete setting of `target_big_endian'.
+ (output_insn): New function.
+ (md_assemble): Rewrite. Add `setx' support.
+ (sparc_ip): Handle `0' operand char. Recognize setuw, setsw, setx
+ special cases.
+ (md_atof): Add little endian support.
+ (md_number_to_chars): Likewise.
+ (md_apply_fix): Likewise.
+ (md_longopts): Recognize -EL,-EB ifdef SPARC_BIENDIAN.
+ (md_parse_option): Likewise.
+ (md_show_usage): Print -EL, -EB ifdef SPARC_BIENDIAN.
+
+Thu Sep 5 13:40:29 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.c (ecoff_new_file): New function.
+ * ecoff.h (ecoff_new_file): Declare.
+ * config/obj-ecoff.h (obj_app_file): Define.
+
+Thu Sep 5 13:39:25 1996 Richard Henderson <rth@tamu.edu>
+
+ * config/tc-alpha.c (load_expression): Bias the .lit8 section
+ symbol by 32k so that our 16-bit signed offset can address the
+ entire chunk. Reported by <matt@lkg.dec.com>.
+
+Wed Sep 4 10:23:20 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (load_register): Remove unused variable tmp.
+
+Wed Sep 4 11:24:29 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-mips.c (load_register): Remove unnecessary code that
+ was causing the high 32bits of 64bit constants to be lost.
+
+start-sanitize-d10v
+Tue Sep 3 13:52:56 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Added changes to support function
+ pointers and "@word" syntax.
+
+end-sanitize-d10v
+start-sanitize-v850
+Tue Sep 3 11:57:18 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-v850.c: Remove commented out and #if 0'd code.
+ (v850_reloc_prefix): Provide prototype.
+ (postfix, get_reloc, build_insn): Remove prototypes for nonexistant
+ functions.
+ (md_begin, md_assemble, md_apply_fix3): Remove unused variables.
+ (md_assemble): Add default to case statement.
+
+Sat Aug 31 16:03:00 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-v850.c (md_assemble): Compute size of the instrction
+ from the opcode.
+
+ * config/tc-v850.c (md_apply_fix3): Do simple byte, short and
+ word fixups too.
+
+Fri Aug 30 23:50:08 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-v850.c (md_apply_fix3): Use little endian get/put
+ routines to fetch/store the updated instruction from/to memory.
+ (v850_insert_operand): If the operand has a specialized insert
+ routine, call it.
+
+Fri Aug 30 18:35:26 1996 J.T. Conklin <jtc@hippo.cygnus.com>
+
+ * config/tc-v850.c (reg_name_search): Align calling convention to
+ be like identical function found in tc-ppc.c.
+ (get_reloc): Removed.
+ (v850_reloc_prefix): New function, parse lo(), hi() and hi0().
+ (md_assemble): emit fixups.
+ (md_pcrel_from): renamed from md_pcrel_from_section, emit proper
+ displacement.
+ (md_apply_fix3): handle fixups/relocs.
+ * config/tc-v850.h (MD_PCREL_FROM_SECTION): Removed definition.
+
+end-sanitize-v850
+Fri Aug 30 18:12:00 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ Add SH ELF support.
+ * configure.in (sh-*-elf*): New target.
+ * config/tc-sh.h (TARGET_ARCH): Define.
+ (WORKING_DOT_WORD): Define.
+ (TC_COFF_FIX2RTYPE): Only define if OBJ_COFF.
+ (BFD_ARCH, COFF_MAGIC, TC_COUNT_RELOC): Likewise.
+ (TC_RELOC_MANGLE, tc_coff_symbol_emit_hook): Likewise.
+ (DO_NOT_STRIP, NEED_FX_R_TYPE, TC_KEEP_FX_OFFSET): Likewise.
+ (TC_COFF_SIZEMACHDEP, tc_frob_file): Likewise.
+ (SUB_SEGMENT_ALIGN): Likewise.
+ (RELOC_32): Don't define.
+ (tc_frob_file_before_adjust): Define if BFD_ASSEMBLER.
+ (target_big_endian): Declare if OBJ_ELF.
+ (TARGET_FORMAT): Define if OBJ_ELF.
+ * config/tc-sh.c: Use BFD reloc codes instead of SH COFF reloc
+ numbers throughout.
+ (tc_crawl_symbol_chain): Only define if OBJ_COFF.
+ (tc_headers_hook, tc_coff_sizemachdep): Likewise.
+ (struct sh_count_relocs): Define.
+ (sh_count_relocs): New static function, broken out of
+ sh_frob_file. Add BFD_ASSEMBLER code.
+ (sh_frob_section): Likewise.
+ (sh_frob_file): Call sh_frob_section.
+ (md_convert_frag): If BFD_ASSEMBLER, change type of headers, and
+ call section_symbol rather than seg_info (seg)->dot.
+ (md_section_align): Add OBJ_ELF version.
+ (SWITCH_TABLE_CONS): Define.
+ (SWITCH_TABLE): Use SWITCH_TABLE_CONS.
+ (md_apply_fix): Change parameter types if BFD_ASSEMBLER. Only
+ handle fx_r_type == 0 if not BFD_ASSEMBLER. Return 0 if
+ BFD_ASSEMBLER.
+ (struct reloc_map): Define if not BFD_ASSEMBLER.
+ (coff_reloc_map): Likewise.
+ (sh_coff_reloc_mangle): Use coff_reloc_map to convert fx_r_type.
+ (tc_gen_reloc): New function if BFD_ASSEMBLER.
+ * write.c (write_relocs): Ifdef out fx_where test which triggers
+ inappropriately for SH ELF.
+ (write_object_file): Call tc_frob_file_before_adjust and
+ obj_frob_file_before_adjust if they are defined.
+
+ * write.c (write_object_file): Use BFD_RELOC_16, not
+ BFD_RELOC_NONE, when calling fix_new_exp for a broken word.
+
+ * read.c (emit_expr): Fix conversion of byte count to BFD reloc
+ code.
+
+start-sanitize-d10v
+Fri Aug 30 14:47:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (find_opcode): Fix problem with calculating
+ branch sizes in across sections.
+
+end-sanitize-d10v
+start-sanitize-v850
+Fri Aug 30 00:44:13 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-850.c (md_assemble): Handle hi() correctly. Handle
+ hi0() too.
+
+Wed Aug 28 23:11:08 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-v850.c (md_begin): Deal with end of opcode
+ table marker.
+
+end-sanitize-v850
+start-sanitize-d10v
+Wed Aug 28 19:20:04 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (find_opcode): Fix a bug which could generate
+ the wrong opcode for cases like st2w where there are many forms
+ of the same instruction.
+
+end-sanitize-d10v
+Tue Aug 27 13:53:22 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * expr.c (operand): If md_parse_name is defined, call it before
+ calling symbol_find_or_make.
+ * config/tc-ppc.h (md_parse_name): Define.
+ (ppc_parse_name): Declare.
+ * config/tc-ppc.c (reg_name_search): Add regs and regcount
+ parameters.
+ (register_name): Update call to reg_name_search.
+ (cr_operand): New static variable.
+ (cr_names): New static const array.
+ (ppc_parse_name): New function.
+ (md_assemble): If PPC_OPERAND_CR is set in the operand flags, set
+ cr_operand before calling expression.
+
+Tue Aug 27 09:05:50 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (tc_gen_reloc): Add new argument to
+ hppa_gen_reloc_type call.
+
+start-sanitize-d10v
+Mon Aug 26 18:24:51 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Fixed ".word". Fixed problem with range checking
+ on addresses. Improved error messages.
+ * doc/c-d10v.texi: Added docs for register pairs.
+
+Mon Aug 26 13:39:27 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (parallel_ok): Fix bug in parallel
+ checking code.
+
+end-sanitize-d10v
+Mon Aug 26 14:38:22 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.c (init_file): Initialize fMerge to 1.
+ (add_file): Restore old file merging code, but only merge files if
+ fMerge is set.
+ (ecoff_directive_loc): Clear fMerge field of current file.
+ (ecoff_generate_asm_lineno): Likewise.
+
start-sanitize-d10v
+Fri Aug 23 11:40:47 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * doc/c-d10v.texi: Fix typo.
+
+end-sanitize-d10v
+start-sanitize-v850
+Fri Aug 23 10:41:32 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-v850.c (md_assemble): Correct bit masking for
+ hi and lo expressions.
+
+ * config/tc-v850.c (md_assemble): Rough cut at demanding
+ "ep" or "r30" in sst and sld instructions.
+ (md_apply_fix3): Don't abort. Just warn that we don't
+ have relocs yet.
+
+ * config/tc-v850.c (CC_NAME_CNT): Define.
+ (cc_name): New function.
+ (md_assemble): Handle V850_OPERAND_CC correctly.
+
+ * config/tc-v850.c (md_assemble): Don't forget to initialize
+ "insn"!
+
+ * config/tc-v850.c (reg_name_search): Generalize to search
+ any given register table.
+ (register_name): Pass appropriate table and size to reg_name_search.
+ (system_register_name): New function.
+ (SYSREG_NAME_CNT): Define.
+ (md_assemble): Handle operands which are system registers.
+
+ * config/tc-v850.c (md_assemble): If we find a register, but the
+ opcode doesn't want a register, then we don't have a match.
+ (md_assemble): Get size of the instruction from the opcode table.
+
+end-sanitize-v850
+Thu Aug 22 10:20:30 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: Set and substitute HLDENV.
+ * configure: Rebuild.
+ * Makefile.in (HLDENV): New variable.
+ (as.new): Use $(HLDENV).
+
+ * ecoff.c (ecoff_directive_endef): Avoid a division by zero error
+ if an array dimension is not known.
+
+start-sanitize-d10v
+Thu Aug 22 10:50:00 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Fix a reloc bug caused by my last change.
+ * doc/c-d10v.texi: Cleanup.
+
+end-sanitize-d10v
+start-sanitize-v850
+Tue Aug 20 15:15:16 1996 J.T. Conklin <jtc@hippo.cygnus.com>
+
+ * config/tc-v850.c: New file.
+ * config/tc-v850.h: New file.
+ * configure (v850-*-elf): New target.
+ * configure.in (v850-*-elf): New target.
+
+end-sanitize-v850
+start-sanitize-d10v
+Wed Aug 21 15:50:54 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * doc/c-d10v.texi: New file.
+ * doc/all.texi: Added D10V stuff.
+ * doc/as.texinfo: Added D10V stuff.
+
+Tue Aug 20 14:10:02 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: All references to defined symbols should
+ now use the optimal instruction. .float and .double now work.
+
+end-sanitize-d10v
+Mon Aug 19 14:41:36 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-coff.c (fixup_segment): Adjust PC relative reloc by
+ section address for the i960 as is done for the i386.
+
+Thu Aug 15 16:37:59 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-config.in: Add wildcards for config matching, add mips-*-*
+ case, forward-include bfd/elf-bfd.h.
+
+start-sanitize-d10v
+Thu Aug 15 13:24:30 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Add additional information to the opcode
+ table to help determinine which instructions can be done
+ in parallel.
+
+end-sanitize-d10v
+Thu Aug 15 17:01:31 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-arm.c: Major changes to add Thumb support, with lots
+ of change input from <rearnsha@armltd.co.uk>.
+ Reverted to INSN_SIZE macro, rather than insn_size variable.
+ (insns): Added ARM "bx" instruction support.
+ (tinsns): Added Thumb instruction definition structure.
+ (arm_tops_hsh): Added hash structure for Thumb opcodes.
+ (md_pseudo_table): Added ".arm", ".thumb" and ".code" pseudo-ops.
+ (opcode_select,s_arm,s_thumb,s_code): Added.
+ (decode_shift): Allow upper-case RRX.
+ (do_ldst): Simpler halfword support.
+ (do_ldmstm): Improved.
+ (reg_list, do_bx, thumb_reg, thumb_add_sub, thumb_shift,
+ thumb_mov_compare, thumb_load_store, do_t_arit, do_t_add,
+ do_t_asr, do_t_branch, do_t_bx, do_t_compare, do_t_ldmstm,
+ do_t_ldrb, do_t_ldrh, do_t_lds, do_t_lsl, do_t_lsr, do_t_mov,
+ do_t_push_pop, do_t_str, do_t_strb, do_t_strh, do_t_sub, do_t_swi,
+ do_t_adr): Added.
+ (md_apply_fix3): Add support for BFD_RELOC_ARM_THUMB_* relocations.
+ (md_parse_option): Add support for -mthumb.
+ (md_show_usage): Updated to reflect new command line option.
+ (arm_data_in_code, arm_canonicalize_symbol_name): Added.
+ * config/tc-arm.h: Provide TC_FIX_TYPE to allow private ARM
+ fragment information to be held.
+
+Thu Aug 15 16:12:00 1996 Richard Earnshaw (rearnsha@armltd.co.uk)
+
+ * tc-arm.c (md_apply_fix3): Also set fixP->fx_done if fx_addsy is
+ non-null, but is a constant.
+ (fix_new_arm): Call make_expr_symbol to make the expression symbol
+ so that error reporting will work correctly.
+
+Wed Aug 14 10:37:21 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-i386.c (tc_i386_fix_adjustable): Don't adjust relocs
+ against weak symbols.
+
+Tue Aug 13 17:39:24 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-ppc.h (TC_FORCE_RELOCTION): Define if OBJ_XCOFF.
+ (ppc_force_relocation): Declare if OBJ_XCOFF.
+ * config/tc-ppc.c (ppc_force_relocation): New function if
+ OBJ_XCOFF.
+
+Mon Aug 12 16:49:43 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.h (BYTE_ORDER): Don't define. No longer used.
+
+start-sanitize-d10v
+Fri Aug 9 17:48:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Fix problem with relocs.
+
+end-sanitize-d10v
+Fri Aug 9 14:16:14 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-sh.c (sh_do_align): If not BFD_ASSEMBLER, always align
+ with nops if not in data_section or bss_section.
+
+Thu Aug 8 12:32:56 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ Add support for openVMS/Alpha.
+ * as.h (PRINTF_LIKE): Don't define if VMS, for now.
+ * config/obj-evax.c: New file.
+ * config/obj-evax.h: New file.
+ * config/tc-alpha.c: Add support for EVAX format if OBJ_EVAX is
+ defined.
+ * config/tc-alpha.h: Add support for EVAX format if OBJ_EVAX is
+ defined. Add case for bfd_target_evax_flavour.
+ * config/vms-a-conf.h: New file.
+ * conf-a-gas.com: New file.
+ * configure.in: Add target alpha-*-*vms*.
+ * configure: Rebuild.
+ * makefile.vms: New file.
+ * read.c (s_lcomm): Align bss_seg on 8 byte boundary if OBJ_EVAX.
+ Don't call ffs on openVMS/Alpha.
+
+Wed Aug 7 14:19:03 1996 Philippe De Muyter <phdm@info.ucl.ac.be>
+
+ * configure.in: Make GAS_CHECK_DECL_NEEDED include <string.h> or
+ <strings.h> if they exist. Call GAS_CHECK_DECL_NEEDED on strstr
+ and sbrk.
+ * acconfig.h (NEED_DECLARATION_STRSTR): New macro.
+ (NEED_DECLARATION_SBRK): New macro.
+ * configure, conf.in: Rebuild.
+ * as.h: Only include <strings.h> if HAVE_STRINGS_H.
+ (strstr): Declare if NEED_DECLARATION_STRSTR.
+ * as.c: If HAVE_SBRK and NEED_DECLARATION_SBRK, declare sbrk.
+
+Wed Aug 7 11:50:26 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * symbols.c (resolve_symbol_value): Handle addition or subtraction
+ by a constant before entering the main switch. Reject attempts to
+ apply an arithmetic function to non-absolute symbols, except for
+ the special case of subtraction of two symbols in the same
+ section.
+
+ * config/tc-mips.c (md_section_align): Do align if OBJ_ELF, but
+ not to more than a 16 byte boundary.
+
+ * config/tc-i386.c (tc_gen_reloc): Accept all relocs; remove
+ #ifndef OBJ_ELF lines. From Eric Valette <valette@crf.canon.fr>.
+ (tc_gen_reloc): If out of memory call as_fatal rather than
+ assert. If no howto found, call as_bad_where rather than
+ as_fatal. Change the error message slightly. Set howto to a
+ non-NULL value in order to keep going.
+
+start-sanitize-d10v
+Tue Aug 6 12:58:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Added code to support 32-bit fixups for stabs.
+
+end-sanitize-d10v
+Tue Aug 6 11:15:26 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-h8300.c (get_specific): New operand "size" derived
+ from ".b", ".w" and ".l" extensions. All callers changed. If
+ the base instruction has no operands, then use the size to
+ determine which specific instruction to use.
+
+Mon Aug 5 14:21:10 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-i960.c (mem_fmt): Call parse_expr before emit.
+
+Fri Aug 2 11:23:31 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (md_section_align): Don't change addr if
+ OBJ_ELF.
+
+Thu Aug 1 23:51:52 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c: Revert yesterday's changes.
+
+start-sanitize-d10v
+Wed Jul 31 14:46:11 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Disable range checking on 16-bit values.
+
+end-sanitize-d10v
+Wed Jul 31 16:27:19 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-m68k.c (m68k_ip): Set ok_arch for every instruction,
+ not just the ones that don't match.
+
+start-sanitize-d10v
+Wed Jul 31 11:45:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Fixed bugs in short relocs and range checking.
+
+end-sanitize-d10v
+Wed Jul 31 15:41:42 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-arm.c: Changed INSN_SIZE to variable insn_size, as
+ pre-cursor to adding Thumb support. Also added cpu_variant flag
+ information to each of the asm_flg structures.
+ (md_parse_option): Updated ARM7 parsing to allow 't' for
+ thumb/halfword support, aswell as 'm' for long multiply.
+ (md_show_usage): Updated help message.
+ (md_assemble): Check that instruction flags are applicated to the
+ current cpu variant.
+ (md_apply_fix3, tc_gen_reloc): Add BFD_RELOC_ARM_OFFSET_IMM8 and
+ BFD_RELOC_ARM_HWLITERAL relocation support for new halfword and
+ signextension instructions.
+ (do_ldst): Generate halfword and signextension variants if
+ mnemonic flags match.
+ (ldst_extend): Do not allow shifts in the offset field of halfword
+ or signextension instructions.
+ (validate_offset_imm): Provide check on halfword and signextension
+ immediate range.
+ (add_to_lit_pool): Merge identical literal pool values.
+
+Tue Jul 30 14:28:23 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (selector_table): Add 'E' selector.
+ (cons_fix_new_hppa): Don't coke on e_esel.
+ (tc_gen_reloc, SOM version): Handle R_COMP2 when used
+ to help generate exception handling tables.
+ (md_apply_fix): Don't try to apply fixups with an e_esel
+ selector.
+ (hppa_fix_adjustable): Fixups with e_esel selectors
+ are not adjustable.
+
+Tue Jul 30 15:51:41 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-sparc.c (md_pseudo_table): Add 2byte, 4byte, and 8byte
+ pseudo-ops.
+
+start-sanitize-d10v
+Fri Jul 26 11:43:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Added lots of error checking. Added hacks
+ to support accumulator shifts.
+
+end-sanitize-d10v
+Fri Jul 26 11:56:08 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * symbols.c (S_SET_EXTERNAL): Let .weak override.
+ (S_CLEAR_EXTERNAL): Likewise.
+ (S_SET_WEAK): Remove error; just let .weak override.
+
+start-sanitize-d10v
+Thu Jul 25 15:22:51 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c (md_assemble): Now handles multiline
+ instructions.
+
+Thu Jul 25 12:03:33 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * config/tc-d10v.c: Fix packaging bug. Added range checking.
+ Added kludge for divs instruction. Fixed minor problem with
+ multiple text sections.
+ * config/tc-d10v.h (d10v_cleanup): Change prototype.
+
Tue Jul 23 10:49:36 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* config/tc-d10v.c (md_apply_fix3): Fix all instruction
projects / deliverable / binutils-gdb.git / blobdiff