--- /dev/null
+2011-12-29 Iain Sandoe <idsandoe@googlemail.com>
+
+ * as.c (perform_an_assembly_pass): Do not create text, data and bss
+ sections for MACH-O. Do not switch to the text section.
+ * config/obj-macho.c (obj_mach_o_segT_from_bfd_name): Forward decl.
+ (mach_o_begin): Startup with only text section unless suppressed.
+ * config/obj-macho.h (obj_begin): define to mach_o_begin ().
+
+2011-12-22 DJ Delorie <dj@redhat.com>
+
+ * config/rl78-defs.h (rl78_linkrelax_addr16): Add.
+ (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove.
+ * config/rl78-parse.y: Tag all addr16 and branch patterns with
+ relaxation markers.
+ * config/tc-rl78.c (rl78_linkrelax_addr16): New.
+ (rl78_linkrelax_branch): New.
+ (OPTION_RELAX): New.
+ (md_longopts): Add relax option.
+ (md_parse_option): Add OPTION_RELAX.
+ (rl78_frag_init): Support relaxation.
+ (rl78_handle_align): New.
+ (md_assemble): Support relaxation.
+ (md_apply_fix): Likewise.
+ (md_convert_frag): Likewise.
+ * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
+ (HANDLE_ALIGN): New.
+ (rl78_handle_align): Declare.
+
+ * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit
+ insn patterns.
+ (find_bit_index): New. Strip .BIT suffix off relevent
+ expressions for bit insns.
+ (rl78_lex): Exclude bit suffixes from expression parsing.
+
+2011-12-21 Nick Clifton <nickc@redhat.com>
+
+ PR gas/13449
+ * config/tc-arm.c (create_unwind_entry): Zero allocated table
+ entries.
+
+2011-12-19 Iain Sandoe <idsandoe@googlemail.com>
+
+ * config/obj-macho.c (obj_mach_o_section): Account for target-
+ dependent section types. Improve error handling when wrong section
+ types/attributes are specified.
+
+2011-12-19 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * config/tc-mips.c (mips_pseudo_table): Add tprelword/tpreldword
+ entries.
+ (mips16_percent_op): Add MIPS16 TLS relocation ops.
+ (md_apply_fix): Add BFD_RELOC_MIPS16_TLS_* switch cases.
+ (s_tls_rel_directive): Rename from s_dtprel_internal(). Abstract out
+ directive string and reloc type as function parameters. Update
+ comments.
+ (s_dtprelword,s_dtpreldword): Change to use s_tls_rel_directive().
+ (s_tprelword,s_tpreldword): New functions.
+
+2011-12-15 Tristan Gingold <gingold@adacore.com>
+
+ * config/obj-macho.c (obj_mach_o_fileprop): Fix typo.
+
+2011-12-15 Konstantin Belousov <kib@FreeBSD.org>
+
+ * config/obj-elf.c (obj_elf_type): Add ELFOSABI_FREEBSD to the
+ supported abi's.
+
+2011-12-15 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/obj-macho.c (obj_mach_o_subsections_by_symbols): New global.
+ (obj_mach_o_file_properties): New enum.
+ (obj_mach_o_subsections_via_symbols): Generalize name to...
+ ... (obj_mach_o_fileprop) and use to set subsections_via_symbols.
+
+2011-12-14 Stuart Henderson <shenders@gcc.gnu.org>
+
+ * config/bfin-parse.y (asm_1): set SRCx fields to all 1s for
+ dspalu32 instrs that don't use them.
+
+2011-12-14 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-cris.c (md_convert_frag): Mark the length_code local
+ variable as unused as it is only used when ENABLE_CHECKING is on.
+
+2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/obj-macho.c: Add some more top-level comments.
+ (collect_16char_name): New.
+ (obj_mach_o_section): Amend to allow syntax compatible with
+ existing system tools. Use section translation data when available.
+ (obj_mach_o_segT_from_bfd_name): New.
+ (known_sections): Update.
+ (obj_mach_o_known_section): Use obj_mach_o_segT_from_bfd_name.
+ (objc_sections): New.
+ (obj_mach_o_objc_section): New.
+ (debug_sections): New.
+ (obj_mach_o_debug_section): New.
+ (tgt_sections): New.
+ (obj_mach_o_opt_tgt_section): New.
+ (obj_mach_o_base_section): New.
+ (obj_mach_o_common_parse): Update to create BSS on demand and to handle
+ lcomm optional alignment param.
+ (obj_mach_o_comm): Update parameter name.
+ (obj_mach_o_placeholder): New.
+ (mach_o_pseudo_table): Update for GCC section directives.
+ * config/obj-macho.h (_OBJ_MACH_O_H): New.
+ (USE_ALIGN_PTWO): Define.
+ (S_SET_ALIGN) Define.
+
+2011-12-13 Andrew Burgess <aburgess@broadcom.com>
+
+ * doc/internals.texi (TC_FORCE_RELOCATION_SUB_SAME): Update
+ to match code.
+
+2011-12-08 Andrew Pinski <apinski@cavium.com>
+ Adam Nemet <anemet@caviumnetworks.com>
+
+ * tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
+ (mips_cpu_info_table): Add Octeon2.
+ * doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
+
+2011-12-07 Sameera Deshpande <sameera.deshpande@arm.com>
+
+ * config/tc-arm.c (do_t_ldstd): Warn for unpredictable cases.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (ARM_IT_MAX_OPERANDS): New define.
+ (arm_it): Use ARM_IT_MAX_OPERANDS.
+ (neon_select_shape): Ensure we have matched all operands.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (parse_neon_mov): Update which_operand
+ correctly.
+
+2011-12-05 Richard Earnshaw <rearnsha@arm.com>
+
+ * tc-arm.c (aeabi_set_public_attributes): Correctly set
+ Tag_ARM_ISA_use and Tag_Thumb_ISA_use.
+
+2011-11-30 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_cpu_option_table): Add name_len field.
+ (arm_arch_option_table): Likewise.
+ (arm_option_extension_value_table): Likewise.
+ (ARM_CPU_OPT): New define.
+ (ARM_ARCH_OPT): Likewise.
+ (ARM_EXT_OPT): Likewise.
+ (arm_cpus): Use ARM_CPU_OPT to initialize.
+ (arm_archs): Use ARM_ARCH_OPT to initialize.
+ (arm_extensions): Use ARM_EXT_OPT to initialize.
+ (arm_parse_extension): Ensure option string matching matches
+ the whole string.
+ (arm_parse_cpu): Likewise.
+ (arm_parse_arch): Likewise.
+
+2011-11-29 Andrew Pinski <apinski@cavium.com>
+
+ * config/tc-mips.c (CPU_IS_OCTEON): New macro function.
+ (CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
+ (NO_ISA_COP): Likewise.
+ (macro) <ld_st>: Add support when off0 is true.
+ Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
+ (mips_cpu_info_table): Add octeon+.
+ * doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
+
+2011-11-25 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (do_t_mov_cmp): Allow MOV lowreg, lowreg when no CPU
+ is specified.
+
+2011-11-23 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_prologue): Requires empty line.
+
+2011-11-23 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_frame): Emit a warning if bad value
+ of RA.
+ (s_alpha_pdesc): Adjust comment.
+
+2011-11-23 Thomas Klein <th.r.klein@web.de>
+
+ * config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV
+ with two low register at arch v4t or v5t when assember using
+ unified syntax.
+
+2011-11-21 DJ Delorie <dj@redhat.com>
+
+ * config/rl78-defs.h (rl78_error): Add "const".
+ * config/rl78-parse.y (rl78_error): Likewise.
+
+2011-11-21 Andreas Tobler <andreast@fgznet.ch>
+
+ * config/tc-ppc.c (ppc_target_format): Add format for powerpc*-freebsd.
+
+2011-11-16 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (md_apply_fix): Handle BFD_RELOC_8.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (macro): Fix unsupported opcode message
+ capitalization.
+ (mips_ip, mips16_ip): Likewise.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (ISA_SUPPORTS_MCU_ASE): Also set if microMIPS
+ mode.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (macro_build_jalr): Reverse a negative
+ conditional.
+ (mips_ip): Likewise.
+
+2011-11-16 Catherine Moore <clm@codesourcery.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add "m14ke" and
+ "m14kec".
+ * doc/c-mips.texi (MIPS architecture options): Add "m14ke" and
+ "m14kec" to the list of -march options.
+
+2011-11-15 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * write.c (dump_section_relocs): Don't convert PC-relative relocs
+ that have an in-place addend narrower than the addresses used.
+
+2011-11-14 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Exclude microMIPS
+ variant frags too.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-a7 entry.
+ * doc/c-arm.texi (ARM Options): Add cortex-a7 to list of accepted
+ CPUs.
+
+2011-11-04 DJ Delorie <dj@redhat.com>
+
+ * doc/c-rl78.texi (RL78-Float): Remove unused menu entry.
+
+2011-11-02 DJ Delorie <dj@redhat.com>
+
+ * config/tc-rl78.c (tc_gen_reloc): Remove unused variable.
+
+2011-11-02 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (md_begin): Remove ARM_PLT32 reloc associated
+ with the (PLT) instruction suffix when operating in eabi mode.
+ * doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
+ suffix.
+
+2011-11-01 DJ Delorie <dj@redhat.com>
+
+ * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
+ (TARGET_CPU_HFILES): Add rc-rl78.h.
+ (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
+ (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
+ * Makefile.in: Regenerate.
+ * configure.in: Add rl78 case.
+ * configure: Regenerate.
+ * configure.tgt: Add rl78 case.
+ * config/rl78-defs.h: New file.
+ * config/rl78-parse.y: New file.
+ * config/tc-rl78.c: New file.
+ * config/tc-rl78.h: New file.
+ * NEWS: Add Renesas RL78.
+
+ * doc/Makefile.am (c-rl78.texi): New.
+ * doc/Makefile.in: Likewise.
+ * doc/all.texi: Enable it.
+ * doc/as.texi: Add it.
+ * doc/c-rl78.texi: New file.
+
+2011-10-28 Walter Lee <walt@tilera.com>
+
+ * NEWS: Fix TILEPro capitalization.
+ * config/tc-tilegx.c (emit_tilegx_instruction) Handle
+ relocations of aliases.
+ * config/tc-tilepro.c: (emit_tilepro_instruction) Likewise.
+
+2011-10-28 Nick Clifton <nickc@redhat.com>
+
+ * po/ja.po: New Japanese translation.
+ * configure.in (ALL_LINGUAS): Add ja.
+ * configure: Regenerate.
+
+2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * doc/as.texinfo [EPIPHANY]: Include c-epiphany.texi to avoid
+ duplication.
+
+2011-10-25 Mike Frysinger <vapier@gentoo.org>
+
+ * config/rx-defs.h (rx_error): Add const to first arg.
+ * config/rx-parse.y (rx_error): Likewise.
+
+2011-10-25 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-ns32k.c (md_begin): Rename local variable 'stat' to
+ 'status'.
+
+2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * NEWS: Mention addition of Adapteva Epiphany support.
+ * config/tc-epiphany.c: New file.
+ * config/tc-epiphany.h: New file.
+ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
+ (TARGET_CPU_HFILES): Add config/tc-epiphany.h .
+ * configure.in: Also set using_cgen for epiphany.
+ * configure.tgt: Handle epiphany.
+ * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
+ * doc/all.texi: Set EPIPHANY.
+ * doc/as.texinfo: Add EPIPHANY-specific text.
+ * doc/c-epiphany.texi: New file.
+ * po/gas.pot: Regenerate.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (move_register): Fix formatting.
+
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Remove empty line.
+ (start_noreorder): Likewise.
+
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (s_option): Fix formatting.
+ (mips_elf_final_processing): Likewise.
+
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (validate_micromips_insn): Fix formatting.
+
+2011-10-24 David Binderman <dcb314@hotmail.com>
+
+ * config/tc-mn10200.c (md_convert_frag): Add missing break.
+
+2011-10-21 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (load_expression): Use symbol_mark_used accessor.
+ (s_alpha_comm): Use symbol_set_frag accessor.
+
+2011-10-20 Alan Modra <amodra@gmail.com>
+
+ * config/tc-mips.c (micromips_add_label): Avoid gcc warning.
+ (md_convert_frag): Likewise.
+
+2011-10-18 Jie Zhang <jie@codesourcery.com>
+ Julian Brown <julian@codesourcery.com>
+
+ * config/tc-arm.c (parse_shifter_operand): Fix handling of explicit
+ rotation.
+ (encode_arm_shifter_operand): Likewise.
+
+2011-10-13 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/tc-arm.c (check_ldr_r15_aligned): New.
+ (do_ldst): Warn in upredictable cases.
+ (do_t_ldst): Likewise.
+ (insns): Update accordingly.
+
+2011-10-13 Alan Modra <amodra@gmail.com>
+
+ * as.c (main): Define .gasversion. rather than __GAS_VERSION__.
+ * frags.h (bss_address_frag): Delete
+ (predefined_address_frag): New.
+ * frags.c (frag_init): Init predefined_address_frag. Delete ref
+ to bss_address_frag.
+ * symbols.c (S_CAN_BE_REDEFINED): New function.
+ * symbols.h (S_CAN_BE_REDEFINED): Declare.
+ * read.c (assign_symbol): Use S_CAN_BE_REDEFINED.
+
+2011-10-12 Alan Modra <amodra@gmail.com>
+
+ * symbols.c (local_symbol_make): Make global.
+ * symbols.h (local_symbol_make): Declare.
+ * as.c (main): Define __GAS_VERSION__.
+
+2011-10-10 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+ * po/fi.po: Updated Finnish translation.
+ * po/fr.po: Updated French translation.
+
+2011-10-05 DJ Delorie <dj@redhat.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * config/rx-defs.h (rx_pid_register): New.
+ (rx_gp_register): New.
+ * config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
+ (displacement): Add PID support.
+ * config/tc-rx.c (rx_pid_mode): New.
+ (rx_num_int_regs): New.
+ (rx_pid_register): New.
+ (rx_gp_register): New.
+ (options): Add -mpid and -mint-register= options.
+ (md_longopts): Likewise.
+ (md_parse_option): Likewise.
+ (md_show_usage): Likewise.
+ (rx_pid_symbol): New.
+ (rx_pidreg_symbol): New.
+ (rx_gpreg_symbol): New.
+ (md_begin): Support PID.
+ (rx_validate_fix_sub): Support PID.
+ (tc_gen_reloc): Support PID.
+ * doc/c-rx.texi: Document PID support.
+
+2011-09-27 Kai Tietz <ktietz@redhat.com>
+
+ * config/obj-coff.c (obj_coff_section): Add 'e' as specifier
+ for marking section SEC_EXCLUDE.
+
+2011-09-22 Tristan Gingold <gingold@adacore.com>
+
+ * NEWS: Add marker for 2.22.
+
+2011-09-21 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (hwcap_allowed): New.
+ (struct sparc_arch): New field 'hwcap_allowed' containing a bitmask
+ of F_FOO flags which are enabled by the particular arch setting.
+ Add new options that provide explicit access to new instructions.
+ (md_parse_option): Only bump max_architecture if the requested one
+ is larger, or this is the first explicit request.
+ (get_hwcap_name): New function.
+ (sparc_ip): Validate that hwcaps used by an instruction have actually
+ been enabled.
+ * doc/c-sparc.texi: Document new sparc options.
+
+2011-09-21 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (hwcap_seen): New bitmask, defined when
+ not TE_SOLARIS.
+ (sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
+ sparc_opcode->flags of instruction into hwcap_seen.
+ (sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
+ hwcap_seen is non-zero and not TE_SOLARIS.
+
+2011-09-19 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (insert_operand): Call as_bad_value_out_of_range
+ instead of as_warn_out_of_range.
+
+2011-09-08 Mark Fortescue <mark@mtfhpc.demon.co.uk>
+
+ * config/tc-sparc.c (sparc_ip): Handle 'i' + r<0..31>
+ in addition to 'i' + [goli]<0..7>.
+
+2011-09-08 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * cgen.c (gas_cgen_pcrel_r_type): New function.
+ (gas_cgen_tc_gen_reloc): Check for GAS_CGEN_PCREL_R_TYPE.
+ * cgen.h (gas_cgen_pcrel_r_type): Declare.
+
+2011-09-08 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR gas/13167
+ * dwarf2dbg.c (dwarf2_flush_pending_lines): Use symbol_temp_new_now.
+
+2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR gas/13024
+ * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
+ (dwarf2_gen_line_info_1): Delete.
+ (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
+ (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
+ (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
+ (dwarf2_directive_loc): Push previous .locs instead of generating
+ them immediately.
+
+2011-08-26 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+
+2011-08-26 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_linkage): Simplify. Add comments.
+
+2011-08-26 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (add_to_link_pool): Improve comment.
+ (s_alpha_fp_save): Fix indentation.
+
+2011-08-19 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo: Include c-xstormy16.texi.
+
+2011-08-18 Alan Modra <amodra@gmail.com>
+
+ * write.c (resolve_reloc_expr_symbols): Convert local symbols
+ on relocs to section+offset.
+ (get_frag_for_reloc): New function.
+ (write_relocs): Merge sort fixup relocs with those from .reloc
+ directives.
+
+2011-08-10 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Update the comment on
+ MIPS16 fixups.
+
+2011-08-09 Chao-ying Fu <fu@mips.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add "m14k" and
+ "m14kc".
+ * doc/c-mips.texi (MIPS architecture options): Add "m14k" and
+ "m14kc" to the list of -march options.
+
+2011-08-09 Chao-ying Fu <fu@mips.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_set_options): Add ase_mcu.
+ (mips_opts): Initialise ase_mcu to -1.
+ (ISA_SUPPORTS_MCU_ASE): New macro.
+ (MIPS_CPU_ASE_MCU): Likewise.
+ (is_opcode_valid): Handle MCU.
+ (macro_build, macro): Likewise.
+ (validate_mips_insn, validate_micromips_insn): Likewise.
+ (mips_ip): Likewise.
+ (options): Add OPTION_MCU and OPTION_NO_MCU.
+ (md_longopts): Add mmcu and mno-mcu.
+ (md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
+ (mips_after_parse_args): Handle MCU.
+ (s_mipsset): Likewise.
+ (md_show_usage): Handle MCU options.
+
+ * doc/as.texinfo: Document -mmcu and -mno-mcu options.
+ * doc/c-mips.texi: Likewise, and document ".set mcu" and
+ ".set nomcu" directives.
+
+2011-08-09 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (gpr_mod_mask): Remove INSN2_MOD_GPR_MB,
+ INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG,
+ INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MM,
+ INSN2_MOD_GPR_MN, INSN2_MOD_GPR_MP and INSN2_MOD_GPR_MQ opcode
+ register use checks.
+ (gpr_read_mask): Add INSN2_READ_GPR_MC, INSN2_READ_GPR_ME
+ INSN2_READ_GPR_MG, INSN2_READ_GPR_MJ, INSN2_READ_GPR_MMN,
+ INSN2_READ_GPR_MP and INSN2_READ_GPR_MQ opcode register use
+ checks.
+ (gpr_write_mask): Replace INSN2_WRITE_GPR_S opcode register
+ use flag with INSN_WRITE_GPR_S. Add INSN2_WRITE_GPR_MB,
+ INSN2_WRITE_GPR_MHI, INSN2_WRITE_GPR_MJ and INSN2_WRITE_GPR_MP
+ opcode register use checks.
+ (can_swap_branch_p): Enable microMIPS branch swapping.
+ (append_insn): Likewise.
+
+2011-08-09 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Remove forced 16-bit
+ branch size information.
+ (RELAX_MICROMIPS_U16BIT): Remove macro.
+ (RELAX_MICROMIPS_UNCOND): Adjust accordingly.
+ (RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
+ (RELAX_MICROMIPS_RELAX32): Likewise.
+ (RELAX_MICROMIPS_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_TOOFAR32): Likewise.
+ (RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
+ (RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
+ (append_insn): Always check forced_insn_length for microMIPS
+ relaxation. Adjust code for the removal of
+ RELAX_MICROMIPS_U16BIT.
+ (mips_ip) <'D', 'E'>: If forced_insn_length, then emit the
+ relocation straight away.
+ (relaxed_micromips_16bit_branch_length): Adjust code for the
+ removal of RELAX_MICROMIPS_U16BIT.
+
+2011-08-08 Tristan Gingold <gingold@adacore.com>
+
+ * config/obj-macho.c (obj_mach_o_section): New function.
+ (struct known_section): New type.
+ (known_sections): Declare.
+ (obj_mach_o_known_section): New function.
+ (obj_mach_o_common_parse): Ditto.
+ (obj_mach_o_comm): Ditto.
+ (obj_mach_o_subsections_via_symbols): Ditto.
+ (mach_o_pseudo_table): Add new pseudos.
+
+2011-08-06 Richard Henderson <rth@redhat.com>
+
+ * dw2gencfi.c (all_fde_data): Export.
+ * dw2gencfi.h (all_fde_data): Declare.
+ * config/tc-alpha.c (alpha_elf_md_end): Don't convert legacy unwind
+ info to cfi unwind info if the user already has supplied some.
+
+2011-08-06 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (emit_nop): Delete.
+ (get_delay_slot_nop): New function.
+ (nops_for_insn_or_target): Use it.
+ (append_insn): Likewise. When avoiding hazards, call add_fixed_insn
+ and insert_into_history directly.
+
+2011-08-06 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (delayed_branch_p, compact_branch_p)
+ (uncond_branch_p, branch_likely_p): New functions.
+ (insns_between, nops_for_insn_or_target, append_insn)
+ (macro_start): Use them.
+ (get_append_method): Likewise. Remove redundant test.
+
+2011-08-05 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (v9a_asr_table): Add "cps".
+ (sparc_ip): Handle '4', '5' and '(' format codes.
+
+2011-08-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/13056
+ * output-file.c (output_file_close): Call bfd_cache_close_all
+ on error.
+
+ * write.c (write_object_file): Revert the last change.
+
+2011-08-04 Alan Modra <amodra@gmail.com>
+
+ * write.c (write_object_file): Call set_symtab even if we had
+ errors.
+
+2011-08-04 Tristan Gingold <gingold@adacore.com>
+
+ * config/obj-elf.c (obj_elf_section): Do not free name.
+
+2011-08-03 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/tc-arm.c (do_t_strexbh): New.
+ (insns): Update accordingly.
+
+2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/13048
+ * config/tc-i386.c (handle_quad): Removed.
+ (md_pseudo_table): Remove "quad".
+ (tc_gen_reloc): Don't check BFD_RELOC_64 for disallow_64bit_reloc.
+ (x86_dwarf2_addr_size): New.
+
+ * config/tc-i386.h (x86_dwarf2_addr_size): New.
+ (DWARF2_ADDR_SIZE): Likewise.
+
+2011-08-01 Nick Clifton <nickc@redhat.com>
+
+ PR ld/12974
+ * config/tc-arm.c (literal_pool): Add locs field.
+ (add_to_lit_pool): Initialise the locs entry for the new literal.
+ (s_ltorg): Generate a DWARF2 line number entry for each emitted
+ literal pool entry.
+
+2011-08-01 Tristan Gingold <gingold@adacore.com>
+
+ * write.c (write_relocs): Fix -Wshadow in DEBUG3 and DEBUG4.
+
+2011-08-01 Tristan Gingold <gingold@adacore.com>
+
+ * frags.c (frag_grow): Simplify the code.
+
+2011-07-30 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (nops_for_vr4130): Revert previous commit.
+
+2011-07-29 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c: Adjust comments throughout.
+ (reglist_lookup): Reshape code.
+ (jmp_reloc_p, jalr_reloc_p): Reformat.
+ (got16_reloc_p, hi16_reloc_p, lo16_reloc_p): Handle microMIPS
+ relocations.
+ (gpr_mod_mask): Remove unused variable.
+ (gpr_read_mask, gpr_write_mask): Reshape code.
+ (fpr_read_mask, fpr_write_mask): Likewise.
+ (nops_for_vr4130): Ensure non-microMIPS mode.
+ (can_swap_branch_p): Correct pinfo2 reference. Reshape code.
+ (append_insn): Skip Loongson 2F workaround in MIPS16 mode. Use
+ the outermost operator of a compound relocation to determines
+ the relocated field. Fix formatting.
+ (md_convert_frag): Reshape code.
+
+2011-07-29 Tristan Gingold <gingold@adacore.com>
+
+ * frags.c (frag_var_init): New function.
+ (frag_var): Call frag_var_init to initialize.
+ (frag_variant): Ditto.
+
+2011-07-27 Nathan Sidwell <nathan@codesourcery.com>
+
+ * dwarf2dbg.c (out_debug_line): Ignore non-normal segments, with a
+ warning.
+ * doc/as.texinfo (Offset): Document .offset directive.
+
+2011-07-27 Tristan Gingold <gingold@adacore.com>
+
+ * frags.c (frag_grow): Revert previous patch.
+
+2011-07-26 Kazuhiro Inaoka <kazuhiro.inaoka.ud@renesas.com>
+
+ * config/tc-rx.c (md_convert_frag): Fix encoding of beq.a
+ synthetic instruction.
+
+2011-07-25 Tristan Gingold <gingold@adacore.com>
+
+ * frags.c (frag_grow): Simplify the code.
+
+2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
+ Chao-ying Fu <fu@mips.com>
+ Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.h (mips_segment_info): Add one bit for
+ microMIPS.
+ (TC_LABEL_IS_LOCAL): New macro.
+ (mips_label_is_local): New prototype.
+ * config/tc-mips.c (S0, S7): New macros.
+ (emit_branch_likely_macro): New variable.
+ (mips_set_options): Add micromips.
+ (mips_opts): Initialise micromips to -1.
+ (file_ase_micromips): New variable.
+ (CPU_HAS_MICROMIPS): New macro.
+ (hilo_interlocks): Set for microMIPS too.
+ (gpr_interlocks): Likewise.
+ (cop_interlocks): Likewise.
+ (cop_mem_interlocks): Likewise.
+ (HAVE_CODE_COMPRESSION): New macro.
+ (micromips_op_hash): New variable.
+ (micromips_nop16_insn, micromips_nop32_insn): New variables.
+ (NOP_INSN): Handle microMIPS ASE.
+ (mips32_to_micromips_reg_b_map): New macro.
+ (mips32_to_micromips_reg_c_map): Likewise.
+ (mips32_to_micromips_reg_d_map): Likewise.
+ (mips32_to_micromips_reg_e_map): Likewise.
+ (mips32_to_micromips_reg_f_map): Likewise.
+ (mips32_to_micromips_reg_g_map): Likewise.
+ (mips32_to_micromips_reg_l_map): Likewise.
+ (mips32_to_micromips_reg_n_map): Likewise.
+ (mips32_to_micromips_reg_h_map): New variable.
+ (mips32_to_micromips_reg_m_map): Likewise.
+ (mips32_to_micromips_reg_q_map): Likewise.
+ (micromips_to_32_reg_h_map): New variable.
+ (micromips_to_32_reg_i_map): Likewise.
+ (micromips_to_32_reg_m_map): Likewise.
+ (micromips_to_32_reg_q_map): Likewise.
+ (micromips_to_32_reg_b_map): New macro.
+ (micromips_to_32_reg_c_map): Likewise.
+ (micromips_to_32_reg_d_map): Likewise.
+ (micromips_to_32_reg_e_map): Likewise.
+ (micromips_to_32_reg_f_map): Likewise.
+ (micromips_to_32_reg_g_map): Likewise.
+ (micromips_to_32_reg_l_map): Likewise.
+ (micromips_to_32_reg_n_map): Likewise.
+ (micromips_imm_b_map, micromips_imm_c_map): New macros.
+ (RELAX_DELAY_SLOT_16BIT): New macro.
+ (RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
+ (RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
+ (RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
+ (RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
+ (RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
+ (RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
+ (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_TOOFAR32): Likewise.
+ (RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
+ (RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
+ (INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
+ (mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
+ fsize and insns.
+ (mips_mark_labels): New function.
+ (mips16_small, mips16_ext): Remove variables, replacing with...
+ (forced_insn_size): ... this.
+ (append_insn, mips16_ip): Update accordingly.
+ (micromips_insn_length): New function.
+ (insn_length): Return the length of microMIPS instructions.
+ (mips_record_mips16_mode): Rename to...
+ (mips_record_compressed_mode): ... this. Handle microMIPS ASE.
+ (install_insn): Handle microMIPS ASE.
+ (reglist_lookup): New function.
+ (is_size_valid, is_delay_slot_valid): Likewise.
+ (md_begin): Handle microMIPS ASE.
+ (md_assemble): Likewise. Update for append_insn interface change.
+ (micromips_reloc_p): New function.
+ (got16_reloc_p): Handle microMIPS ASE.
+ (hi16_reloc_p): Likewise.
+ (lo16_reloc_p): Likewise.
+ (jmp_reloc_p): New function.
+ (jalr_reloc_p): Likewise.
+ (matching_lo_reloc): Handle microMIPS ASE.
+ (insn_uses_reg, reg_needs_delay): Likewise.
+ (mips_move_labels): Likewise.
+ (mips16_mark_labels): Rename to...
+ (mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
+ (gpr_mod_mask): New function.
+ (gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
+ (fpr_read_mask, fpr_write_mask): Likewise.
+ (insns_between, nops_for_vr4130, nops_for_insn): Likewise.
+ (fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
+ (MICROMIPS_LABEL_CHAR): New macro.
+ (micromips_target_label, micromips_target_name): New variables.
+ (micromips_label_name, micromips_label_expr): New functions.
+ (micromips_label_inc, micromips_add_label): Likewise.
+ (mips_label_is_local): Likewise.
+ (micromips_map_reloc): Likewise.
+ (can_swap_branch_p): Handle microMIPS ASE.
+ (append_insn): Add expansionp argument. Handle microMIPS ASE.
+ (start_noreorder, end_noreorder): Handle microMIPS ASE.
+ (macro_start, macro_warning, macro_end): Likewise.
+ (brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
+ (mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
+ (BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
+ (MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
+ (macro_build): Handle microMIPS ASE. Update for append_insn
+ interface change.
+ (mips16_macro_build): Update for append_insn interface change.
+ (macro_build_jalr): Handle microMIPS ASE.
+ (macro_build_lui): Likewise. Simplify.
+ (load_register): Handle microMIPS ASE.
+ (load_address): Likewise.
+ (move_register): Likewise.
+ (macro_build_branch_likely): New function.
+ (macro_build_branch_ccl): Likewise.
+ (macro_build_branch_rs): Likewise.
+ (macro_build_branch_rsrt): Likewise.
+ (macro): Handle microMIPS ASE.
+ (validate_micromips_insn): New function.
+ (expr_const_in_range): Likewise.
+ (mips_ip): Handle microMIPS ASE.
+ (options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
+ (md_longopts): Add mmicromips and mno-micromips.
+ (md_parse_option): Handle OPTION_MICROMIPS and
+ OPTION_NO_MICROMIPS.
+ (mips_after_parse_args): Handle microMIPS ASE.
+ (md_pcrel_from): Handle microMIPS relocations.
+ (mips_force_relocation): Likewise.
+ (md_apply_fix): Likewise.
+ (mips_align): Handle microMIPS ASE.
+ (s_mipsset): Likewise.
+ (s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
+ (s_dtprel_internal): Likewise.
+ (s_gpword, s_gpdword): Likewise.
+ (s_insn): Handle microMIPS ASE.
+ (s_mips_stab): Likewise.
+ (relaxed_micromips_32bit_branch_length): New function.
+ (relaxed_micromips_16bit_branch_length): New function.
+ (md_estimate_size_before_relax): Handle microMIPS ASE.
+ (mips_fix_adjustable): Likewise.
+ (tc_gen_reloc): Handle microMIPS relocations.
+ (mips_relax_frag): Handle microMIPS ASE.
+ (md_convert_frag): Likewise.
+ (mips_frob_file_after_relocs): Likewise.
+ (mips_elf_final_processing): Likewise.
+ (mips_nop_opcode): Likewise.
+ (mips_handle_align): Likewise.
+ (md_show_usage): Handle microMIPS options.
+ * symbols.c (TC_LABEL_IS_LOCAL): New macro.
+ (S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
+
+ * doc/as.texinfo (Target MIPS options): Add -mmicromips and
+ -mno-micromips.
+ (-mmicromips, -mno-micromips): New options.
+ * doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
+ (MIPS ISA): Document .set micromips and .set nomicromips.
+ (MIPS insn): Update for microMIPS support.
+
+2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_ip): Make a copy of the instruction's
+ mnemonic and use it for further processing.
+
+2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Adjust for the rename of
+ INSN_TRAP to INSN_NO_DELAY_SLOT. Remove the check for INSN_SYNC
+ as well as explicit checks for ERET and DERET when scheduling
+ branch delay slots.
+
+2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add k1om.
+ (i386_align_code): Handle PROCESSOR_K1OM.
+ (check_cpu_arch_compatible): Check EM_K1OM.
+ (i386_arch): Handle Intel K1OM.
+ (i386_mach): Return bfd_mach_k1om for Intel K1OM.
+ (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
+ K1OM.
+
+ * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
+ (processor_type): Add PROCESSOR_K1OM.
+
+ * doc/c-i386.texi: Document k1om.
+
+2011-07-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/c-i386.texi: Fix a typo.
+
+2011-07-06 Aurelien Jarno <aurelien@aurel32.net>
+
+ * config/tc-mips.c (append_insn): delete prev_pinfo2 and pinfo2.
+
+2011-07-04 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Fix handling
+ of register 0.
+
+2011-07-04 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (append_insn): Make sure DWARF-2 location
+ information is properly adjusted for branches that get swapped.
+
+2011-07-03 Samuel Thibault <samuel.thibault@gnu.org>
+ Thomas Schwinge <thomas@schwinge.name>
+
+ PR binutils/12913
+ * config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
+ ELFOSABI_LINUX alias.
+ * config/tc-ia64.c: Likewise.
+
+2011-06-30 Paul Carroll <pcarroll@codesourcery.com>
+
+ * config/tc-arm.c (do_t_add_sub): Only allow LSL shifts of less
+ than 4 in Thumb mode.
+
+2011-06-30 Nick Clifton <nickc@redhat.com>
+
+ PR gas/12848
+ * config/tc-arm.c (BAD_RANGE): New error message define.
+ (md_apply_fix): Use it.
+ Fix range check for thumb branch instructions.
+
+2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (append_method): New enum.
+ (can_swap_branch_p, get_append_method): New functions.
+ (append_insn): Use get_append_method to decide how the instruction
+ should be added.
+
+2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (append_insn): Remove bogus goto.
+
+2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (append_insn): Always clear the history after an
+ unconditional branch.
+
+2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (find_altered_mips16_opcode): New function.
+ (append_insn): Use it.
+
+2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (insn_uses_reg): Delete.
+ (gpr_read_mask, gpr_write_mask): New functions.
+ (fpr_read_mask, fpr_write_mask): Likewise.
+ (insns_between, nops_for_vr4130, append_insn): Use them.
+
+2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (md_mips_end): Call mips_emit_delays.
+
+2011-06-29 Dave Martin <dave.martin@linaro.org>
+
+ PR gas/12931
+ * config/tc-arm.c (mapping_state): When changing to ARM or THUMB
+ state set the minimum required alignment of the section.
+
+2011-06-29 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-i386.c (i386_mach): Convert to ISO-C.
+ (md_begin, pe_directive_secrel, md_estimate_size_before_relax): Ditto.
+ (md_convert_frag, md_apply_fix, md_undefined_symbol): Ditto.
+ (md_section_align, tc_gen_reloc): Ditto.
+
+2011-06-28 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_pdesc): Fix indentation. Do not
+ generate dummy fix.
+
+2011-06-28 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (load_expression): Use alloca instead of xmalloc.
+ (emit_jsrjmp): Ditto.
+ (tc_gen_reloc): Ditto.
+
+2011-06-28 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (alpha_evax_proc_hash): Remove.
+ (alpha_evax_proc_data): New variable.
+ (s_alpha_ent): Prevent nested function. Remove has_insert call.
+ (s_alpha_pdesc): Do not call demand_empty_rest_of_line in case of
+ error. Do not search in the hash table. Check if match with .ent.
+ (s_alpha_name): Remove unused variable.
+ (md_begin): Remove initialization of alpha_evax_proc_hash.
+
+2011-06-27 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (add_to_link_pool): Remove basesym parameter.
+ Locally declare basesym. Add comments. Do not set literal_pool_size.
+ (load_expression): Adjust call to add_to_link_pool.
+ (s_alpha_pdesc): Define pdesc symbol using dot.
+ Do not set literal_pool_size.
+ (s_alpha_end): Use NULL instead of 0.
+
+2011-06-27 Tristan Gingold <gingold@adacore.com>
+
+ * config/obj-evax.c (evax_frob_file_before_adjust): Add comments.
+ Fix style.
+ * config/obj-evax.h (struct alpha_linkage_fixups): Remove seg
+ field. Add comments.
+ (obj_symbol_type, object_headers, OBJ_SYMFIELD_TYPE): Remove
+
+2011-06-26 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (fix_24k_record_store_info): If the previous
+ instruction was a store, and the next instructions are unknown,
+ assume the worst.
+
+2011-06-25 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR gas/12915
+ * config/tc-mips.c (nops_for_vr4130, nops_for_24k, nops_for_insn)
+ (nops_for_sequence, nops_for_insn_or_target): Add ignore parameters.
+ (mips_emit_delays, start_noreorder): Update accordingly.
+ (append_insn): Likewise. Revert original fix for this PR
+ and use the ignore parameter instead.
+
+2011-06-24 Tristan Gingold <gingold@adacore.com>
+
+ PR gas/11625
+ * config/obj-evax.c (evax_frob_symbol): Use as_bad instead of abort.
+
+2011-06-24 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (add_to_link_pool): Remove useless offset
+ variable. Fix style.
+
+2011-06-23 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR gas/12915
+ * config/tc-mips.c (append_insn): Only consider hazards between the
+ pre-noreorder block and ip.
+
+2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com>
+
+ * config/tc-arm.c (vfp_conv): Add check on range of immediate operand
+ in vcvt instruction between floating-point and fixed-point.
+ (operand_parse_code): Add "OP_oI32z".
+ (parse_operands): OP_oI32z case added.
+
+2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.tgt: Revert x32 change.
+
+2011-06-20 Nick Clifton <nickc@redhat.com>
+
+ * doc/Makefile.am: (CPU_DOCS): Add c-xstormy16.texi.
+ * doc/Makefile.in: Regenerate.
+ * doc/all.texi: Set XSTORMY16.
+ * doc/c-xstormy16.texi: New file.
+
+2011-06-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.tgt: Support x32.
+
+2011-06-15 Nick Clifton <nickc@redhat.com>
+
+ * NEWS: Mention addition of TILEPRO and TIKE-Gx support.
+
+2011-06-14 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
+ (tc_new_dot_label): Define.
+ (ppc_new_dot_label): Declare.
+ * config/tc-ppc.c (ppc_frob_label): Set within target field.
+ (ppc_fix_adjustable): Use this field to adjust the reloc.
+ (ppc_new_dot_label): New function.
+
+2011-06-14 Alan Modra <amodra@gmail.com>
+
+ * po/POTFILES.in: Regenerate.
+
+2011-06-13 Walter Lee <walt@tilera.com>
+
+ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
+ config/tc-tilepro.c.
+ (TARGET_CPU_HFILES): Add config/tc-tilegx.h and
+ config/tc-tilepro.h.
+ * Makefile.in: Regenerate.
+ * configure.tgt (tilepro-*-*): New.
+ (tilegx-*-*): Likewise.
+ * config/tc-tilegx.c: New file.
+ * config/tc-tilegx.h: Likewise.
+ * config/tc-tilepro.h: Likewise.
+ * config/tc-tilepro.c: Likewise.
+ * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
+ c-tilepro.texi.
+ * doc/Makefile.in: Regenerate.
+ * doc/all.texi (TILEGX): Define.
+ (TILEPRO): Define.
+ * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
+ c-tilegx.texi and c-tilepro.texi.
+ * doc/c-tilegx.texi: New.
+ * doc/c-tilepro.texi: New.
+
+2011-06-13 Nick Clifton <nickc@redhat.com>
+
+ PR gas/12854
+ * config/tc-arm.c (do_shift): Do not allow shift operations at the
+ end of a register based shift insn.
+ (do_t_shift): Likewise.
+
+2011-06-13 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-score.c (s3_my_get_expression): Delete unused local
+ variable 'seg'.
+ (s3_do_ldst_insn): Delete unused local variable 'strbak'.
+ (s3_do16_ldst_insn): Delete unused local variable 'temp'.
+ (s3_do_macro_bcmp): Zero inst_expand array.
+ (s3_do_macro_bcmpz): Likewise.
+ (s3_s_score_end): Delete unused local variable 'dot'.
+ (s3_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
+ * config/tc-score7.c (s7_my_get_expression): Delete unused local
+ variable 'seg'.
+ (s7_do_ldst_insn): Delete unused local variable 'strbak'.
+ (s7_b32_relax_to_b16): Delete unused local variables 'r_old' and
+ 'r_new'.
+ (s7_s_score_end): Delete unused local variable 'dot'.
+ (s7_relax_frag): Delete unused local variable 'relax_size'.
+ (s7_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
+
+2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ AVX Programming Reference (June, 2011)
+ * config/tc-i386.c (i386_error): Add invalid_vsib_address and
+ unsupported_vector_index_register.
+ (cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
+ (check_VecOperands): New.
+ (match_template): Call check_VecOperands. Handle
+ invalid_vsib_address and unsupported_vector_index_register.
+ (build_modrm_byte): Support VecSIB. Check register-only source
+ operand when two source operands are swapped.
+ (i386_index_check): Allow Xmm/Ymm index registers.
+
+ * doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
+ and invpcid./invpcid.
+
+2011-06-09 Nick Clifton <nickc@redhat.com>
+
+ PR gas/12861
+ * config/tc-cr16.c (tc_gen_reloc): Remove unused local variable
+ code.
+ (check_cinv_options): Remove unused local variables. Make
+ function void.
+ (md_assemble): Remove unused local variable.
+
+2011-06-09 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/tc-arm.c (do_ldrd): Warn in unpredictable cases.
+
+2011-06-03 Arnaud Patard <arnaud.patard@rtp-net.org>
+
+ PR gas/12698
+ * config/tc-arm.c (parse_psr): Set m_profile to false when
+ assembling for any architecture.
+
+2011-06-02 Jie Zhang jie@codesourcery.com
+ Nathan Sidwell nathan@codesourcery.com
+
+ * config/tc-arm.c (parse_address_main): Handle -0 offsets.
+ (encode_arm_addr_mode_2): Set default sign of zero here ...
+ (encode_arm_addr_mode_3): ... and here.
+ (encode_arm_cp_address): ... and here.
+ (md_apply_fix): Use default sign of zero here.
+
+2011-06-02 Nick Clifton <nickc@redhat.com>
+
+ * as.c: Fix spelling typo.
+ * read.c: Likewise.
+ * config/tc-ppc.c: Likewise.
+ * po/gas.pit: Regenerate.
+
+2011-05-31 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (arm_cpus): Add Cortex-R5.
+ (arm_extensions): Allow idiv on ARMv7-R.
+ * doc/c-arm.text: Update idiv extension restrictions.
+
+2011-05-31 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (arm_force_relocation): Resolve all pc-relative
+ loads.
+
+2011-05-31 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_t_branch): Avoid relaxing branches to constant
+ addresses.
+
+2011-05-31 Paul Brook <paul@codesourcery.com>
+ Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-arm.c (fix_new_arm): Create an absolute symbol for
+ pc-relative fixes to constants.
+ * config/tc-arm.h (TC_FORCE_RELOCATATION_ABS): Define.
+
+2011-05-27 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-s390.c (md_begin): Remove unused variable dup_insn.
+
+2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (md_gather_operands): Fix check for floating
+ register pair operands.
+
+2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (md_gather_operands): Emit an error for odd
+ numbered registers used as register pair operand.
+
+2011-05-23 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-v850.h (TC_FX_SIZE_SLACK): Define.
+
+2011-05-20 Bernd Schmidt <bernds@codesourcery.com>
+
+ * config/tc-tic6x.c (tic6x_operators): Add "pcr_offset".
+ (tic6x_parse_name): Handle it.
+ (tic6x_fix_new_exp): Handle O_pcr_offset.
+ (tic6x_fix_adjustable): Return 0 for the new relocs.
+ (md_apply_fix): Handle them.
+ (tc_gen_reloc): Likewise.
+ * config/tc-tic6x.h (tic6x_fix_info): Add a fix_subsy member.
+
+2011-05-18 Nick Clifton <nickc@redhat.com>
+
+ PR gas/12754
+ * config/tc-tic30.c (ordinal_names): Allow translation of the
+ ordinal names.
+
+2011-05-18 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (s_unreq): Reword warning message to make it
+ easier to translate.
+ * config/tc-ia64.c (md_show_usage): Add note for translators.
+ * configure.in (ALL_LINGUAS): Add "fi".
+ * configure: Regenerate.
+
+2011-05-18 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-ppc.h (ppc_tc_sy): Reorder fields.
+ Put size into an union with dw.
+ (OBJ_COPY_SYMBOL_ATTRIBUTES): Adjust.
+ (ppc_xcoff_end): Declare.
+ (md_end): Define.
+ * config/tc-ppc.c: Add includes for xcoff.
+ (ppc_dwsect): New function.
+ (md_pseudo_table): Add dwsect.
+ (struct dw_subsection): New.
+ (dw_sections): New.
+ (ppc_change_debug_section): New function.
+ (ppc_xcoff_end): Ditto.
+ (ppc_function): Adjust for ppc_tc_sy.
+ (ppc_symbol_new_hook): Ditto.
+ (ppc_frob_symbol): Ditto.
+ (ppc_frob_section): Do not set vma for debug sections.
+ (ppc_fix_adjustable): Return true for debug sections.
+ * config/obj-coff.c: Add includes for xcoff.
+ (coff_frob_section): Handle dwarf section.
+
+2011-05-17 Nick Clifton <nickc@redhat.com>
+
+ * po/fi.po: New Finnish translation.
+ * po/fr.po: Updated French translation.
+
+ * config/tc-m32r.c (md_show_usage): Fix typos in descriptions.
+ * config/tc-mt.c (md_assemble): Fix typos in warning messages.
+ * cond.c (s_else): Fix typos in error messages.
+ * config/tc-pj.c (md_assemble): Fix typo in error message.
+
+2011-05-16 Hans-Peter Nilsson <hp@axis.com>
+
+ * config/tc-cris.c (md_parse_option) <OPTION_PIC>: Error if not
+ emitting ELF object.
+ (md_show_usage): Only mention --pic if the assembler can generate
+ ELF objects.
+ * doc/c-cris.texi (CRIS-Opt): Mention that generating ELF is a
+ prerequisite for --pic being a valid option.
+
+2011-05-13 Frederic Marchal <fmarchal@perso.be>
+
+ PR gas/12755
+ * config/tc-v850.c (parse_register_list): Correct error string.
+
+2011-05-12 Quentin Neill <quentin.neill@amd.com>
+
+ * config/tc-i386.c (cpu_arch): Rename PROCESSOR_BDVER1 to PROCESSOR_BD.
+ (i386_align_code): Ditto
+
+2011-05-12 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ PR gas/12715
+ * config/tc-arm.c (parse_big_immediate): Fix parsing of 64-bit
+ immediates on 32-bit hosts.
+
+2011-05-10 Quentin Neill <quentin.neill@amd.com>
+
+ * config/tc-i386.c (cpu_arch): Add bdver2 and rename
+ PROCESSOR_BDVER1 to PROCESSOR_BDVER.
+ (i386_align_code): Rename PROCESSOR_BDVER1.
+ (processor_type): Ditto.
+ * doc/c-i386.texi: Add bdver2.
+
+2011-05-10 Alan Modra <amodra@gmail.com>
+
+ * dw2gencfi.c (tc_cfi_endproc): Avoid "set but not used" error.
+
+2011-05-09 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-tic6x.c (streq): Define.
+ (tic6x_get_unwind): New.
+ (s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp,
+ s_tic6x_personalityindex, s_tic6x_personality): New functions.
+ (md_pseudo_table): Add "endp", "handlerdata", "personalityindex",
+ "personality" and "cantunwind".
+ (tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions,
+ tic6x_start_unwind_section, tic6x_unwind_frame_regs,
+ tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big,
+ tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word,
+ tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb,
+ tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding,
+ tic6x_cfi_endproc): New.
+ * config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define.
+ (tic6x_unwind_info): New.
+ (tic6x_segment_info_type): Add marked_pr_dependency, unwind and
+ text_unwind.
+ (TARGET_USE_CFIPOP, tc_regname_to_dw2regnum,
+ tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN,
+ DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc,
+ tc_cfi_section_name): Define.
+ * doc/c-tic6x.texi: Document new unwinding directives.
+ * dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default
+ definitions.
+ (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column,
+ CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr):
+ Move to dw2gencfi.h.
+ (CFI_EMIT_target): Define.
+ (dot_cfi_sections): Check tc_cfi_section_name.
+ (dot_cfi_startproc): Use tc_cfi_startproc.
+ (dot_cfi_endproc): Use tc_cfi_endproc.
+ * dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset,
+ CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame,
+ CFI_val_encoded_addr): Move to here from dw2gencfi.c.
+
+2011-05-07 Alan Modra <amodra@gmail.com>
+
+ * dw2gencfi.c (CUR_SEG, SET_CUR_SEG, HANDLED, SET_HANDLED): Define.
+ Use throughout in place of #if SUPPORT_FRAME_LINKONCE.
+ (struct fde_entry): Rename cseg to cur_seg.
+ (cfi_change_reg_numbers): Remove ATTRIBUTE_UNUSED.
+ (get_cfi_seg): Likewise. Use if (SUPPORT_FRAME_LINKONCE) rather
+ that #if SUPPORT_FRAME_LINKONCE.
+ (cfi_finish): Likewise.
+
+2011-05-06 Tristan Gingold <gingold@adacore.com>
+
+ * read.c (s_comm_internal): Remove code for OBJ_VMS.
+ (s_data): Ditto.
+ (s_text): Ditto.
+ * write.c (write_object_file): Ditto.
+ * symbols.c (define_sym_at_dot): Ditto.
+ (colon): Ditto.
+
+2011-05-05 Alan Modra <amodra@gmail.com>
+
+ * dw2gencfi.c (SUPPORT_FRAME_LINKONCE): Define. Use throughout
+ file to conditionally compile code added 2011-04-26.
+ (cfi_change_reg_numbers): Add ATTRIBUTE_UNUSED on params only used
+ when SUPPORT_FRAME_LINKONCE.
+ (get_cfi_seg): Likewise. Reintroduce old code for when not
+ SUPPORT_FRAME_LINKONCE.
+ (cfi_finish): Move get_cfi_seg calls out of loop when not
+ SUPPORT_FRAME_LINKONCE. Avoid unused var warning.
+
+2011-05-03 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-tic6x.c (s_ehtype): New function.
+ (md_pseudo_table): Add "ehtype".
+ (tic6x_fix_adjustable, md_apply_fix): BFD_RELOC_C6000_EHTYPE.
+ * doc/c-tic6x.texi: Document .ehtype directive.
+
+2011-04-26 Kai Tietz <ktietz@redhat.com>
+
+ * dw2gencfi.c (dwcfi_seg_list): New struct.
+ (dwcfi_hash): New static hash variable.
+ (get_debugseg_name): New.
+ (alloc_debugseg_item): New.
+ (make_debug_seg): New.
+ (dwcfi_hash_insert): New.
+ (dwcfi_hash_find): New.
+ (dwcfi_hash_find_or_make): New.
+ (cfi_insn_data): New member cur_seg.
+ (cie_entry): Likewise.
+ (fde_entry): New cseg and handled members.
+ (alloc_fde_entry): Initialize cseg member.
+ (alloc_cfi_insn_data): Initialize cur_seg member.
+ (dot_cfi_sections): Compare for beginning of
+ section names via strncmp.
+ (get_cfi_seg): New.
+ (cfi_finish): Treat link-once sections.
+ (is_now_linkonce_segment): New local helper.
+ (output_cie): Ignore cie entries not member of current
+ segment.
+ (output_fde): Likewise.
+ (select_cie_for_fde): Likewise.
+ (cfi_change_reg_numbers): Add new argument for current segment
+ and ignore insn elements, if not part of current segment.
+ * ehopt.c (get_cie_info): Use strncmp for
+ section name matching.
+ (heck_eh_frame): Likewise.
+
+2011-04-20 Catherine Moore <clm@codesourcery.com>
+ David Ung <davidu@mips.com>
+
+ * config/mips.c (mips_cl_insn): Add new field complete_p.
+ (create_insn): Initialize complete_p to zero.
+ (BASE_REG_EQ): New.
+ (fix_24k_align_to): New.
+ (fix_24k_store_info): Declare.
+ (fix_24k_sort): New.
+ (fix_24k_record_store_info): New.
+ (nops_for_24k): New.
+ (nops_for_insn): Call nops_for_24k.
+ (append_insn): Move O_constant expression handling.
+
+2011-04-20 Alan Modra <amodra@gmail.com>
+
+ * hash.c (set_gas_hash_table_size): Use bfd_hash_set_default_size.
+ (hash_new_sized): New function, split out from..
+ (hash_new): ..here.
+
+2011-04-19 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (v7m_psrs): Revert previous delta.
+
+2011-04-18 Julian Brown <julian@codesourcery.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to
+ detect M-profile targets.
+ (do_t_swi): Exclude v7 and higher variants from arm_ext_os test.
+ (v7m_psrs): Fix typo: basepri_max should be basepri_mask.
+
+2011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (s390_machine): New prototype.
+ (md_pseudo_table): New pseudo-op .machine.
+ (s390_opcode_hash): Initialize to NULL.
+ (s390_parse_cpu): New function.
+ (md_parse_option): Use s390_parse_cpu.
+ (s390_setup_opcodes): New function.
+ (md_begin): Use s390_setup_opcodes.
+ (s390_machine): New hook handling the new .machine pseudo.
+
+ * doc/c-s390.texi: Document the new pseudo op .machine.
+
+2011-04-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_mach): Start error message with lower
+ case.
+ (md_begin): Likewise.
+ (md_parse_option): Likewise.
+ (i386_target_format): Likewise.
+ (check_byte_reg): Likewise.
+ (check_long_reg): Likewise.
+ (check_qword_reg): Likewise.
+ (check_word_reg): Likewise.
+
+2011-04-12 Nick Clifton <nickc@redhat.com>
+
+ PR gas/12532
+ * config/tc-arm.c (relax_branch): Do not relax branches to
+ preemptable global symbols.
+
+2011-04-11 Julian Brown <julian@codesourcery.com>
+
+ * config/tc-arm.c (parse_psr): Add LHS argument. Improve support
+ for *APSR bitmasks.
+ (operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR.
+ Remove OP_RVC_PSR.
+ (parse_operands): Likewise.
+ (do_mrs): Tweak error message for constraint.
+ (do_t_mrs): Update constraints for changes to APSR support.
+ (do_t_msr): Likewise. Don't set PSR_f flag here.
+ (psrs): Remove "g", "nzcvq", "nzcvqg".
+ (insns): Tweak entries for msr and mrs instructions.
+
+2011-04-11 Kai Tietz <ktietz@redhat.com>
+
+ * config/tc-i386.c (x86_cons): Initialize adjust with zero.
+
+2011-04-11 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-i386.c (x86_cons): Define even for non-ELF targets.
+ * config/tc-i386.h (x86_cons): Always prototype.
+
+ * config/tc-cr16.c (getprocregp_image): Fix type of 'r' parameter
+ in order to avoid a compile time warning.
+ (getprocreg_image): Likewise.
+
+2011-04-11 Alan Modra <amodra@gmail.com>
+
+ * config/tc-cr16.c (getprocreg_image): Correct range check.
+ (getprocregp_image): Likewise.
+
+2011-04-06 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.tgt (strongarm*be, strongarm*b, strongarm*,
+ xscale*be|xscale*b, xscale*): Remove architectures.
+ (thumb-*-coff, thumb-*-rtems*, thumb-*-elf, thumb-epoc-pe,
+ thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets.
+
+2011-04-01 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-ia64.c (md_apply_fix): Add a cast to avoid a warning.
+
+2011-03-31 Bernd Schmidt <bernds@codesourcery.com>
+
+ * config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
+ static variables.
+ (md_begin): Initialize them.
+ (s_tic6x_scomm): New static function.
+ (md_pseudo_table): Add "scomm".
+ (tc_gen_reloc): Really undo all adjustments made by
+ bfd_install_relocation.
+ * doc/c-tic6x.texi: Document the .scomm directive.
+
+2011-03-31 Tristan Gingold <gingold@adacore.com>
+
+ * dwarf2dbg.c (DWARF2_VERSION): Define.
+ (out_debug_line): Use it.
+ (out_debug_aranges): Ditto.
+ (out_debug_info): Ditto.
+ * config/tc-ia64.h (DWARF2_VERSION): Override it.
+
+2011-03-30 Michael Snyder <msnyder@vmware.com>
+
+ * obj-elf.c (obj_elf_section): Free malloced name.
+ * macro.c (get_any_string): Free malloced br_buf.
+ (do_formals): Free 'formal'.
+
+2011-03-30 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-ppc.c (ppc_frob_symbol): Convert stsym symbols value
+ to offset only if within is set.
+ (ppc_stabx): Reformat. For stsym stabs, add a check and set
+ within only for symbols.
+
+2011-03-29 Richard Henderson <rth@redhat.com>
+
+ PR 12610
+ * config/tc-alpha.c (s_alpha_align): Don't auto-align a previous
+ label; zap alpha_insn_label.
+
+2011-03-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (handle_quad): Properly handle multiple
+ operands.
+
+2011-03-29 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (BYTEUNPACK): Return yyerror when dest
+ reg $2 is the same as dest reg $4.
+
+2011-03-29 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (BYTEOP16M): Return yyerror when dest
+ reg $2 is the same as dest reg $4.
+
+2011-03-29 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (BYTEOP16P): Return yyerror when dest
+ reg $2 is the same as dest reg $4.
+
+2011-03-28 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (16bit acc add): Return yyerror when dest
+ reg $1 is the same as dest reg $7.
+
+2011-03-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (handle_quad): New.
+ (md_pseudo_table): Add "quad".
+
+2011-03-26 John Marino <binutils@marino.st>
+
+ * configure.tgt: Fix support for *-*-dragonfly*.
+ * config/tc-i386.c: define SVR4_COMMENT_CHARS for dragonfly.
+ * config/te-dragonfly.h: New file.
+
+2011-03-24 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/tc-avr.c (mcu_types): Add new devices: atmega325pa,
+ atmega3250pa, atmega3290pa, atmega16hvbrevb, atmega32hvbrevb,
+ at90pwm161.
+ * doc/c-avr.texi: Document new device names.
+
+2011-03-24 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (dual 32bit add/sub): Return yyerror when dest
+ reg $1 is the same as dest reg $7.
+ (quad 16bit add/sub): Return yyerror when dest reg $1 is the same as
+ dest reg $7.
+
+2011-03-24 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (check_macfuncs): Clarify error message when
+ P is mismatched. Check destination regno are off by one when P is
+ set, or are equal when P is not set.
+
+2011-03-23 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (SEARCH): Return yyerror when dest reg $2 is
+ the same as dest reg $4.
+ (BITMUX): Return yyerror when dest reg $3 is the same as dest reg $5.
+
+2011-03-23 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/tc-avr.c (mcu_types): Add new xmega devices: atxmega64a1u,
+ atxmega128a1u, atxmega16x1, atxmega32x1, atxmega128b1, atxmega256a3bu.
+ * doc/c-avr.texi: Document new device names.
+
+2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
+ (AVR_INSN): Change definition to match.
+ (avr_opcodes): Likewise, change to match.
+ (mcu_types): Add XMEGA architecture names and new XMEGA device names.
+ (md_show_usage): Add XMEGA architecture names.
+ (avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
+ Add support for SPM Z+ instruction.
+ * doc/c-avr.texi: Add documentation for XMEGA architectures and
+ devices.
+
+2011-03-21 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/tc-avr.c (md_show_usage): Add "Assembler" text to output.
+
+2011-03-18 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (elf_frob_symbol): Report S_SET_SIZE symbol
+ on .size expression errors rather than symbols in the size expression.
+
+2011-03-18 Alan Modra <amodra@gmail.com>
+
+ * input-scrub.c (line_numberT): Delete.
+ (input_scrub_close): Reset line counters.
+ * messages.c (as_show_where): Don't print invalid line number.
+ (as_warn_internal, as_bad_internal): Likewise.
+
+2011-03-18 Alan Modra <amodra@gmail.com>
+
+ * read.c (read_a_source_file): Remove md_after_pass_hook.
+ Move "quit" label before set of dot_symbol.
+ * config/tc-d10v.h (md_after_pass_hook): Don't define.
+ * config/tc-d30v.h (md_after_pass_hook): Likewise.
+ * config/tc-m32r.h (md_after_pass_hook): Likewise.
+ (md_cleanup): Define to call m32r_fill_insn.
+
+2011-03-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (md_parse_option): Add -march=all option which
+ switches to the highest available CPU.
+
+2011-03-17 Alan Modra <amodra@gmail.com>
+
+ PR 12569
+ * expr.c (operand): Correct passing of "mode" to expr.
+ * read.c (do_org): Allow expr_section.
+ (get_known_segmented_expression): Don't assert anything about the
+ segment.
+
+2011-03-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * as.c (show_usage): Add --size-check=.
+ (parse_args): Add and handle OPTION_SIZE_CHECK.
+
+ * as.h (flag_size_check): New.
+
+ * config/obj-elf.c (elf_frob_symbol): Use as_bad to report
+ bad .size directive only for --size-check=error.
+
+ * doc/as.texinfo: Document --size-check=.
+
+2011-03-14 Mike Frysinger <vapier@gentoo.org>
+
+ * config/tc-bfin.c (bfin_cpus[]): Add 0.4 for
+ bf542/bf544/bf547/bf548/bf549.
+
+2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to
+ determine whether a relocation is needed.
+ (md_apply_fix, arm_apply_sym_value): Likewise.
+
+2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/tc-arm.c (arm_adjust_symtab): Set the branch type
+ for Thumb symbols.
+
+2011-03-11 Nick Clifton <nickc@redhat.com>
+
+ * remap.c (remap_debug_filename): Always allocate a buffer for the
+ returned pointer.
+ * stabs.c (stabs_generate_asm_file): Free the pointer returned by
+ remap_debug_filename.
+
+2011-03-10 Michael Snyder <msnyder@vmware.com>
+
+ Revert the following change:
+ * dwarf2dbg.c (out_file_list): Free malloced 'dir'.
+ (out_debug_info): Free malloced 'dirname' and 'comp_dir'.
+
+2011-03-10 Alan Modra <amodra@gmail.com>
+
+ * gas/config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS,
+ TARGET_SYMBOL_FIELDS): Don't define.
+ * gas/config/tc-arc.c (arc_common): Use correct symbol "local" field.
+
+2011-03-09 Michael Snyder <msnyder@vmware.com>
+
+ * dwarf2dbg.c (out_file_list): Free malloced 'dir'.
+ (out_debug_info): Free malloced 'dirname' and 'comp_dir'.
+ (emit_fixed_inc_line_addr): Assign instead of conditional in
+ assert.
+
+2011-03-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/obj-elf.c (elf_frob_symbol): Mention symbol name in
+ non-constant .size expression.
+
+2011-03-02 Nick Clifton <nickc@redhat.com>
+
+ * ecoff.c: Incldue filenames.h
+
+2011-02-28 Kai Tietz <kai.tietz@onevision.com>
+
+ * depend.c (register_dependency): Use filename_(n)cmp.
+ * dwarf2dbg.c (get_filenum): Likewise.
+ * ecoff.c (add_file): Likewise.
+ (ecoff_generate_asm_lineno): Likewise.
+ * input-scrub.c (new_logical_line_flags): Likewise.
+ * listing.c (file_info): Likewise.
+ (listing_newline): Likewise.
+ * remap.c (remap_debug_filename): Likewise.
+ * stabs.c (generate_asm_file): Likewise.
+ (stabs_generate_asm_lineno): Likewise.
+
+2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (append_insn): Disable branch relaxation for
+ DSP instructions.
+
+2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (macro): Handle M_PREF_AB.
+
+2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary
+ register to use.
+ (RELAX_BRANCH_UNCOND): Adjust accordingly.
+ (RELAX_BRANCH_LIKELY): Likewise.
+ (RELAX_BRANCH_LINK): Likewise.
+ (RELAX_BRANCH_TOOFAR): Likewise.
+ (RELAX_BRANCH_AT): New macro.
+ (append_insn): Encode the temporary register to use in standard
+ MIPS branch relaxation.
+ (relaxed_branch_length): Update according to changes to
+ RELAX_BRANCH_ENCODE.
+ (md_convert_frag): Use the encoded register as the temporary.
+
+2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): On REL targets also
+ reject PC-relative relocations.
+
+2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (md_convert_frag): Correct message
+ capitalization.
+
+2011-02-28 Alan Modra <amodra@gmail.com>
+
+ * symbols.c (report_op_error): Remove unnecessary forward declaration.
+ Add "op" parameter. Report operator and operand segments in error
+ message, not operand symbols.
+ (resolve_symbol_value): Always set segment for equated symbols, not
+ just when finalizing. Adjust report_op_error calls.
+
+2011-02-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (reloc): Don't sign-check 4-byte relocations
+ if 64bit relocations aren't allowed.
+
+2011-02-25 Alan Modra <amodra@gmail.com>
+
+ PR gas/12519
+ * config/obj-elf.c (elf_frob_symbol): Properly handle size expression.
+
+2011-02-21 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_ip) <'o'>: Remove duplicate
+ initialization of offset_reloc.
+
+2011-02-15 Richard Henderson <rth@redhat.com>
+
+ * dw2gencfi.c (dot_cfi_dummy): New.
+ (cfi_pseudo_table) [!TARGET_USE_CFIPOP]: New.
+ * read.c (pobegin): Unconditionally call cfi_pop_insert.
+
+2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure: Regenerate.
+
+2011-02-13 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-lex.l (BYTEOP2M): Remove tokenization.
+ * config/bfin-parse.y (BYTEOP2M): Delete token.
+ (asm_1): Remove BYTEOP2M insn matching.
+
+2011-02-12 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-defs.h: Include opcode/bfin.h.
+ (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH, M_IU): Delete.
+
+2011-02-11 Mike Frysinger <vapier@gentoo.org>
+
+ * doc/c-bfin.texi (Instruction Delimiting): Fix occur typo.
+ (Modify Registers): Fix subtracted typo.
+ (.byte2): Extend and swap descriptions with .byte4.
+ (.byte4): Extend and swap descriptions with .byte2.
+ (.db, .dw, .dd): Document behavior.
+
+2011-02-11 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (TESTSET): Reject REG_SP and REG_FP.
+
+2011-02-11 Alan Modra <amodra@gmail.com>
+
+ * doc/c-ppc.texi (PowerPC-Opts <-nops>): Clarify.
+
+2011-02-10 Alan Modra <amodra@gmail.com>
+
+ * doc/as.texinfo (Overview): Add missing markup around Blackfin
+ and PowerPC options.
+
+2011-02-10 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_show_usage): Remove -l and -b. Add -K PIC.
+ * doc/as.texinfo: Refer to and include c-ppc.texi for PowerPC options.
+ (Overview <Target PowerPC options>): Add a number of missing options.
+ * doc/c-ppc.texi: Likewise. Add markup for use in manpage generation.
+
+2011-02-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/6957
+ * config/tc-i386.c (i386_align_code): Use f32_patt when tuning
+ for i686.
+
+2011-02-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (set_cpu_arch): Also update cpu_arch_isa_flags
+ for ISA extensions.
+ (md_parse_option): Likewise.
+
+2011-02-04 Bernd Schmidt <bernds@codesourcery.com>
+
+ * doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
+ * doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
+ (TIC6X Options): Don't mention "-matomic".
+ * config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
+ (md_longopts): Remove corresponding entries.
+ (md_parse_option): Don't handle them.
+ (md_show_usage): Don't document them.
+ (tic6x_atomic): Delete variable.
+ (tic6x_update_features): Always copy tic6x_arch_enable to
+ tic6x_features.
+ (tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
+ (s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
+ (md_pseudo_table): Remove ".atomic" and ".noatomic".
+
+2011-01-31 Nick Clifton <nickc@redhat.com>
+
+ * write.c (write_contents): Include output file name and bfd error
+ value when reporting the inability to write to the output file.
+ * config/tc-rx.c (rx_handle_align): Do not insert NOPs into align
+ frag that has a non-zero fill value.
+
+2011-01-27 DJ Delorie <dj@redhat.com>
+
+ * config/tc-rx.c (md_convert_frag): If we can't compute the target
+ address, zero out the values stored in the object file to make
+ objdump's output consistent.
+
+2011-01-26 Kai Tietz <kai.tietz@onevision.com>
+
+ * config/tc-i386.c (md_begin): Set for x64 windows COFF target
+ x86_dwarf2_return_column to 32.
+
+2011-01-20 Nick Clifton <nickc@redhat.com>
+
+ PR gas/12384
+ * config/tc-h8300.c (constant_fits_width_p): Use correct type for
+ comparison.
+
+2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * write.c (compress_debug): Return if section size is smaller
+ than 32 bytes.
+
+2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/12409
+ * write.c (compress_debug): Return if section size is 0.
+
+2011-01-18 Mingfeng Wu <mingfeng@faraday-tech.com>
+
+ * config/tc-arm.c (arm_cpus): Add Faraday ARMv5TE compatible
+ cores: fa606te, fa616te, fmp626. Modify the VFP of fa626te.
+ * doc/c-arm.texi (ARM Options): Add -mcpu={fa606te, fa616te,
+ fmp626} options.
+
+2011-01-18 Nick Clifton <nickc@redhat.com>
+
+ PR gas/12390
+ * doc/all.texi: Add NS32K
+ * doc/as.texinfo: Remove target specific details of which
+ characters act as comment initiators and statement separators into
+ individual target specific files.
+ * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of
+ the hash character at the start of a line.
+ * doc/c-arm.texi (ARM-Chars): Likewise.
+ * doc/c-avr.texi (AVR-Chars): Likewise.
+ * doc/c-d10v.texi (D10V-Chars): Likewise.
+ * doc/c-d30v.texi (D30V-Chars): Likewise.
+ * doc/c-mmix.texi (MMIX-Chars): Likewise.
+ * doc/c-s390.texi (s390 characters): Likewise.
+ * doc/c-sh.texi (SH-Chars): Likewise.
+ * doc/c-sh64.texi (SH64-Chars): Likewise.
+ * doc/c-sparc.texi (SPARC-Chars): Likewise.
+ * doc/c-tic6x.texi (TIC6X Syntax): Likewise.
+ * doc/c-xtensa.texi (Xtensa Syntax): Likewise.
+ * doc/c-z80.texi (Z80-Chars): Likewise.
+ * doc/c-z8k.texi (Z8000-Chars): Likewise.
+ * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character.
+ * doc/c-arc.texi (ARC-Chars): Fill in this subsection.
+ * doc/c-bfin.texi (Blackfin Syntax): Document line comment and
+ line separator characters.
+ * doc/c-cr16.texi (CR16 Syntax): Likewise.
+ * doc/c-i386.texi (i386-Chars): Likewise.
+ * doc/c-i860.texi (i860-Chars): Likewise.
+ * doc/c-i960.texi (i960-Chars): Likewise.
+ * doc/c-ip2k.texi (IP2K-Chars): Likewise.
+ * doc/c-lm32.texi (LM32-Chars): likewise.
+ * doc/c-m32c.texi (M32C-Chars): Likewise.
+ * doc/c-m68hc11.texi (M68HC11-syntax): Likewise.
+ * doc/c-m68k.texi (M68K-Chars): Likewise.
+ * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise.
+ * doc/c-msp430.texi (MSP430-Chars): Likewise.
+ * doc/c-mt.texi (MT-Chars): Likewise.
+ * doc/c-ns32k.texi (NS32K-Chars): Likewise.
+ * doc/c-pj.texi (PJ-Chars): Likewise.
+ * doc/c-ppc.texi (PowerPC-Chars): Likewise.
+ * doc/c-rx.texi (RX-Chars): Likewise.
+ * doc/c-score.texi (SCORE-Chars): Likewise.
+ * doc/c-tic54x.texi (TIC54X-Chars): Likewise.
+ * doc/c-v850.texi (V850-Chars): Likewise.
+ * doc/c-vax.texi (VAX-Chars): Likewise.
+ * doc/c-xc16x.texi (xc16x-Chars): Likewise.
+
+2011-01-17 Quentin Neill <quentin.neill@amd.com>
+
+ * config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.
+
+ * doc/c-i386.texi (i386-TBM): New section.
+
+2011-01-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (disallow_64bit_disp): Renamed to ...
+ (disallow_64bit_reloc): This.
+ (md_assemble): Don't check movabs for x32 mode here.
+ (i386_target_format): Updated.
+ (tc_gen_reloc): Check if 64bit relocations are allowed.
+
+2011-01-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (disallow_64bit_disp): New.
+ (x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
+ X86_64_ABI/X86_64_X32_ABI.
+ (md_assemble): Don't allow movabs with relocation in x32 mode.
+ (i386_target_format): Updated.
+
+2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (OPTION_N32): Renamed to ...
+ (OPTION_X32): This.
+ (md_longopts): Replace n32 with x32.
+ (md_parse_option): Updated.
+ (md_show_usage): Likewise.
+
+ * doc/c-i386.texi: Replace --n32 with --x32.
+
+2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
+
+ * config/tc-mips.c (mips_ip): Update error messages. Take an
+ unadjusted offset for "+c" argument.
+
+2011-01-10 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-i386.c (x86_elf_abi): Only define for targets that use
+ it.
+
+2011-01-10 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (s_arm_tls_desceq): Move code into ELF-only
+ part of the file.
+
+2011-01-10 Nathan Sidwell <nathan@codesourcery.com>
+ Glauber de Oliveira Costa <glommer@gmail.com>
+
+ * doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
+ .tlsdescseq directive.
+ * config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
+ following a symbol.
+ (s_arm_tls_descseq): New directive.
+ (md_pseudo_table): Add it.
+ (encode_branch): Allow TLS_CALL relocs too.
+ (do_t_blx, do_t_branch23): Use encode_branch.
+ (reloc_names): Add tlsdesc and tlscall.
+ (md_apply_fix): Process tls desc relocations.
+ (tc_gen_reloc): Likewise.
+ (arm_fix_adjustable): Likewise.
+
+2011-01-07 Quentin Neill <quentin.neill@amd.com>
+
+ * config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.
+
+ * doc/c-i386.texi (i386-BMI): New section.
+
+2011-01-06 Paul Koning <ni1d@arrl.net>
+
+ * config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative
+ references to absolute addresses.
+
+2011-01-05 DJ Delorie <dj@redhat.com>
+
+ * config/tc-rx.c (tc_gen_reloc): Emit an RX_OP_NEG expression
+ instead of an RH_NEG32 one.
+
+2011-01-05 Jonathan Wakely <jwakely.gcc@gmail.com>
+
+ * doc/c-i386.texi: Clarify --n32.
+
+2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_modrm_byte): Allow encoding 32/64bit
+ integer registers in VEX.vvvv. Check register-only source
+ operand when two source operands are swapped. Properly update
+ destination when two source operands are swapped.
+
+2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas.c (parse_args): Update copyright to 2011.
+
+For older changes see ChangeLog-2010
+\f
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
projects / deliverable / binutils-gdb.git / blobdiff