-*- text -*-
+* Add support for Zilog eZ80 and Zilog Z180 CPUs.
+
+* Add support for z80-elf target.
+
+* Add support for relocation of each byte or word of multibyte value to Z80
+ targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
+ with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
+
+* Add SDCC support for Z80 targets.
+
Changes in 2.33:
* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
-mfp16-format=[ieee|alternative] option for Arm to control the format of the
encoding.
+* Add --gdwarf-cie-version command line flag. This allows control over which
+ version of DWARF CIE the assembler creates.
+
Changes in 2.32:
* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
of new CPUs and formats, lots of bugs fixed.
\f
-Copyright (C) 2012-2019 Free Software Foundation, Inc.
+Copyright (C) 2012-2020 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright