-*- text -*-
-* Add a configure option --enable-compressed-debug-sections=[yes|no] to decide
- whether DWARF debug sections should be compressed by default.
+* Add a configure option --enable-x86-relax-relocations to decide whether
+ x86 assembler should generate relax relocations by default. Default to
+ yes, except for x86 Solaris targets older than Solaris 12.
-* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
- assembler support for Argonaut RISC architectures.
+* New command line option -mrelax-relocations= for x86 target to control
+ whether to generate relax relocations.
+
+* New command line option -mfence-as-lock-add=yes for x86 target to encode
+ lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
+
+* Add assembly-time relaxation option for ARC cpus.
Changes in 2.26:
+* Add a configure option --enable-compressed-debug-sections={all,gas} to
+ decide whether DWARF debug sections should be compressed by default.
+
+* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
+ assembler support for Argonaut RISC architectures.
+
* Symbol and label names can now be enclosed in double quotes (") which allows
them to contain characters that are not part of valid symbol names in high
level languages.
of new CPUs and formats, lots of bugs fixed.
\f
-Copyright (C) 2012-2015 Free Software Foundation, Inc.
+Copyright (C) 2012-2016 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright